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JPH03179838A - Signal detection system - Google Patents

Signal detection system

Info

Publication number
JPH03179838A
JPH03179838A JP1319182A JP31918289A JPH03179838A JP H03179838 A JPH03179838 A JP H03179838A JP 1319182 A JP1319182 A JP 1319182A JP 31918289 A JP31918289 A JP 31918289A JP H03179838 A JPH03179838 A JP H03179838A
Authority
JP
Japan
Prior art keywords
circuit
signal
synchronizing
output signal
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1319182A
Other languages
Japanese (ja)
Other versions
JPH07112189B2 (en
Inventor
Susumu Otani
進 大谷
Shoji Endo
昭次 遠藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP31918289A priority Critical patent/JPH07112189B2/en
Priority to US07/624,201 priority patent/US5073906A/en
Priority to EP90313306A priority patent/EP0431957B1/en
Priority to DE69026040T priority patent/DE69026040T2/en
Priority to AU67882/90A priority patent/AU629150B2/en
Publication of JPH03179838A publication Critical patent/JPH03179838A/en
Publication of JPH07112189B2 publication Critical patent/JPH07112189B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/041Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042Detectors therefor, e.g. correlators, state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To prevent the deterioration of a detector characteristics for mis- detection and to prevent the deterioration in the transmission line efficiency without changing the length of a synchronizing signal by using power between NT of a soft discrimination data string so as to correct an identification value. CONSTITUTION:The system is provided with power averaging circuits 1, 2 receiving a synchronizing demodulation soft discrimination string of a modulation signal with synchronizing words of predetermined number and length inserted periodically therein and obtaining average power per bit number of the predetermined number and a correlation circuit 4 receiving a synchronizing demodulation soft discrimination string and applying the correlation calculation with the pattern of the synchronizing word. Moreover, an identification value setting circuit 3 multiplying a predetermined coefficient with an output signal of the power average circuits 1, 2 to set the identification value and a comparator circuit 5 comparing the output signal with an output signal from the correlation circuit 4 to detect the synchronizing word are provided. Thus, the deterioration in the undetection probability is prevented without varying the length of the synchronizing signal and the deterioration in the transmission line efficiency is prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は信号検出方式に関し、特に移動体衛星通信シス
テム等で伝送路の急激な変動により信号の接話が激しく
発生する様な系に於ける信号検出方式に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a signal detection method, and is particularly applicable to a system such as a mobile satellite communication system where signal interference occurs frequently due to rapid fluctuations in the transmission path. The present invention relates to a signal detection method.

〔従来の技術〕[Conventional technology]

従来、この種の信号検出方式は、信号中に含まれる同期
信号を相関検出して信号の有無を判定していた。
Conventionally, this type of signal detection method has determined the presence or absence of a signal by performing correlation detection on a synchronization signal included in the signal.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の信号検出方式は、硬判定後の2値の復号
信号列中の同期信号を相関検出し、ある一定以内の誤り
数であれば信号有、一定の誤り数を超えれば信号烈と判
定していた。同期信号の長さをN、伝送路誤り率をp、
上記の一定の誤り数をεとすれば、不検出確率Pm1s
sはで示される。ところで、移動体衛星通信システムの
様な伝送路状態が大きく変化する様な系では、時として
信号が全く受信できなくなり雑音のみが受信される。こ
の時には復調系列は同期語に対し1/2の誤り率と考え
られる為、誤って信号有と判定する確率Ptは となる。(2)式より明らかな様にP、は−のオーグー
でりみ減少する為、Nを十分長くしないとP、を低く押
える事は出来ない。従って伝送路効率の低下等を招く欠
点があった。
The conventional signal detection method described above detects the correlation of the synchronization signal in the binary decoded signal sequence after hard decision, and if the number of errors is within a certain value, it is determined that the signal is present, and if the number of errors exceeds the certain value, it is determined that the signal is strong. I was judging. The length of the synchronization signal is N, the transmission path error rate is p,
If the above constant number of errors is ε, the non-detection probability Pm1s
s is denoted by. By the way, in a system such as a mobile satellite communication system where the transmission path conditions change greatly, sometimes it becomes impossible to receive a signal at all, and only noise is received. At this time, the error rate of the demodulated sequence is considered to be 1/2 of that of the synchronization word, so the probability Pt of erroneously determining that there is a signal is as follows. As is clear from equation (2), since P decreases in intensity due to -, it is not possible to keep P low unless N is made sufficiently long. Therefore, there has been a drawback that the efficiency of the transmission path is lowered.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の信号検出方式は、信号中にあらかじめ定めた数
の長さの同期語が周期的に挿入されている変調信号の同
期復調軟判定列を入力としこの同期復調軟判定列の前記
あらかじめ定めた数のビット数当りの平均電力を求める
電力平均回路と、前記同期復調軟判定列を入力とし前記
同期語のバな乗じて識域値を設定する職域値設定回路と
、この職域値設定回路の出力信号と前記相関回路の出力
信号とを比較し同期語検出を行う比較回路とを備えてい
る。
The signal detection method of the present invention receives as input a synchronous demodulation soft decision sequence of a modulated signal in which synchronization words of a predetermined number of lengths are periodically inserted into the signal, and the predetermined a power averaging circuit that calculates the average power per bit number of the number of bits; a range value setting circuit that takes the synchronous demodulation soft decision sequence as input and sets a threshold value by multiplying the synchronous word by the number of bits; and this range value setting circuit. and a comparison circuit for detecting a synchronization word by comparing the output signal of the correlation circuit with the output signal of the correlation circuit.

本発明の信号検出方式において、前記同期復調軟判定列
を2乗する2乗回路と、この2乗回路の出力信号を前記
あらかじめ定めた数のビット数の区間で平均化する平均
回路とによって前記電力平均回路を構成してもよい。
In the signal detection method of the present invention, a squaring circuit that squares the synchronous demodulation soft decision sequence and an averaging circuit that averages the output signal of the squaring circuit in an interval of the predetermined number of bits A power averaging circuit may also be configured.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例な示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

同期復調軟判定列である入力データ系列101は2乗回
路lに入力されγ2(t)が出力される。ここにγ(1
)は入力データ系列101である。
An input data sequence 101, which is a synchronous demodulation soft decision sequence, is input to a squaring circuit l, and γ2(t) is output. Here γ(1
) is the input data series 101.

2乗された系列は次の平均回路2により同期語の長さN
ビットの区間平均化される。これから各時刻毎の入力デ
ータ系列101の平均電力が求められる。
The squared sequence is processed by the following averaging circuit 2 to obtain the synchronization word length N
The bits are averaged over the interval. From this, the average power of the input data series 101 at each time is determined.

平均回路2の出力信号は職域値設定回路3を経て比較回
路5の一方の入力に印加される。他方、入力データ系列
101は相互相関回路4にも入力される。
The output signal of the averaging circuit 2 is applied to one input of the comparison circuit 5 via the occupational value setting circuit 3. On the other hand, the input data series 101 is also input to the cross-correlation circuit 4.

相互相関回路4は の演算を行う。但し、y(t)は同期語そのものであり
(−NT/2.NT/2)の区間以外ではゼロであり、
*は複素共役を示す。γ(1)に同期信号y(t)が周
期的に挿入されていれば、ある−時点ではその出力は とかける。γ(1)はその時点では γ(t)= y (t)+ n (t)(5) と書ける。ここにn(りは雑音信号である。(5)式を
(4)式に代入すると となる。(6)式で、第1項はy(t)の平均電力を示
L、12項はn (t)を六千幽謔インパルス応答y“
(−〇のフィルタに通した時の出力信号である。
The cross-correlation circuit 4 performs the following calculations. However, y(t) is the synchronization word itself and is zero outside the interval (-NT/2.NT/2),
* indicates complex conjugation. If a synchronizing signal y(t) is periodically inserted into γ(1), its output will be combed at a certain point in time. γ(1) can be written as γ(t)=y(t)+n(t)(5) at that point. Here, n(ri is a noise signal. Substituting equation (5) into equation (4), we get n (t) to 6,000 impulse responses y“
(This is the output signal when passed through the −〇 filter.

従って、相互相関回路4で信号対雑音電力比がN倍に改
善される事が判る。そのため、Nが十分大きければ第2
項は殆んど黙視する事が出来る。例えば、Nが10であ
れば入力データ系列101のS / N = y 2/
 n ’はこの相互相関回路4の出力ではS/ N==
 10 y ’/ n 2となり、雑音電力がl/10
になったと等価になる。
Therefore, it can be seen that the cross-correlation circuit 4 improves the signal-to-noise power ratio by N times. Therefore, if N is large enough, the second
Most of the items can be ignored. For example, if N is 10, S/N of input data series 101 = y 2/
In the output of this cross-correlation circuit 4, n' is S/N==
10 y '/n 2, and the noise power is l/10
It becomes equivalent to .

平均回路2の出力信号Z(+)は であるから、 (5)式を代入すると となる。(8)式で第3項は、y (t)とn (t)
が互いに烈相関で、かつ、n(+)の自己相関関数がN
Tに対し十分早く収束すれば、エルゴード定理からとな
る。かつ、n (t)およびy (t)の平均値が零で
あれば第3項はフ!1町視する事ができる。更に、第2
項は通常第1項に比して同等あるいは小さい(S/N≧
00条件下で)。
Since the output signal Z(+) of the averaging circuit 2 is, substituting equation (5) gives the following equation. The third term in equation (8) is y (t) and n (t)
are strongly correlated with each other, and the autocorrelation function of n(+) is N
If it converges quickly enough for T, it follows from the ergodic theorem. And if the average value of n (t) and y (t) is zero, the third term is F! It can be seen as one town. Furthermore, the second
The term is usually equal to or smaller than the first term (S/N≧
00 conditions).

さて、Z (t)より得られる識域値εは、職域値設定
回路3により糸数αを乗じられて、ε(t)=α・Z(
t)       ・・・・・・ 00)と設定される
。この係数αは(6)式に於いてψ(0)を確実に検出
し、かつ同期語以外のパターンをU(r)とすると なるψ′(0)を出来るだけ検出しない様な値に設定さ
れる。但し、ここで論じる様な系では通常後続するフレ
ーム同期回路が存在する為にu (t)の場合は考慮し
なくても良い。問題となるのは入力データ系列101中
のy(t)((5)式中のy (t))が伝送路の減衰
によりほとんどゼロとなった時である。
Now, the knowledge range value ε obtained from Z (t) is multiplied by the number of threads α by the occupational range value setting circuit 3, and is calculated as ε(t)=α・Z(
t) ...00). This coefficient α is set to a value that reliably detects ψ(0) in equation (6) and prevents detection of ψ′(0), which would result in a pattern other than a synchronized word being U(r), as much as possible. be done. However, in a system like the one discussed here, there is usually a subsequent frame synchronization circuit, so there is no need to consider the case of u (t). A problem arises when y(t) (y(t) in equation (5)) in the input data series 101 becomes almost zero due to attenuation of the transmission path.

復調器の利得が常に一定であれば適応型識域値を用いる
必要はないが、通常受信設備にはAGC回路が用いられ
ており、 γ2(t)=一定         ・・・・・・ Q
21となる。この条件でψ(0)およびε(1)をみる
If the gain of the demodulator is always constant, there is no need to use an adaptive threshold value, but receiving equipment usually uses an AGC circuit, so γ2(t) = constant...Q
It will be 21. Look at ψ(0) and ε(1) under this condition.

入力データ系列101にy (t)がある場合の電力と
y (t)が烈くなった時の電力を等しくする様にAG
Cは動作するから、区別の為y(t)が無い時の雑音信
号をn+(t)とすると が成立する。本式は更に y (t)’+ n (t)2= n 1(t)2  
   ・・・・・・ 04)と変形される。ここにn(
t)、 y(t)は独立で平均0と仮定している。
AG is set so that the power when y (t) exists in the input data series 101 is equal to the power when y (t) becomes intense.
Since C operates, for the sake of distinction, let n+(t) be the noise signal when there is no y(t). This formula is further expressed as y (t)'+ n (t)2= n 1(t)2
...04). Here n(
t) and y(t) are assumed to be independent and have an average of 0.

更に よって n +(t)2=n(t)2(1+S/N)となる。こ
れから、係数 0 を(6)式に代入すると となり、入力データ系列101からy (t)が無くな
ったことにより雑音項が大きくなったのが判る。
Furthermore, n+(t)2=n(t)2(1+S/N). From this, when coefficient 0 is substituted into equation (6), it can be seen that the noise term has become larger due to the disappearance of y (t) from the input data series 101.

一方、識域値を決定する為のZ (t)は(8)式から
、第3項を魚視して となり、y(t)が烈くなった分の補正が行たわれる事
が判る。
On the other hand, from equation (8), Z (t) for determining the threshold value is obtained by considering the third term as a fish, and it can be seen that a correction is made for the increase in y (t). .

比較回路5は、相互相関回路4の出力であるψ(o)と
、職域値設定回路3の出力であるε(1)との大小を比
較して同期語の有無を判定する。
The comparison circuit 5 compares the magnitude of ψ(o), which is the output of the cross-correlation circuit 4, and ε(1), which is the output of the occupational value setting circuit 3, and determines the presence or absence of a synchronization word.

〔売切の効果〕[Effect of selling out]

以」二説明したように本発明は、復調軟判定データ列に
対し相互相関を取り信号検出を行うが、軟判定データ列
のNT間の電力を用いて識域値を補正する事により、同
期信号Nの長さをかえることなく誤検出不検出特性の劣
化を防ぐことができ、伝送路効率の低下を防ぐことがで
きる効果がある。
As explained above, in the present invention, signal detection is performed by cross-correlating demodulated soft-decision data strings. This has the effect of preventing deterioration of the false detection/non-detection characteristic without changing the length of the signal N, and preventing a decrease in transmission path efficiency.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すブロック図である。 l・・・・・・2乗回路、2・・・・・・平均回路、3
・・・・・・識域値設定回路、4・・・・・・相互相関
回路、5・・・・・・比較回路。
FIG. 1 is a block diagram showing one embodiment of the present invention. l... Square circuit, 2... Average circuit, 3
. . . Criterion value setting circuit, 4 . . . Cross-correlation circuit, 5 . . . Comparison circuit.

Claims (1)

【特許請求の範囲】 1、信号中にあらかじめ定めた数の長さの同期語が周期
的に挿入されている変調信号の同期復調軟判定列を入力
としこの同期復調軟判定列の前記あらかじめ定めた数の
ビット数当りの平均電力を求める電力平均回路と、前記
同期復調軟判定列を入力とし前記同期語のパターンとの
相互相関演算を行う相互相関回路と、前記電力平均回路
の出力信号にあらかじめ定めた係数を乗じて識域値を設
定する識域値設定回路と、この識域値設定回路の出力信
号と前記相関回路の出力信号とを比較し同期語検出を行
う比較回路とを備えたことを特徴とする信号検出方式。 2、前記同期復調軟判定列を2乗する2乗回路と、この
2乗回路の出力信号を前記あらかじめ定めた数のビット
数の区間で平均化する平均回路とによって前記電力平均
回路を構成したことを特徴とする請求項1記載の信号検
出方式。
[Claims] 1. A synchronization demodulation soft decision sequence of a modulated signal in which synchronization words of a predetermined length are periodically inserted into the signal is input, and the predetermined method of this synchronization demodulation soft decision sequence is performed. a power averaging circuit that calculates the average power per bit of the number of bits; a cross-correlation circuit that receives the synchronous demodulation soft decision sequence and performs a cross-correlation operation with the pattern of the synchronous word; and an output signal of the power averaging circuit. A threshold value setting circuit that sets a threshold value by multiplying it by a predetermined coefficient, and a comparison circuit that compares the output signal of the threshold value setting circuit with the output signal of the correlation circuit to detect a synchronization word. This signal detection method is characterized by: 2. The power averaging circuit is configured by a squaring circuit that squares the synchronous demodulation soft decision sequence, and an averaging circuit that averages the output signal of the squaring circuit over an interval of the predetermined number of bits. The signal detection method according to claim 1, characterized in that:
JP31918289A 1989-12-07 1989-12-07 Signal detection method Expired - Fee Related JPH07112189B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP31918289A JPH07112189B2 (en) 1989-12-07 1989-12-07 Signal detection method
US07/624,201 US5073906A (en) 1989-12-07 1990-12-06 Synchronization word detection apparatus
EP90313306A EP0431957B1 (en) 1989-12-07 1990-12-07 Synchronization word detection apparatus
DE69026040T DE69026040T2 (en) 1989-12-07 1990-12-07 Synchronization word recognition device
AU67882/90A AU629150B2 (en) 1989-12-07 1990-12-07 Synchronization word detection apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31918289A JPH07112189B2 (en) 1989-12-07 1989-12-07 Signal detection method

Publications (2)

Publication Number Publication Date
JPH03179838A true JPH03179838A (en) 1991-08-05
JPH07112189B2 JPH07112189B2 (en) 1995-11-29

Family

ID=18107333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31918289A Expired - Fee Related JPH07112189B2 (en) 1989-12-07 1989-12-07 Signal detection method

Country Status (5)

Country Link
US (1) US5073906A (en)
EP (1) EP0431957B1 (en)
JP (1) JPH07112189B2 (en)
AU (1) AU629150B2 (en)
DE (1) DE69026040T2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05227235A (en) * 1992-02-17 1993-09-03 Nec Corp Resynchronization demodulator
WO1999026386A1 (en) * 1997-11-19 1999-05-27 Kabushiki Kaisha Kenwood Synchronization acquiring circuit

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Publication number Priority date Publication date Assignee Title
JPH05159462A (en) * 1991-12-03 1993-06-25 Canon Inc Method for transmitting or recording information, information recording and reproducing device and information transmitting device
US5408504A (en) * 1992-12-30 1995-04-18 Nokia Mobile Phones Symbol and frame synchronization in a TDMA system
US5590160A (en) * 1992-12-30 1996-12-31 Nokia Mobile Phones Ltd. Symbol and frame synchronization in both a TDMA system and a CDMA
US5446727A (en) * 1993-11-30 1995-08-29 Motorola Inc. Method and apparatus for time aligning signals for reception in a code-division multiple access communication system
US5448571A (en) * 1994-04-26 1995-09-05 International Business Machines Corporation Method and apparatus for determining byte synchronization within a serial data receiver
US5790784A (en) * 1995-12-11 1998-08-04 Delco Electronics Corporation Network for time synchronizing a digital information processing system with received digital information
US6089749A (en) * 1997-07-08 2000-07-18 International Business Machines Corporation Byte synchronization system and method using an error correcting code
GB9902755D0 (en) * 1999-02-08 1999-03-31 Simoco Int Ltd Digital signal receiver synchronisation
US6785350B1 (en) 1999-10-14 2004-08-31 Nokia Corporation Apparatus, and associated method, for detecting a symbol sequence
US10992452B2 (en) * 2019-03-28 2021-04-27 Silicon Laboratories Inc. System and method of adaptive correlation threshold for bandlimited signals

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US3303335A (en) * 1963-04-25 1967-02-07 Cabell N Pryor Digital correlation system having an adjustable impulse generator
SE360931B (en) * 1972-02-28 1973-10-08 Philips Svenska Ab
US4001693A (en) * 1975-05-12 1977-01-04 General Electric Company Apparatus for establishing communication between a first radio transmitter and receiver and a second radio transmitter and receiver
FR2485839B1 (en) * 1980-06-27 1985-09-06 Cit Alcatel SPEECH DETECTION METHOD IN TELEPHONE CIRCUIT SIGNAL AND SPEECH DETECTOR IMPLEMENTING SAME
CA1151248A (en) * 1980-08-27 1983-08-02 Gerald O. Venier Convoluted code matched filter
JPS6238049A (en) * 1985-08-12 1987-02-19 Mitsubishi Electric Corp Unique word detector
US4847877A (en) * 1986-11-28 1989-07-11 International Business Machines Corporation Method and apparatus for detecting a predetermined bit pattern within a serial bit stream

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05227235A (en) * 1992-02-17 1993-09-03 Nec Corp Resynchronization demodulator
WO1999026386A1 (en) * 1997-11-19 1999-05-27 Kabushiki Kaisha Kenwood Synchronization acquiring circuit
US6526107B1 (en) 1997-11-19 2003-02-25 Kabushiki Kaisha Kenwood Synchronization acquiring circuit

Also Published As

Publication number Publication date
AU629150B2 (en) 1992-09-24
EP0431957A2 (en) 1991-06-12
EP0431957B1 (en) 1996-03-20
EP0431957A3 (en) 1992-03-11
AU6788290A (en) 1991-06-13
JPH07112189B2 (en) 1995-11-29
DE69026040D1 (en) 1996-04-25
US5073906A (en) 1991-12-17
DE69026040T2 (en) 1996-09-05

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