JPH03171653A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a tensile force induced by resin other than a chip sealing resin from acting on a control electrode so as to protect it against separation by a method wherein an empty space is provided between a chip sealing resin and a resin adjacent to it by the use of a cap, and the tip of the control electrode is located in the empty space concerned. CONSTITUTION:A cap shown by a numerical mark 21 has an opening which faces downward and is provided in a case 1, and an empty space 22 where the tip of a gate lead 11 is located is formed between resins 4 and 5 by the cap 21. In a semiconductor device of this design, when a current is made to flow through a thyristor chip 9 and the resins 4 and 5 are made to expand to lift the resin 4 up, the gate lead is free from a tensile force caused by the resin 4, so that the gate lead 11 can be prevented from being separated from the thyristor chip 9.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device suitable for use in a resin-sealed semiconductor composite device such as a semiconductor power module.

[Conventional technology]

Conventionally, this type of semiconductor device has been constructed as, for example, a Cyrisk module as shown in FIG. To explain this based on the same figure, in the same figure, what is indicated by the symbol l is formed by a metal base plate 2 and a resin frame 3, and is made of two upper and lower resins 4.5 having different coefficients of thermal expansion. A box-shaped case with a bottom made by laminating the inside of the case, 6
and 7 are two electrode terminals that are joined to the base plate 2 of this case 1 via an insulating plate 8 and whose tips are exposed outside the case, and 9 is one electrode terminal 6 of these two electrode terminals 6 and 7. A thyristor tip 11 connected to the thyristor tip 9 through the internal connection plate 10 and connected to the other electrode terminal 7 serves as a control electrode with its tip facing into the upper layer resin 4. A gate lead 12 is an external gate terminal that is soldered to the gate lead 11 via a lead wire 13 and whose tip is exposed outside the case 1. In addition, Cyrisk Tip 9 has both resins of 4.5
Of these, it is sealed with a lower layer of resin 5. Also, 2
As the two resins 4.5, for example, epoxy resin is used to ensure the mechanical strength of the electrode terminal 6.7 and the external gate terminal 12, and silicone gel is used to protect the thyristor chip 9. In order to seal the semiconductor device constructed in this way with the resin 4.5, first the frame 3 is bonded onto the base plate 2 to form a case l, and then the electrode terminals 6 are placed inside this case 1. .7
After accommodating the thyristor chip 9 to which the external gate terminal 12 is connected, a resin 5 for sealing the thyristor chip 9 is injected into the case 1, and then the resin 4 is laminated above the resin 5. It will be done. [Problems to be Solved by the Invention] Incidentally, in this type of semiconductor device, since the gate lead 11 is configured to face inside both the resins 4.5, when the temperature rises due to heat generation due to the energization of the thyristor 9. , both resins 4.5, etc. expanded and resin 4 was pushed upward. This is because the coefficient of thermal expansion of the resin (silicone gel) 5 is greater than the coefficient of thermal expansion of the resin (epoxy resin) 4. As a result, the gate lead 11 facing into the resin 4 is subjected to an upward tensile force, causing a problem in that the gate lead 1l is peeled off from the silice chip 9.

Therefore, it is possible to consider a structure in which the capacity of the resin (silicon gel) 5 is increased (the layer thickness is larger) so that the gate lead 1L is exposed only inside the resin 5, but in this case, the internal volume of the case 1 is limited. Therefore, the layer thickness of the resin (epoxy resin) 4 becomes smaller, and the electrode terminals 6.7 and external gate terminals 1
There was a disadvantage that the mechanical strength of No. 2 could not be maintained.

The present invention has been made in view of the above circumstances, and can prevent the control electrode from peeling off from the chip, and can maintain the mechanical strength of the chip terminal.
The present invention provides a semiconductor device whose quality can be guaranteed over a long period of time.

[Means to solve the problem]

In the semiconductor device according to the present invention, a space is formed by a cap between a resin for sealing a chip and a resin adjacent to this resin, and the tip of a control electrode is exposed to this space.

[For production]

In the present invention, during use, no tensile force is applied by the resin adjacent to the resin sealing the chip.

〔Example〕

EMBODIMENT OF THE INVENTION Hereinafter, the structure etc. of this invention will be explained in detail by the Example shown in the figure.

FIG. 1 is a cross-sectional view showing a semiconductor device according to the present invention. In this figure, the same members as in FIG. In the same figure, what is designated by the reference numeral 2l is a cap that opens downward and is provided inside the case 1, so that there is a space 22 between both the resins 4.5 where the tip of the gate lead 11 faces. is formed.

In the semiconductor device configured in this way, when the thyristor chip 9 is energized, the resins 4, 5, etc. expand and the resin 4.
Even if the gate lead 11 is pushed upward, the gate lead 11 is not subjected to any tensile force due to the resin 4, so it is possible to prevent the gate lead 11 from peeling off from the gate lead 11.

Further, since a sufficient layer thickness of the resin 4 adjacent to the resin 5 sealing the thyristor chip 9 can be ensured, the mechanical strength of the electrode terminals 6.7 and the external gate terminals 12 can be maintained.

In addition, in this example, the resin structure inside the case 1 is
Although the case where the layer is a layer is shown, the present invention is not limited to this.
For example, it may be three layers, four layers, etc., and the number of layers can be changed as appropriate.

Further, in this embodiment, an example is shown in which the present invention is applied to a cyrisk module, but the present invention is not limited to this, and it goes without saying that it can be applied to other power transistor modules in the same manner as in the embodiment. .

〔Effect of the invention〕

As explained above, according to the present invention, a space is formed by camping between the resin sealing the chip and the resin adjacent to this resin, and the tip of the control electrode is exposed to this space. The control electrode is not subjected to tensile force by the resin other than the resin that seals the chip, and a sufficient layer thickness of the resin adjacent to the resin that seals the chip can be ensured. Therefore, peeling of the w1 control electrode from the chip can be prevented, and the mechanical strength of the chip terminal can be maintained, so quality can be guaranteed over a long period of time.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing a semiconductor device according to the present invention, and FIG. 2 is a sectional view showing a conventional semiconductor device. 1...Case, 4.5...Resin, 9...Sirisk chip, 1l...Gate lead, 21...
... Cap, 22 ... Space part. Agent Masuo Oiwa Figure 1 Figure 2

Claims (1)

[Claims] A case formed by laminating two or more resins having different coefficients of thermal expansion, a chip provided in the case and sealed with a chip-protecting resin among the two resins, and the chip. In the semiconductor device, a space is formed between the chip-protecting resin and a resin adjacent to the resin by a cap, and a control electrode is connected to the chip and is provided in the case. A semiconductor device characterized in that the tip of the control electrode is exposed.