JPH03141739A - Phase noise removing filter - Google Patents

Abstract

PURPOSE:To reduce close noise and to generally reduce noise even when a frequency is fluctuated by detecting the phase noise included in a signal by using delay time, negatively feeding the phase noise back to a voltage controlled phase shifter and reducing the phase noise. CONSTITUTION:A microwave signal from an input terminal 10 is passed through the voltage controlled phase shifter. One of outputs is inputted to a delay device 16 and the other is inputted to a phase comparator 18. In the delay device 16, the prescribed delay time is applied to the signal frequency and phases are compared by the comparator 18. Then, the phase noise included in the signal is detected. A detected result is negatively fed back to the voltage controlled phase shifter 12 and a signal, for which the phase noise is removed, is outputted from an output terminal 20. Thus, the phase noise near a carrier can be reduced as well and even when the frequency is fluctuated, the phase noise can be generally reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to the configuration of a filter that removes phase noise contained in a microwave signal from a microwave oscillator or synthesizer.

(Conventional technology) An example of a conventional noise removal filter is shown in FIG.

In FIG. 7, a high Q resonator is inserted between the transmission line connected to the input terminal and the transmission line connected to the output terminal. A microwave signal containing phase noise is input from the input terminal. Since the high-Q resonator has a narrowband bandpass characteristic, only the carrier component of the signal is outputted to the output terminal, and the noise component tllm from the carrier is reflected to the input side. Therefore, a microwave signal with reduced phase noise is obtained at the output terminal.

(Problem to be solved by the invention) However, the above method has two drawbacks.

First, noise detuned from the carrier can be reduced, but if noise near the carrier is to be reduced, the Q of the resonator must be made extremely high, which is unrealistic.

Second, since it is difficult to change the frequency of a high-Q resonator, it cannot be applied when the frequency of an input microwave signal is changed over time, and is not versatile as a filter.

SUMMARY OF THE INVENTION An object of the present invention is to provide a filter that can eliminate these drawbacks, sufficiently reduce nearby noise, and generally reduce phase noise even when the frequency fluctuates.

(Means for Solving the Problems) The features of the present invention include a voltage controlled phase shifter connected to an input terminal, and a voltage controlled phase shifter connected to an output thereof, the output being connected to a phase shift amount control input terminal of the voltage controlled phase shifter. It has a feedback delay detector and an output terminal connected to the output of the voltage controlled phase shifter or the output of the delay device of the delay detector, and removes phase noise contained in the signal applied to the input terminal. It is in the phase noise removal filter.

(Function) The phase synchronized oscillator circuit according to the present invention detects phase noise contained in a signal using delayed detection, and negative feedback of this detection result to the variable phase shifter at the front end eliminates the phase noise. In this respect, it is fundamentally different from conventional noise rejection filters that use a high-Q resonator or the like as a narrow band pass filter.

(Example) FIG. 1(A) shows an example of the present invention. In FIG. 1 (Δ), lO is an input terminal, 12 is a voltage controlled phase shifter, 14 is a delay detector, 16 is a delay device, 18 is a phase comparator, and 20 is an output terminal. Further, 22 is a feedback path, and 24 is a phase shift amount control input terminal.

The microwave signal voltages at the input terminal 10 and the output terminal 20 are respectively expressed as tJ (t)=Acos[ωt+δ(t)]
−−−(1)V (t)=Acos[ωt+φ
(t)1...(2). Here, A and ω are the amplitude and frequency of the input/output signal. δ(1) and φ(1) are irregular temporal minute fluctuations in phase, that is, phase noise (also referred to as jitter). The two input voltages of the phase comparator 18 in the delay detector 14 are respectively Acos[ωt+φ(t)I Acos[ω(t−r, )+φft−Z: )]
-・(3). Here, it is the delay time of the delay device 16.

The phase comparator 18 can be realized by a double balanced circuit in an analog circuit, or by an exclusive OR in a digital circuit. Here, the operation will be explained using an analog circuit. Since the double-balanced mixer operates as a multiplier, its output ψ(1)
is the product of two input signal voltages, ψ(t) = Acos[ωt+φ(t)] XAco
s [ω(at t-)+φ(at-)1=GiftA2cos[
2(AJ t-ωT + φ(t)+4 (t-v
)]+'d A”cos [(IJ t+φ(1)−
φ(t-τ)]...(4) Here, A2 is the output amplitude of the double balanced mixer. The first term in this equation is the frequency 2ω (2ω of the microwave signal).
double the frequency), so it can be easily removed, and the second term is ψ(t) □% A2cos [(AJ t+φ(1)
−φ D−r)] ...(5) becomes the output of the phase comparator.

Here, if the delay time τ is set so that the passing phase of the delay device is approximately 90° + 2nπ at the frequency of the input signal, equation (5) becomes ψ(t)=-! 4A2sin[φ(1)-φ(t-T)
] ・−・(6). Since the phase fluctuation is very small compared to 1 radian, the above equation can be approximated as ψ(t)=-%A2 [φ(1)-φ(at t-)1
...(7). When the above equation is converted to Laplace, we get Ko(s)・,−! 4A2Φ(s) [1-exp(-s
)l...(8). On the other hand, the control sensitivity (also called phase modulation sensitivity) of the voltage-controlled phase shifter is k[rad/
Assuming Vl, the output phase is: Output phase = Input phase + Phase shift amount, 2 manual phase, 0 control voltage x control sensitivity. If this is expressed in the Laplace-transformed S domain, Φ(S) = Δ(s) + A(s). Here, Δ(S) is the Laplace transform of δ(1). Substituting equation (8) into this equation gives Φ(S):Δ(s)−! 4kA2 Φ(s) [1-ex
p(-sr)], that is, the transfer function of this filter with respect to phase fluctuations, that is, the phase noise removal effect H(s) is as follows. Here, S corresponds in this case to the frequency of the noise, ie, the speed of phase fluctuation. In an actual microwave oscillator, the phase fluctuation speed S is about IMIIz or less, so for example, if the delay time is Ions, then S
Since (1), exp (-sτ) # 1-sτ holds true. Substituting this into the above equation, the phase noise removal effect t((s) becomes , . The above is the example of Fig. This is an explanation of the operation.

By the way, in the above embodiment, as can be seen from equation (10), it can be seen that the higher the noise frequency S is, the greater the noise removal effect is. Therefore, we devised a configuration to remove the noise flatly regardless of the noise frequency, as shown in Figure 1 (B).
This is an example shown in FIG. In this embodiment, an integrating means 30 is inserted into the return path 22. The integrating means can be realized using a low-pass filter, a DC amplifier, etc. If T is the time constant of integration, the transfer function of the integrating means is 1/Ts. (A
), the phase noise removal effect H(s) is calculated as follows. That is, in this embodiment, the noise removal effect is independent of S. As a specific numerical example, control sensitivity is l<=
1 rad/V, the output amplitude of the double-balanced peak is A2=IV
, when the delay time of the delay device is τ = Ions and the time constant of the integrating means is ins, the phase noise is 1/6 of the voltage ratio, or about 15 dB.
The extent of this will be reduced. To obtain an even larger noise reduction ratio, this circuit uses a voltage controlled phase shifter and a phase ratio of 12.
The value of kA2- can be effectively increased by inserting an amplifier between the double-balanced enclosures.

FIG. 1(C) shows the output terminal 20 taken out from the output of the delay device 16 in FIG. 1(A). Figure 1 (
In the case of B), the output terminal can be similarly taken out from the output of the delay device.

By the way, in the above explanation, the passing phase of the delay device in equation (5) is approximately 90° + 2nπ at the input signal frequency.
As mentioned above, the delay time τ is set so that There is a concern that the value may deviate from the initial setting value. Therefore, two embodiments shown in FIGS. 2 and 3 are methods for eliminating this concern by adding a compensation means to the embodiment (2). Embodiment 2 is a voltage-controlled delay device that can control the passing phase as a delay device, and is 90°+
The amount of deviation from 2nπ is detected by the output terminal of the phase comparator,
The DC component is taken out by an LPF and controlled by the voltage-controlled delay device, thereby always maintaining a desired passing phase.

Embodiment 3 operates almost the same as Embodiment 2, but
In this example, the phase difference between the two signals input to the phase comparator is maintained by inserting a voltage-controlled phase shifter in the branch on the opposite side of the delay device.

As shown in equation (10), the noise suppression effect of the present invention increases as the noise suppression effect increases. However, if τ is too large, equation (9
) in Sτ(1) no longer holds true.

Therefore, the embodiment shown in FIG. 4 is designed to enhance the suppression effect in response to a wide range of S, that is, fluctuation speed. Using multiple delay devices (or tap delay devices may be used), use a delay device with a short delay time for fast fluctuations, a delay device with a long delay time for slow fluctuations, and separate them. After detection by a phase comparator, these signals are combined (added) to suppress phase noise over a wide range of fluctuation speeds.

The present invention can also be implemented in combination with existing phase locked loops (PLLs) and automatic frequency control circuits (AFCs). The configuration is shown in FIGS. 5 and 6. In these examples, the slow variation of the oscillation frequency of vCO is PL
L or AFC, and fast fluctuations (phase noise) are suppressed by the filter of the present invention. I want to, vC
As the output of O, a stable microwave signal with low phase noise is obtained.

Note that although each of the above descriptions has described an example in which a voltage-controlled phase shifter is used, it goes without saying that a voltage-controlled delay device can be used instead.

(Effects of the Invention) As described above, according to the present invention, it is possible to provide a phase noise removal filter that can sufficiently reduce phase noise in the vicinity of a carrier and can also reduce phase noise universally even when the frequency fluctuates. As an application, by connecting the phase noise removal filter of the present invention to the output terminal of an existing signal source, even a relatively noisy microwave oscillator or synthesizer, a low-noise microwave signal source can be used. Can be configured.

[Brief Description of the Drawings] Figures 1 (A), (B), and (C) are configuration examples of embodiments of the present invention, Figure 2 is a block diagram of another embodiment of the present invention, and Figure 3 is a block diagram of another embodiment of the present invention. FIG. 4 is a block diagram of still another embodiment of the present invention, FIG. 5 is a block diagram of a low noise oscillation circuit to which the present invention is applied, and FIG. 6 is a block diagram of still another embodiment of the present invention. FIG. 7, a block diagram of another low-noise oscillation circuit to which the invention is applied, is an example of a conventional noise removal filter. (Explanation of symbols; FIG. 1) 10: Input terminal, 14: Delay detector, 18: Phase comparator, 22: Feedback path, 30: Integrating means. Voltage control phase shifter, delay device, output terminal, phase shift amount control input terminal,
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Claims (4)

[Claims] (1) A voltage controlled phase shifter connected to an input terminal, a delay detector connected to its output and feeding back the output to a phase shift amount control input terminal of the voltage controlled phase shifter, and the voltage controlled phase shifter. and an output terminal connected to the output of the delay detector or the output of the delay device of the differential detector, and removes phase noise contained in a signal applied to the input terminal. (2) The phase noise removal filter according to claim 1, wherein an integrating means is inserted in a feedback path between the output of the delay detector and the phase shift amount control input terminal. (3) The phase noise removal filter according to claim 1 or 2, wherein the delay detector includes a delay device and a phase comparator or a phase detector. (4) The phase noise removal filter according to claim 3, wherein the delay time of the delay device is controlled by the output voltage of a phase comparator or a phase detector.