JPH03120871A - Manufacturing method of thin film transistor - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a thin film semiconductor device, and in particular,
Insulated gate field effect transistor or TFT
The present invention relates to a method for forming a gate insulating film of hin Film Transistc)r).

[Prior art] In recent years, 5OI (Silicon On In
Alternatively, as the need for three-dimensional ICs, large liquid crystal display panels, high-speed, high-resolution contact image sensors, etc. increases, technology for forming high-quality gate insulating films at low temperatures has become important. Thermal oxidation method is 9
Because it is a high temperature process of about 00 to 1200°C,
(1) Elements cannot be formed on inexpensive glass substrates. (
2) Lateral diffusion of impurities; (3) Three-dimensional ICs have problems such as adverse effects (diffusion of impurities, etc.) on the underlying elements.

Currently, techniques for forming a gate oxide film using a CVD method, a photo-CVD method, a plasma CVD method, or the like are being considered.

[Problems to be Solved by the Invention] However, oxide films formed by conventional methods have problems such as low gate dielectric breakdown voltage and high interface state density. There is a theory that excellent TPT characteristics can be obtained when the material has compressive stress. However, the oxide films formed by each mCVD method have almost no stress, and the sputtering method using 02 gas as the discharge gas produces SiO2 of excellent film quality.
Although a film can be obtained, there is a problem that the film formation rate is slow.

An object of the present invention is to solve these problems and realize a field effect transistor or a thin film transistor having good transistor characteristics by forming an excellent gate oxide film.

[Means for Solving the Problems] The method for manufacturing a thin film semiconductor device of the present invention is characterized in that: (1) in the method for manufacturing an insulated gate field effect transistor, a gate insulating film is formed by a sputtering method; .

Furthermore, (2) the sputtering method is characterized in that Si is used as a target.

Furthermore, (3) the sputtering method is a two-step process in which only 02 (oxygen) gas is used as the discharge gas in the first stage, and then a mixed gas of 02 gas and Ar (argon) gas is used as the discharge gas in the second stage. It is characterized by being a sputtering method.

[Example 1 In FIG. 1(a), 1-1 is an amorphous insulating substrate 0
A quartz substrate, a glass substrate, or the like is used. 5i0
A Si substrate covered with 2 may be used. 12 when using a quartz substrate or a Si substrate covered with SiO2
It can withstand a high temperature process of 00°C, but when using a glass substrate, the softening temperature is low, so it can withstand a high temperature process of about 600°
Limited to low temperature processes below C. First, an amorphous silicon thin film 1-2 is deposited on an amorphous insulating substrate 1-1. It is desirable that the amorphous silicon thin film 1-2 is uniform, does not contain minute crystallites, and does not have any nuclei for crystal growth. The deposition method is EB (Electro
n Beam) evaporation method, sputtering method, CVD method, and optical C
There are VD method and plasma CVD method. The plasma CVD method is a method often used for producing photovoltaic elements, photodiodes, photosensitive drums, and the like. To deposit amorphous silicon thin films, silane gas (SiH4
) is diluted with helium gas (H, ) or hydrogen gas (H2) to an appropriate temperature, and a high frequency voltage is applied to decompose and deposit it. In the case of plasma CVD method, the substrate temperature is 500℃.
Films can be formed even below °C. Further, if hydrogen plasma or argon plasma treatment is performed immediately before the deposition, cleaning of the substrate surface and film formation can be performed continuously. After that, 4
Annealing is performed at 00°C to 500°C to release hydrogen from the amorphous silicon film.

Next, the silicon thin film 1-2 is grown in phase. As a solid phase growth method, furnace annealing using a quartz tube is convenient. As the annealing atmosphere, nitrogen gas, hydrogen gas, argon gas, helium gas, etc. are used. lXl0-' to l
Annealing may be performed in a high vacuum atmosphere of Xl0-III Torr. In-phase growth annealing temperature is 500℃~700℃
℃. In such low-temperature annealing, only crystal grains having a crystal orientation with a small activation energy for crystal growth grow selectively, and moreover, they grow slowly and to a large size. In FIG. 1(b), reference numeral 1-3 indicates a silicon thin film grown in a solid phase, and reference numeral 1-4 indicates a crystal grain boundary.

Next, the solid-phase grown silicon thin film 1-3 is patterned by photolithography to form an island shape as shown in FIG. 1(C).

As a sputtering method, a magnetron method is widely used in which sputtering is performed by compressing plasma near a target. Si is used as the target. In the first step from the start of sputtering, only O2 gas is used as a discharge gas to form a thin SiO2 film of excellent quality. The first layer of SiO2 film is designated as 1-5. In the second step of the sputtering process, when the first H-th SiO2 film 1-5 has been formed with a shadow of several tens to several hundreds of amps, Ar gas is mixed in the reaction chamber, and 02 gas and Ar gas are mixed as a discharge gas. The deposition rate is increased by using a mixed gas. In this manner, a second layer of SiO,+ film 1-6 is formed.

When 02 gas alone is used as the reaction gas, the film quality of 5i02 is controlled by the internal pressure in the reaction chamber and the flow rate of 02 gas. In the case of a mixed gas of O2 gas and Ar gas, the quality of the SiO2 film is controlled by changing the mixing ratio of O2 gas and Ar gas, in addition to the internal pressure and flow rate. According to such a two-step sputtering method, a dense 5102 film with a smooth surface shape can be obtained near the 5i-SiO2 interface, which has a large effect on the characteristics of thin film transistors, and after SiO2 is formed near the interface, the deposition rate is low. increase the film thickness. The substrate temperature during sputtering is several tens to hundreds of degrees Celsius.
It is. Thereafter, heat treatment may be performed at a low temperature of 600°C or lower. The formed gate oxide film becomes a finer film with fewer interface states by heat treatment.

Next, as shown in FIG. 1(f), the gate electrode 1-7
6 The gate electrode material may be polycrystalline silicon thin film, molybdenum silicide, metal film such as aluminum or chromium, or IT.
A transparent conductive film such as O or SnO2 can be used. Film forming methods include CVD, sputtering, vacuum evaporation, and the like, but detailed description thereof will be omitted here.

Subsequently, as shown in FIG. 1(g), the gate Wil-
Using 7 as a mask, impurity ions are implanted to form a source region 1-8 and a drain region 1-9 in a self-aligned manner. As the impurity, Po or AS' is used when manufacturing an Nch transistor, and B' or the like is used when manufacturing a Pcht-run lister. In addition to ion implantation, methods for adding impurities include laser doping, plasma doping, and other methods. 1-1
The arrow indicated by 0 represents the impurity ion beam. When a quartz substrate is used as the amorphous insulating substrate 1-1, a thermal diffusion method can be used. Impurity 21 degrees is
It is set to about lXl015 to lXl0''am-3.

Subsequently, as shown in FIG. 1(h), an interlayer insulating film 1-
11 is stacked. As the interlayer insulating film material, an oxide film, a nitride film, or the like is used. The film thickness may be any thickness as long as the insulation is good, but it is usually from several thousand to several micrometers. A simple method for forming the nitride film is the LPCVD method or the plasma CVD method. For the reaction, a mixed gas of ammonia gas (NH3), silane gas, and nitrogen gas, or a mixed gas of silane gas and nitrogen gas, etc. is used.

Here, hydrogen plasma method or hydrogen ion implantation method,
Alternatively, if hydrogen ions are introduced by a method such as hydrogen diffusion from a plasma nitride film, defects such as dangling bonds existing at the gate oxide film interface are inactivated. Such a hydrogenation step may be performed before laminating the interlayer insulating film 1-10.

Next, as shown in FIG. 1(i), contact holes are formed in the interlayer insulating film and the gate insulating film, contact electrodes are formed, and source electrodes 1-12 and drain electrodes 1-1 are formed.
-13. The source electrode and drain electrode are formed of a metal material such as aluminum. In this way 3
A membrane transistor is formed.

[Effect of the invention] Conventionally, the discharge gas was Ar gas alone, so the deposited S
The surface state of the iO2 film was highly dependent on the sputtering pressure, and the surface became more rough as the pressure increased. It is known that sputter damage is reduced by using 02 gas. According to the present invention, using Si as a target, 5i
Since a thin SiO2 film sputtered using 02 gas as a discharge gas is deposited near the -SiO2 interface, a SiO2 film with a very smooth surface and as dense as a thermally oxidized SiO2 film is formed near the interface. Thereafter, the SiO2 film is deposited by mixing Ar gas to increase the deposition rate, making it possible to form a gate insulating film with excellent characteristics in a short time.

The film quality of the SiO2 film can be controlled by the internal pressure during sputtering, and lowering the internal pressure results in a denser film.

By changing the mixing ratio of 02 gas and Ar gas, SiO
The composition ratio of the two films can be controlled.

SiO deposited using Ar gas alone as discharge gas
The dielectric strength voltage of two films is low at about 2 MV/cm, but by mixing O2 gas as in the present invention, the dielectric strength voltage can be significantly improved, and its value is about 7 MV/cm.
m, which is almost the same as that of the thermally oxidized SiO2 film.

5i deposited using a mixed gas of O2 gas and Ar gas
The specific resistance of C) 2 film is approximately 5×10 15 Ω·Cm, and has very excellent insulation properties comparable to that of a thermally oxidized SiO 2 film.

Since deposition can be performed at a substrate temperature of several tens to hundreds of degrees Celsius, a glass substrate with a low softening temperature can also be used.

Since it is possible to obtain a gate insulating film having properties close to those of thermally oxidized SiO2 films at low temperatures, it will greatly contribute to the development of SOI technology. The number of steps is completely unknown, 60
Since it can be manufactured using a low-temperature process of 0° C. or lower, it is possible to use a glass substrate that is inexpensive and has a low heat-resistant temperature. Even though an excellent silicon thin film can be obtained, the cost does not increase.

When a thin film transistor is made using the gate insulating film obtained according to the present invention and a large-grain polycrystalline silicon thin film, excellent characteristics can be obtained. Compared to the conventional art, the ON current of the thin film transistor increases and the OFF current decreases. In addition, the threshold voltage is also reduced, and transistor characteristics are greatly improved.

The imbalance in characteristics between the N channel and the P channel is also improved.

Since it is possible to fabricate thin film transistors with excellent characteristics on an amorphous insulating substrate, sufficient high-speed operation can be achieved even when applied to an active matrix substrate in which a driver circuit is integrated on the same substrate. Furthermore, it has great effects on reducing power supply voltage, reducing current consumption, and improving reliability.

In addition, since it is possible to manufacture by a low-temperature process at 600° C. or lower, this is highly effective in reducing the cost and increasing the area of active matrix substrates.

When the present invention is applied to a contact image sensor in which a charging conversion element and its scanning circuit are integrated on the same chip, it is possible to increase the reading speed, increase the resolution, and increase the gradation. Once high resolution is achieved, which produces this effect, it will be easier to apply it to contact type image sensors for color reading. Of course, this has great effects in reducing power supply voltage, reducing current consumption, and improving reliability.

Also, since it can be produced by a low-temperature process,
Close-contact image sensor chip can be made longer,
- A reading device for large facsimile machines such as A4 size or A3 size can be realized using a book chip. Therefore, it is possible to avoid the troublesome and unreliable technique of joining two sensor chips, and the mounting yield is also improved.

In addition to quartz and glass substrates, sapphire substrates (
A1203) Arui is MgO・A 12ch.

Crystalline insulating substrates such as BP and CaF2 can also be used.

Although the above embodiments have been explained using thin film transistors as an example, the present invention can also be applied to elements using thin films such as ordinary MOS transistors, bipolar transistors, and heterojunction bipolar transistors. Further, the present invention can also be applied to elements using S○ engineering nuclear technology, such as three-dimensional devices.

[Brief explanation of drawings]

FIGS. 1(a) to 1(i) are process cross-sectional views showing an embodiment of the present invention. 1-3; Silicon thin film 1-5; First layer 5i02 film 1-6; Second layer SiO2 film or higher

Claims (3)

[Claims] (1) A method for manufacturing a thin film semiconductor device, which is characterized in that a gate insulating film is formed by a sputtering method in the method for manufacturing an insulated gate field effect transistor. (2) The method for manufacturing a thin film semiconductor device according to claim 1, wherein the sputtering method uses Si as a target. (3) In the sputtering method, the first step is to use O as the discharge gas.
The thin film semiconductor device according to claim 1, characterized in that the method is a two-step sputtering method using only _2 (oxygen) gas and then using a mixed gas of O_2 gas and Ar (argon) gas as a discharge gas in the second step. manufacturing method.