JPH03117209A - Digital gaussian noise signal generator - Google Patents

Abstract

PURPOSE:To obtain a digital Gaussian noise signal close to the normal distribution from an M series pseudo random signal by adding an accumulation circuit with simple constitution to an M series pseudo random signal generating circuit. CONSTITUTION:An accumulation circuit 4 adds each digit of a shift register 2 to its counters 5a-5h once at each input of a clock signal. When the inputted number of clock signals reaches a proper 2's power, the value stored in counters 5a-5l of the accumulation circuit 4 is divided by 16 to obtain one sampling average value. Actually, apply of 4-bit shift to the part having an accumulated value less in weight is enough. Every time the clock signal is inputted for 16 times, one sample mean value is calculated and outputted in such a way. When the clock signal is inputted from an M series pseudo random signal generating circuit 1 outputting an N-bit length M series pseudo random signal for 2<15>-1=32767 times, the output of the sample mean value is finished. The result is a digital Gaussian noise signal close to the normal distribution.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is a method for detecting a digital noise signal that approximates a normal distribution and is used for testing digital communication lines and various digital processing devices connected to this communication line. The present invention relates to an output digital Gaussian noise signal generator.

[Prior Art] When a communication line is actually used, data values of signals transmitted through the line have a distribution close to a normal distribution. Therefore, when evaluating the quality of an analog communication line, the test is often performed using noise (Gaussian noise) whose signal amplitude has a normal distribution (Gaussian distribution). Such a Gaussian noise signal can be easily obtained by band-limiting thermal noise having constant distribution characteristics using a low-pass filter.

However, in recent years, the digitalization of communication lines has progressed, and when evaluating their quality, it is not done based on bits as in the conventional bit error rate measurement, but is carried out by evaluating the digital signal itself. It became so. Therefore, a digital Gaussian noise signal having a normal distribution equivalent to an analog Gaussian noise signal is required.

[Problems to be solved by the invention] Conventionally, as noise signals that can be generated digitally, for example,
A maximum long period sequence signal (M-sequence pseudo-random signal) using a feedback shift register was used. However, this M
As is well known, the serial pseudorandom signal has a uniform data distribution, so it cannot be said to be an accurate digital Gaussian noise signal. Therefore, it was not possible to conduct a rigorous quality evaluation.

In order to eliminate such inconveniences, a method has been proposed in which each data of the M-sequence pseudo-random signal having the uniform distribution is converted into a normal distribution using a ROM table.

However, in order to obtain a signal with high resolution, a ROM with an enormous storage capacity is required, leading to a significant increase in cost.

Further, as in the case of analog signals, it is conceivable to band-limit an M-sequence pseudo-random signal having a uniform distribution using a digital low-pass filter to obtain a Gaussian noise signal. However, as described above, in order to obtain high resolution, the scale of the digital low-pass filter increases, resulting in a significant increase in cost.

Furthermore, first, an analog Gaussian noise signal is created using the method described above, and this analog Gaussian noise signal is transferred to the A/D.
It is also conceivable to obtain a digital Gaussian noise signal using a converter. However, even in this case, the scale of the A/D converter increases, resulting in a significant increase in costs. Additionally, there remains a problem with accuracy.

The present invention was made in view of these circumstances, and
By adding an accumulation circuit with a simple configuration to the M-sequence pseudo-random signal generation circuit, it is possible to obtain a digital Gaussian noise signal that approximates a normal distribution from the M-sequence pseudo-random signal, and it is also highly accurate and compact. The object of the present invention is to provide a digital Gaussian noise signal generator that can be used to generate high-speed signals and reduce manufacturing costs.

[Means for Solving the Problems] In order to solve the above problems, the digital Gaussian noise signal generator of the present invention outputs an N-bit length M-sequence pseudo-random signal having a uniform distribution of mean m1 variance σ2. An M-sequence pseudo-random signal generation circuit that generates an M-sequence pseudo-random signal;
The average signal of these data is expressed as mean m1 variance σ2/
and an accumulation circuit that outputs a digital Gaussian noise signal that approximates a normal distribution.

Further, in another invention, a transfer circuit is provided between the M-sequence pseudo-random signal generation circuit and the accumulation circuit to randomly change the bit phase difference of the M-sequence pseudo-random signal outputted from the M-sequence pseudo-random signal generation circuit. A phase circuit is inserted.

[Action First, I will explain using the central limit theorem in statistics.

That is, according to this central limit theorem, when +X, ) is an independent random variable sequence with mean m1 variance σ2,
When we calculate the average of each data of the positive number sequence (X,) when arbitrary numbers are extracted from this random variable sequence (X, l), that is, the sample mean X, □, we get x, -1 (x 11 + X 12+ X j3+=・
+ X 1i) / k, and the set of sample averages
Pus 3. ) approximates a normal distribution with mean m1 variance σ2/k when the number k of extractions is large.

Therefore, when this central limit theorem is applied to the present invention,
The average m output from the M-sequence pseudorandom signal generation circuit
If you extract any number of data out of N data in an N-bit length M-sequence pseudorandom signal with a uniform distribution of 1 variance σ2, and calculate the average of the extracted data, The average is the one sample average X1m mentioned above.

Therefore, if each average value calculated sequentially is extracted as an average value signal, the average value signal will have the above-mentioned average m1 variance σ2/
A digital signal approximating a normal distribution with k becomes the ususian noise signal.

Figure 2 (a) shows the above-mentioned average m-128 + variance σ2-0
, N-215-1-32727 bit length is the amplitude probability density distribution characteristic of the M-sequence pseudorandom signal having a uniform distribution, and FIG. 2(b) shows the average m-128, This is the amplitude probability density distribution characteristic of a digital Gaussian noise signal with variance σ2/k=3505 and extraction number -4. Furthermore, the last figure 2 (C) shows the average m-128 and variance a 2/
k = 3046. As shown in the figure, which is the amplitude probability density distribution characteristic of a digital Gaussian noise signal with an extraction number of -16, when the extraction number k is small, the approximation to the exact integral (fi is insufficient), but if the extraction number k is, for example, When the distribution is about 16 or more, it can be considered that the distribution is approximately normal.

Furthermore, by inserting a phase shift circuit between the M-sequence pseudorandom signal generation circuit and the accumulation circuit, the bit phase difference between each piece of data input to the accumulation circuit changes. Therefore, although the mean m2 variance σ2/k does not change, the autocorrelation coefficient of the digital Gaussian noise signal becomes smaller and is approximated by noise.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a schematic configuration of a digital Gaussian noise signal generator according to an embodiment. 1 in the figure is an M-sequence pseudo-random signal generation circuit, and this M-sequence pseudo-random signal generation circuit 1 includes, for example, 15 stages of registers 2a, 2b.
, . . . Calculate the exclusive OR of the shift register 2 consisting of 2n and 2o, the output signal of the final stage register 20, and the output signal of the first stage register 2a, and apply the exclusive OR signal to the first stage. It is composed of an exclusive OR circuit 3 that applies the voltage to the register 2a. The M-sequence pseudo-random signal generation circuit 1 has an average m-128° variance σ2, for example.
N (=215-1-3276
7) Generate a bit-length M-sequence pseudo-random signal.

4 in the figure is an accumulation circuit, and in this accumulation circuit 4, 12 binary counters 5a, 5b, . . . from 0 digit (2°) to 11 digit (2”) ...547 is connected in series to 5. Then, 12 counters 5a to 5
Each counter 5a, 5b, 5 of the lower digits 2° to 27 of g
c, 5d, 5e, 5f.

The registers 2h and 2 of the shift register 2 of the M-sequence pseudo-random signal generation circuit 1 are connected to the input terminals 5g and 5h, respectively.
f, 2i, 2o, 20.2, 2c.

2m outputs are respectively input. Note that the correspondence between each counter and each register is not based on a fixed rule, but rather without any rule, which is advantageous as a noise signal generator because the correlation quantity is reduced.

Then, each output of each counter 5a to 5h is output as an 8-bit parallel digital Gaussian noise signal.

In the digital Gaussian noise signal generator having such a configuration, when one clock signal is input from a clock signal generator (not shown) to the M-sequence pseudo-random signal generation circuit 1 and the accumulation circuit 4, an M-series pseudo-random signal is generated. Each register 2h, 2f, 2 of shift register 2 of generation circuit 1
i, 2o.

The values (output data) of 2g, 2, 2c, and 2m are applied to each counter 5a, 5b, 5c, and 5d of the accumulator circuit 4.

It is added to 5e, 5f, 5g, and 5h. That is, k (-8) pieces of data X extracted from one value (variable sequence) Xo of the M-sequence pseudo-random signal are added.

Note that when a carry occurs in each counter, 1 is added to the upper counter.

Then, each time one clock signal is input, the value of each register is added to each counter of the accumulator circuit 4 once. When the number of clock signal inputs reaches an appropriate power of 2, such as 16, each counter 5a of the accumulator circuit 4
The average value, ie, one sample average X,+a, is determined by dividing the accumulated value of ~5g by 16. Specifically, the cumulative value is shifted by 4 bits to the side with less weight. As a result, the values of the high-order digit counters 5h to 5g become 0, so there is no need to extract output from these counters 5h to 5g.

In this way, every 16 times the clock signal is input, 1
sample mean X1. Calculate and output.

Then, when the aforementioned clock signal is inputted N-2''-1-32787 times, the output of the sample average X2 is finished.

Therefore, the sample average X output every 16 clocks
0 becomes a digital Gaussian noise signal that approximates a normal distribution with a mean of m-128 and a variance of cy2/-3048.

In the example, the number of extractions was set to -8 to simplify the explanation, but this number of extractions may be determined based on the bit length N of the M-sequence pseudorandom signal, the degree of approximation to the required normal distribution, etc. be done. And, as mentioned above,
If it is about k-16, it will be quite close to a normal distribution, and a digital Gaussian noise signal with a normal distribution of this order can be used sufficiently for the above-mentioned communication line quality evaluation test.

In this way, digital Gaussian noise that sufficiently approximates a normal distribution can be generated by simply adding the accumulator circuit 4, which has a simple configuration of, for example, 16 to 20 counters, to the M-sequence pseudorandom signal generation circuit 1. I can get a signal. Therefore, compared to conventional signal generation devices that require the use of large-scale ROM tables, digital low-pass filters, A/D converters, etc., the structure is greatly simplified, and the entire device can be made small and lightweight, and manufacturing costs can be reduced.

Furthermore, since digital random signals are directly converted into Gaussian noise signals using digital logic circuit elements,
Compared to conventional equipment that converts analog Gaussian noise signals into digital signals, accuracy can be significantly improved.

FIG. 3 is a block diagram showing a schematic configuration of a digital Gaussian noise signal generator according to another embodiment of the present invention.

The same parts as in FIG. 1 are given the same reference numerals.

That is, although the bit phase difference between the input data of each counter 5a to 5h of the accumulator circuit 4 is 15 bits, it is possible to provide an even larger phase difference and reduce the correlation between each signal. It is more preferable to obtain a close signal.

Therefore, in this embodiment, 15 exclusive OR circuits 7a to 7o are provided between the M-sequence pseudo-random signal generation circuit 1 that outputs the M-sequence pseudo-random signal and the accumulation circuit 4, as shown in the figure. A phase shift circuit 6 configured as shown in FIG. The phase shift circuit 6 is configured to exclude random signals having any bit phase difference other than zero phase difference or an integer multiple of one cycle from M-sequence pseudo-random signals having the same sequence (bit length)'. The logical OR circuit is a sequence (
The bit length (bit length) is kept the same as the sequence of the original M-sequence pseudorandom signal, and the bit phase difference is configured by utilizing the property that a random signal different from the above two signals is obtained.

In this example, eight systems of M-sequence pseudorandom signals with a phase difference of 2+5-1-8 & 94098 bits are obtained, and if each sequence has a phase difference of this degree, the correlation of each sequence is extremely high. becomes smaller. Therefore, the accumulator circuit 4
The correlation in the digital Gaussian noise signal output from the digital Gaussian noise signal becomes much smaller, resulting in a signal that is closer to noise.

Note that the present invention is not limited to the embodiments described above. In the embodiment shown in FIG. 1, one digital Gaussian noise signal is output every time 16 clock signals are input, but 16 M-sequence pseudo-random signal generation circuits are prepared. If the aforementioned 16 accumulations are performed using one clock signal, or if 16 accumulation circuits that can input the outputs of each of the 16 M-sequence pseudorandom signal generation circuits are prepared, one clock signal can be used. It is possible to output one digital Gaussian noise signal for each input.

In addition, in the embodiment, the number K of data to be extracted from the M-sequence pseudo-random signal outputted from the M-sequence pseudo-random signal generation circuit 1 is set to 8, and each data has 2 degrees to
Although the number of samples was accumulated with a weight of 27, the number of extractions is not limited to 8 (it goes without saying that it can be set arbitrarily).

Furthermore, in the embodiment shown in FIG. 1, if the output signal of the M-sequence pseudo-random signal generation circuit 1 is applied once to the accumulator circuit 4 with eight clock signals, each signal series is converted to the phase shift circuit shown in FIG. Similarly to the case where 6 is inserted, the respective bit phase differences are 4096 bits. However, if the number of accumulations is P, it is necessary to operate the M-sequence pseudo-random signal generating circuit 1 at a speed 8P times the desired code speed of the output digital noise signal.

[Effects of the Invention] As explained above, according to the digital Gaussian noise signal generation device of the present invention, an M-sequence pseudo-random signal generation circuit that outputs an M-sequence pseudo-random signal having a -stock distribution,
A digital Gaussian noise signal is obtained by adding a simple accumulation circuit that adds and averages an arbitrary number of data extracted from the M-sequence pseudorandom signal. Therefore, a digital Gaussian noise signal that approximates a normal distribution can be easily obtained from an M-sequence pseudorandom signal, and the entire device can be made smaller and lighter, and manufacturing costs can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a digital Gaussian noise signal generation circuit according to an embodiment of the present invention, and FIG. 2 is an amplitude probability density distribution characteristic diagram of a Gaussian noise signal for explaining the operating principle. FIG. 3 is a block diagram showing a schematic configuration of a digital Gaussian noise signal generation circuit according to another embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... M-series pseudo-random signal generation circuit, 2... Shift register, 3... Exclusive OR circuit, 4... Accumulation circuit, 5a to 5g... Counter, 6... Shifter Phase circuits, 7a to 70... exclusive OR circuits.

Claims (2)

[Claims] (1) An M-sequence pseudo-random signal generation circuit that outputs an N-bit length M-sequence pseudo-random signal with a uniform distribution of mean m and variance σ^2, and the Digital Gaussian extracts arbitrary k data out of N data of an M-sequence pseudorandom signal and approximates the average signal of these k data to a normal distribution with mean m and variance σ^2/k. A digital Gaussian noise signal generator includes an accumulation circuit that outputs a Gaussian noise signal. (2) A phase shift circuit that randomly changes the bit phase difference of the M-sequence pseudo-random signal output from the M-series pseudo-random signal generation circuit, between the M-sequence pseudo-random signal generation circuit and the accumulation circuit. 2. The digital Gaussian noise signal generator according to claim 1, wherein: