JPH03114025A - Driving method for matrix type ferroelectric liquid crystal panel - Google Patents
Driving method for matrix type ferroelectric liquid crystal panelInfo
- Publication number
- JPH03114025A JPH03114025A JP13163389A JP13163389A JPH03114025A JP H03114025 A JPH03114025 A JP H03114025A JP 13163389 A JP13163389 A JP 13163389A JP 13163389 A JP13163389 A JP 13163389A JP H03114025 A JPH03114025 A JP H03114025A
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- Japan
- Prior art keywords
- signal
- reset
- liquid crystal
- ferroelectric liquid
- scanning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims description 27
- 239000005262 ferroelectric liquid crystals (FLCs) Substances 0.000 title claims description 21
- 239000011159 matrix material Substances 0.000 title claims description 11
- 239000000758 substrate Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 16
- 239000004973 liquid crystal related substance Substances 0.000 description 9
- 230000000694 effects Effects 0.000 description 2
- 238000012935 Averaging Methods 0.000 description 1
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 239000004988 Nematic liquid crystal Substances 0.000 description 1
- 206010047571 Visual impairment Diseases 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 150000002148 esters Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004044 response Effects 0.000 description 1
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- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、強誘電性液晶を用いたマトリクス形液晶パネ
ルの駆動法に係り、特に、大画面・高速表示が良好なマ
トリクス形液晶パネルの駆動法に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for driving a matrix type liquid crystal panel using ferroelectric liquid crystal, and in particular to a method for driving a matrix type liquid crystal panel that has a large screen and high speed display. Regarding drive method.
近年、マ) IJクス形液晶パネルは大型化・高密度化
してきているが、さらに高密度化するために、強誘電性
液晶のメモリー性・高速応答性・広視角特性を利用した
マトリクス形液晶パネルが研究されている。しかし、こ
の強誘電性液晶パネルの動作原理が、通常のネマチック
液晶の電圧実効値駆動と異なり、パルスの正負の極性と
その電圧とノくルス幅により決定されるために、従来の
ネマチック液晶パネルの駆動法では動作できず、最近、
数々の強誘電性液晶パネルの駆動法が提案されている。In recent years, matrix-type liquid crystal panels have become larger and denser, but in order to achieve even higher density, matrix-type liquid crystal panels that utilize the memory properties, high-speed response, and wide viewing angle characteristics of ferroelectric liquid crystals are being developed. Panels are being studied. However, the operating principle of this ferroelectric liquid crystal panel is different from the voltage effective value drive of normal nematic liquid crystals, and is determined by the positive and negative polarity of the pulse, its voltage, and the Norculus width. It cannot be operated with the drive method of , and recently,
A number of methods for driving ferroelectric liquid crystal panels have been proposed.
マトリクス形強誘電性液晶パネルの駆動法としては、特
開昭61−94026号公報のように、従来の電圧平均
化法を少し変更した駆動法(従来例1とする)がある。As a driving method for a matrix type ferroelectric liquid crystal panel, there is a driving method (referred to as Conventional Example 1) which is a slightly modified conventional voltage averaging method, as disclosed in Japanese Patent Laid-Open No. 61-94026.
この駆@法を、走査信号と情報信号を図示した$7図を
用いて説明する。この従来例1の駆動法は、奇数フレー
ムではオン状態である%書き込みのみ、偶数フレームで
はオフ状態である白書き込みのみと、2フレームを用い
て初めて全画素を書き込むので、■ラインの書き込みに
は4パルスが必要となるために、書き込み時間が長くな
り、1画面の書換えに時間を要し、さらに書き込みから
次の書き込みまでの非選択期間が2倍に長(なるために
、表示コントラストもあまり良くなかった。This driving method will be explained using a diagram illustrating a scanning signal and an information signal. The driving method of Conventional Example 1 writes all pixels for the first time using two frames, with only % writing in the on state in odd frames and only white writing in the off state in even frames. Since 4 pulses are required, the writing time becomes longer, it takes time to rewrite one screen, and the non-selection period from one writing to the next writing becomes twice as long (this makes the display contrast too low). It wasn't good.
これらを解決するため駆動法例として特開昭62−20
4233号公報があげられる。この駆動法(従来例2と
する)を第7図〜第9図を用いて説明する。第9図は、
マトリクス形強誘電性液晶パネルの構成図であり、91
は走査電極群で、92は情報電極群である。第7図の従
来例2に示したよりに、この駆動法の走査波形はリセッ
ト信号と選択信号と非選択信号からなり、リセット信号
の電圧は選択信号の電圧より太き(なっている。To solve these problems, as an example of a driving method, JP-A-62-20
Publication No. 4233 is mentioned. This driving method (referred to as Conventional Example 2) will be explained using FIGS. 7 to 9. Figure 9 shows
91 is a configuration diagram of a matrix type ferroelectric liquid crystal panel;
9 is a scanning electrode group, and 92 is an information electrode group. As shown in Conventional Example 2 in FIG. 7, the scanning waveform of this driving method consists of a reset signal, a selection signal, and a non-selection signal, and the voltage of the reset signal is thicker than the voltage of the selection signal.
第8図は、この従来例2の8分割駆動の時系列波形図で
、83.S4はそれぞれ3行目と4行目の走査波形で、
Dlは1列月の情報波形、G31と041 !−1それ
ぞれ画素G61、G41に印加される駆動波形である。FIG. 8 is a time series waveform diagram of the 8-division drive of conventional example 2. S4 are the scanning waveforms of the 3rd and 4th lines, respectively.
Dl is the information waveform of the 1st column moon, G31 and 041! -1 is the driving waveform applied to the pixels G61 and G41, respectively.
この駆動法は、リセット期間Trで選択信号電圧より大
きいリセット信号電圧を印加することで、情報信号によ
らず必ず白にリセットした後に、選択期間Tsで黒に反
転するか、白を保持するかにより1フレームだけで全画
素を誓き込むことができる。さらに、走査電極S3に選
択信号が印加されている時間Tsで同時に、走査電極S
4にリセット信号を印加しているので、1ラインの書き
込みに要するパルス数は実質的に2パルスで済み、従来
例1の駆動法の172の書き込み時間で済むようになっ
た。In this driving method, by applying a reset signal voltage higher than the selection signal voltage during the reset period Tr, it is always reset to white regardless of the information signal, and then, during the selection period Ts, it is either inverted to black or held white. This allows all pixels to be committed in just one frame. Further, at the same time during the time Ts when the selection signal is applied to the scan electrode S3, the scan electrode S
Since the reset signal is applied to 4, the number of pulses required to write one line is essentially 2 pulses, and the writing time of 172 required by the driving method of Conventional Example 1 is now sufficient.
駆動回路が単純な従来例1では、1画面の書換えに時間
を要し、また、上述した従来例2の駆動法ではリセット
信号電圧を選択信号電圧より大きくしなければならず、
駆動電源が複雑になり、さらに液晶駆動用として市販さ
れているICの電圧レベル数を越えているので、これら
の液晶駆動用ICを使用できなかった。In Conventional Example 1 with a simple drive circuit, it takes time to rewrite one screen, and in the driving method of Conventional Example 2 described above, the reset signal voltage must be made higher than the selection signal voltage.
These ICs for driving liquid crystals could not be used because the driving power supply became complicated and the number of voltage levels exceeded the number of voltage levels of ICs commercially available for driving liquid crystals.
本発明の目的は、強誘電性液晶ノ(ネルの駆動法におい
て、1画面の書換えに要する時間を短縮でき、さらに、
電圧レベル数が少ない比較的単純な駆動回路で、市販の
液晶駆動用ICでも構成できる駆動法を提供することで
ある。The purpose of the present invention is to shorten the time required to rewrite one screen in a ferroelectric liquid crystal driving method, and further,
It is an object of the present invention to provide a driving method that can be configured using a relatively simple driving circuit with a small number of voltage levels and even a commercially available liquid crystal driving IC.
上記目的を達成させるために、本発明による走査波形は
、リセット信号と選択信号および非選択信号からなり、
リセット信号電圧と選択信号電圧は同一電圧であっても
よく、さらに、フレーム毎に各信号の極性を反転する。In order to achieve the above object, a scanning waveform according to the present invention includes a reset signal, a selection signal, and a non-selection signal,
The reset signal voltage and the selection signal voltage may be the same voltage, and the polarity of each signal is inverted every frame.
また、Nライン目に選択信号が印加されている時に、N
+1ライン目はリセット信号を印加することにより、は
とんどの画素は実質的に2パルスでの書き込みとなり、
1画面の書き込み時間を短縮できる。Also, when the selection signal is applied to the Nth line,
By applying a reset signal to the +1st line, most pixels are essentially written with 2 pulses.
The writing time for one screen can be shortened.
本発明では、従来例2と異なり、リセット信号電圧と選
択信号電圧が同一の場合、第1フレームではリセット信
号印加時の情・雑信号により、書ぎ込みが不十分となる
画素が発生する。しかし、第2フレームにおいて、極性
を反転したリセット信号と選択信号を印加することで、
書き込み不十分な画素も完全にかきこめるようになる。In the present invention, unlike Conventional Example 2, when the reset signal voltage and the selection signal voltage are the same, in the first frame, some pixels are insufficiently written due to information and noise signals when the reset signal is applied. However, in the second frame, by applying the reset signal and selection signal with reversed polarity,
Even pixels with insufficient writing can be completely written.
しかも、はとんどの画素は1フレームだけで書き込める
ため、実質的には2パルス駆動となり、従来例1の4パ
ルスを用いた駆動法よりも書き込み時間が短縮できる。Moreover, since most pixels can be written in only one frame, it is actually driven by two pulses, and the writing time can be reduced compared to the driving method using four pulses in Conventional Example 1.
以下、本発明を図面に基づいて説明する。 Hereinafter, the present invention will be explained based on the drawings.
本実施例で用いた液晶はエステル系の強誘電性液晶の混
合物で、配向はラビング法により行い、基板間距離は約
2μmである。The liquid crystal used in this example was a mixture of ester-based ferroelectric liquid crystals, and the alignment was performed by a rubbing method, and the distance between the substrates was about 2 μm.
第9図は、従来例および本発明に用いたマトリクス形強
誘電性液晶パネルの構成図である。91は走査電極群で
あり、92は情報電極群で、その中間に1から10μm
程度の強誘電性液晶が挾まれている。ここで、簡単のた
めに、2値で表示する場合、斜線で示される画素なオン
(黒)に、その他の画素をオフ(白)としである。FIG. 9 is a configuration diagram of a matrix type ferroelectric liquid crystal panel used in the conventional example and the present invention. 91 is a scanning electrode group, 92 is an information electrode group, and 1 to 10 μm between them.
A large amount of ferroelectric liquid crystal is sandwiched between them. Here, for simplicity, when displaying in binary, the pixels indicated by diagonal lines are turned on (black) and the other pixels are turned off (white).
第1図、第3図、第5図は本発明の、駆動信号の波形図
で、第2図、第4図、第6図はそれらを用いた、走査電
極数8本(1/8デユーテイ)で、1/4バイアス比の
時系列波形図例である。それぞれ、S6は3行目の走査
電極に印加する走査波形、S4は4行目の走査電極に印
加する走査波形、S5は5行目の走査電極に印加する走
査波形であり、Dlは1列目の情報電極に印加する情報
波形である。G31は画素G31に印加される波形でオ
ン状態になっており、G41は画素G41に印加される
波形でオフ状態になっている。Figures 1, 3, and 5 are waveform diagrams of drive signals according to the present invention, and Figures 2, 4, and 6 are diagrams showing the number of scanning electrodes (8 scanning electrodes) (1/8 duty cycle) using them. ) is an example of a time series waveform diagram of a 1/4 bias ratio. In each case, S6 is the scanning waveform applied to the scanning electrode in the third row, S4 is the scanning waveform applied to the scanning electrode in the fourth row, S5 is the scanning waveform applied to the scanning electrode in the fifth row, and Dl is the scanning waveform applied to the scanning electrode in the first row. This is an information waveform applied to the information electrodes of the eye. G31 is in the on state with the waveform applied to the pixel G31, and G41 is in the off state with the waveform applied to the pixel G41.
(実施例1)
第1図は、奇数フレームと偶数フレームでリセット信号
と選択信号の極性を反転させた信号例である。リセット
信号の後半のパルス極性と選択信号の前半のパルスの極
性は同一であるために、実質的には、この両パルスによ
り画素のリセットを行ない、選択信号の後半のパルスに
より書き込み4行なう。リセット信号電圧と選択信号電
圧は同一電圧とした。第2図はこの第1図の信号の時系
列波形図である。S3に選択信号が印加されている時間
Tsで、S4が同時にリセット信号が印加されており、
同様に84に選択信号が印加されている時間で85にリ
セット信号が印加されている。(Embodiment 1) FIG. 1 is a signal example in which the polarities of the reset signal and the selection signal are reversed between odd frames and even frames. Since the polarity of the second half pulse of the reset signal and the first half pulse of the selection signal are the same, the pixel is essentially reset by these two pulses, and four writing operations are performed by the second half pulse of the selection signal. The reset signal voltage and selection signal voltage were set to be the same voltage. FIG. 2 is a time-series waveform diagram of the signal shown in FIG. During the time Ts when the selection signal is applied to S3, the reset signal is applied to S4 at the same time,
Similarly, the reset signal is applied to 85 during the time when the selection signal is applied to 84.
ここで、強誘電性液晶の動作電圧について説明する。第
10図は、セル厚2μmの強誘電性液晶パネルにバA/
ス幅60 μsec、 80 μSeC,120μse
cの単一パルスを印加し、そのパルス電圧をしだいに増
加させた時に、表示が黒から白に反転した時の動作電圧
vthと、動作電圧ythxパルス幅の値を図示したも
のである。動作電圧は、パルス幅が広くなるに従い低下
し、一方、動作電圧×パルス幅の値はあまり変化しない
が、パルス幅が広い捻と逆に大きくなることがわかる。Here, the operating voltage of the ferroelectric liquid crystal will be explained. Figure 10 shows a ferroelectric liquid crystal panel with a cell thickness of 2 μm.
Width: 60 μsec, 80 μSeC, 120 μsec
This figure illustrates the values of the operating voltage vth and the operating voltage ythx pulse width when the display is reversed from black to white when a single pulse of c is applied and the pulse voltage is gradually increased. It can be seen that the operating voltage decreases as the pulse width becomes wider, and on the other hand, the value of operating voltage x pulse width does not change much, but it increases as the pulse width becomes wider.
そこで、パルス1@Ts2の時のVthは、2V0(:
Vth(4V0を満足しているとして、説明する。Therefore, Vth at pulse 1@Ts2 is 2V0(:
The following description assumes that Vth (4V0) is satisfied.
第2図における、第1フレームのリセット期間Trでは
、情報電極信号は、オンかオフかは不定であり、オフの
時のリセット期間の後半のパルスは、G31のように4
■oとなり、さらに選択期間の前半期間Tslのパルス
も加わるので、リセットパルスは6VOまたは8■。と
なり、ythをはるかに越えているので、必ずオフ状態
である白にリセットさせる。次に選択期間Ts2で画素
に印加される負の選択パルスは、印加する情報信号によ
り、オンの場合は4VOとなり、Vthを越えているの
で、黒に書き込まれる。しかし、オフの場合は、書き込
みパルスは2Voとなり、yth以下のため書き込みが
できず、リセットされた白を保持する。In the reset period Tr of the first frame in FIG. 2, it is uncertain whether the information electrode signal is on or off, and the pulse in the latter half of the reset period when it is off is 4 pulses like G31.
■o, and the pulse of Tsl in the first half of the selection period is also added, so the reset pulse is 6VO or 8■. Since it far exceeds yth, it must be reset to white, which is the off state. Next, the negative selection pulse applied to the pixel during the selection period Ts2 is 4VO when it is on, depending on the applied information signal, and since it exceeds Vth, it is written in black. However, when it is off, the write pulse is 2Vo, and since it is less than yth, writing is not possible and the reset white state is maintained.
つぎに、リセット期間Trの情報信号がオンの時のリセ
ットパルスは、G41の様に、2Voとなり、さらに情
報信号がオフの場合、選択パルスの前半期間TSIのパ
ルス電圧も2V、であり、加えると4■。となるが、先
に説明したように、パルス幅が広がっているために、パ
ネルの動作電圧xパルス幅の値も増加しているので、完
全にはリセットすることが不可能である。情報信号がオ
フ 〕時+1、選択期間Ts2のパルス’IEEは4V
。Next, when the information signal in the reset period Tr is on, the reset pulse is 2Vo, as in G41, and when the information signal is off, the pulse voltage of the first half period TSI of the selection pulse is also 2V, and is added. and 4■. However, as explained above, since the pulse width is widened, the value of the panel operating voltage x pulse width is also increased, so it is impossible to completely reset. +1 when the information signal is off, the pulse 'IEE of the selection period Ts2 is 4V
.
となるので、黒に書き込まれる。従って、第1フレーム
では選択期間Tsの情報信号がオンの全画素と、リセッ
ト期間Trの情報信号がオフでかつ選択期間Tsの情報
信号がオフの画素が書き込まれる。Therefore, it is written in black. Therefore, in the first frame, all pixels for which the information signal of the selection period Ts is on and pixels for which the information signal of the reset period Tr is off and the information signal of the selection period Ts are off are written.
第2フレームでは、リセット信号と選択信号の極性を逆
にしたことにより、選択期間Tsの情報信号がオフの全
画素と、リセット期間Trの情報信号がオンでかつ選択
期間Tsの情報信号がオンの画素が香ぎ込まれる。In the second frame, by reversing the polarity of the reset signal and the selection signal, all the pixels have the information signal of the selection period Ts off, and the information signal of the reset period Tr is on and the information signal of the selection period Ts is on. The pixels are scented.
従って、従来例2のように、完全には1フレームでは書
き込みできないが、従来例1の2フレームによる駆動法
よりは、書き込み時間が短縮でき、かつ、書き込み後の
次の選択期間までの非選択期間も短くなるので、表示コ
ントラストも増加した。Therefore, although it is not possible to write completely in one frame as in Conventional Example 2, the writing time can be reduced compared to the two-frame drive method in Conventional Example 1, and the non-selection period until the next selection period after writing can be reduced. Since the period is also shortened, the display contrast has also increased.
通常、強誘電性液晶パネルは残像現東があるために、数
回書き込み動作を行なわな(はならないが、従来例1で
は10フレームの書き込みが必要なパネルが、本発明に
よる駆動法を用いたことにより、6〜7フレームで書き
込みが完了した。Normally, ferroelectric liquid crystal panels have afterimage development, so writing operations must be performed several times, but in Conventional Example 1, a panel that required 10 frames of writing could be used with the driving method of the present invention. As a result, writing was completed in 6 to 7 frames.
(実施例2)
第3図は、実施例1の駆動波形に電圧を全く印加しない
休止期間を設けた信号例である。リセット期間、選択期
間、非選択期間をそれぞれ3分割し、最後の期間な休止
期間としである。第4図は、第3図の信号の時系列波形
図であり、休止期間があること以外は第2図と同じであ
る。第2図では、情報信号がオン−オフ−オン−オフと
繰り返した時の画素に印加される非選択期間のパルス幅
は、2XTS2になる期間があるが、休止期間を加えた
第4図では、全てTS2のパルス幅であるために、非選
択期間のメモリー状態が安定し、表示コントラストがさ
らに向上した。本実施例では、休止期間を選択期間Ts
の1/3としたが、休止期間の割合は任意に設定するこ
とができることは自明である。(Example 2) FIG. 3 is a signal example in which the drive waveform of Example 1 is provided with a pause period in which no voltage is applied. The reset period, selection period, and non-selection period are each divided into three, and the final period is a rest period. FIG. 4 is a time-series waveform diagram of the signal in FIG. 3, and is the same as FIG. 2 except that there is a pause period. In Fig. 2, the pulse width of the non-selection period applied to the pixel when the information signal repeats on-off-on-off is 2XTS2, but in Fig. 4 with the rest period added, , all have the pulse width of TS2, so the memory state during the non-selection period is stabilized and the display contrast is further improved. In this embodiment, the pause period is the selected period Ts.
However, it is obvious that the ratio of the pause period can be set arbitrarily.
(実施例3)
第5図は、第1図に示した信号を、さらに奇数走査線に
選択信号を印加する時と、偶数走査線に選択信号を印加
する時で、極性を反転させた波形例である。第6図は、
第5図の信号の時系列波形図である。リセット信号と選
択信号は走査線毎に反転しているが、同一の時間に印加
される、S6の選択信号と84のリセット信号は同一波
形となるために、駆動回路がさらに単純化され、市販さ
れている液晶パネル駆動用ICを用いて、駆動すること
ができた。(Example 3) Figure 5 shows waveforms of the signals shown in Figure 1 with the polarity reversed when applying the selection signal to the odd-numbered scanning lines and when applying the selection signal to the even-numbered scanning lines. This is an example. Figure 6 shows
6 is a time-series waveform diagram of the signal of FIG. 5. FIG. Although the reset signal and selection signal are inverted for each scanning line, the selection signal of S6 and the reset signal of 84, which are applied at the same time, have the same waveform, which further simplifies the drive circuit and makes it commercially available. It was possible to drive the LCD panel using a liquid crystal panel driving IC.
本発明によれば、電圧レベル数の少ない比較的単純な駆
動回路で構成しながら、1画面の書換えに要する時間を
短縮でき、さらに表示品位を向上させることができる。According to the present invention, the time required to rewrite one screen can be shortened, and the display quality can be further improved, while being configured with a relatively simple drive circuit with a small number of voltage levels.
第1図、第3図、第5図は本発明で用いた駆動信号の波
形図、第2図、第4図、第6図はそれぞれの駆動信号に
対応する時系列1駆動波形図、第7図は従来例の駆動信
号の波形図、第8図は第7図の時系列駆動波形図、第9
図は従来例および本発明に用いたマトリクス形強誘電性
液晶パネルの構成図、第10図は強情成性液晶パネルの
駆動電圧と印加パルス幅の関係を示すグラフである。
91・・・・・・走査電像群、
92・・・・・・情報電翫群、
G61・・・・・・画素3行1列目、
G41・・・・・・画素4行1列目。
第3図
第4図
第5図
第8図
92
第9図Figures 1, 3, and 5 are waveform diagrams of the drive signals used in the present invention, Figures 2, 4, and 6 are time series 1 drive waveform diagrams corresponding to the respective drive signals, and Fig. 7 is a waveform diagram of the drive signal of the conventional example, Fig. 8 is a time series drive waveform diagram of Fig. 7, and Fig. 9 is a waveform diagram of the drive signal of the conventional example.
The figure is a configuration diagram of a matrix type ferroelectric liquid crystal panel used in the conventional example and the present invention, and FIG. 10 is a graph showing the relationship between the driving voltage and the applied pulse width of the ferroelectric liquid crystal panel. 91... Scanning image group, 92... Information cable group, G61... Pixel 3rd row, 1st column, G41... Pixel 4th row, 1st column. eye. Figure 3 Figure 4 Figure 5 Figure 8 Figure 92 Figure 9
Claims (3)
の情報電極が形成された第二基板との間に強誘電性液晶
を挾持してなるマトリクス形強誘電性液晶パネルの駆動
法において、1走査ライン毎に印加する走査波形は、前
記両電極間に形成された画素の初期状態を白または黒の
いずれか一方の状態にする正負1組のリセット信号と、
情報電極から印加される情報信号に応じて前記画素を黒
または白のいずれかに反転させる正負一組の選択信号、
および非選択信号からなり、かつ、前記リセット信号お
よび選択信号を一定フレーム毎に正負の極性を反転させ
た波形であり、各走査ラインにおいて、Nライン目に前
記走査波形の選択信号を印加している時に、N+1ライ
ン目は前記走査波形のリセット信号を印加して駆動する
ことを特徴とするマトリクス形強誘電性液晶パネルの駆
動法。(1) Driving a matrix type ferroelectric liquid crystal panel in which ferroelectric liquid crystal is sandwiched between a first substrate on which a plurality of scanning electrodes are formed and a second substrate on which a plurality of information electrodes are formed. In the method, the scanning waveform applied for each scanning line includes a set of positive and negative reset signals that sets the initial state of the pixel formed between the two electrodes to either white or black;
a set of positive and negative selection signals for inverting the pixel to either black or white according to an information signal applied from an information electrode;
and a non-selection signal, and has a waveform in which the positive and negative polarities of the reset signal and selection signal are reversed every fixed frame, and in each scanning line, the selection signal of the scanning waveform is applied to the Nth line. 1. A method for driving a matrix type ferroelectric liquid crystal panel, characterized in that when the N+1th line is driven by applying a reset signal of the scanning waveform.
信号に、表示状態を保持するための休止信号を付加した
ことを特徴とする請求項1記載のマトリクス形強誘電性
液晶パネルの駆動法。(2) A method for driving a matrix type ferroelectric liquid crystal panel according to claim 1, characterized in that a pause signal for maintaining the display state is added to the reset signal, selection signal, and non-selection signal of the scanning waveform. .
走査ライン毎に反転して印加することを特徴とする請求
項1または請求項2のマトリクス形強誘電性液晶パネル
の駆動法。(3) The method for driving a matrix type ferroelectric liquid crystal panel according to claim 1 or 2, characterized in that the polarities of the reset signal and the selection signal of the scanning waveform are reversed for each scanning line.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13163389A JP2770981B2 (en) | 1989-05-26 | 1989-05-26 | Driving method of matrix type ferroelectric liquid crystal panel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13163389A JP2770981B2 (en) | 1989-05-26 | 1989-05-26 | Driving method of matrix type ferroelectric liquid crystal panel |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH03114025A true JPH03114025A (en) | 1991-05-15 |
JP2770981B2 JP2770981B2 (en) | 1998-07-02 |
Family
ID=15062615
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13163389A Expired - Fee Related JP2770981B2 (en) | 1989-05-26 | 1989-05-26 | Driving method of matrix type ferroelectric liquid crystal panel |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2770981B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008070627A (en) * | 2006-09-14 | 2008-03-27 | Citizen Holdings Co Ltd | Memory liquid crystal display device |
-
1989
- 1989-05-26 JP JP13163389A patent/JP2770981B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008070627A (en) * | 2006-09-14 | 2008-03-27 | Citizen Holdings Co Ltd | Memory liquid crystal display device |
Also Published As
Publication number | Publication date |
---|---|
JP2770981B2 (en) | 1998-07-02 |
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