JPH0310245B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an equivalent capacitance circuit that uses a small capacitance and an active element to accurately obtain a charging curve similar to that obtained when a large capacitance is used. It is something.

[Prior art]

FIG. 1 shows a conventional charging circuit, and FIG. 2 shows an explanatory diagram of the operation of the circuit.

When a signal as shown in FIG. 2a is input to the base of the transistor Q1 and the transistor Q1 is turned from the ON state to the OFF state, the capacitor C is charged with the current I from the constant current source 10, and the output B is as follows.
A charging curve with an I/C slope as shown in FIG. 2b is obtained. Here, since the capacitor C has a capacity of at most 30 PF in an integrated circuit, it is not possible to obtain a curve with a gentle slope unless the current I is made small. However, if the current I is made small, the circuit becomes complicated, and there is also the problem that the input impedance of the circuit connected after the output B must be increased.

[Summary of the invention]

The present invention has been made in view of these points,
By connecting a capacitor between two transistors constituting a current mirror circuit and making the capacitance appear larger by using the ratio of the currents flowing through the two transistors, the capacitance can be made to have a relatively large constant. It is an object of the present invention to provide an equivalent capacitance circuit that can accurately obtain a gentle charging curve even when charging with current.

[Embodiments of the invention]

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 3 shows an equivalent capacitance circuit according to an embodiment of the first invention of the present application. In the figure, Q1 is a first transistor whose base and collector are both connected to input A, and Q2 is a transistor whose collector is connected to output B. To,
Also, a second transistor whose base and emitter are commonly connected to the base and emitter of the transistor Q1, respectively.
The emitter area ratio of the first and second transistors Q1 and Q2 is 1:n. Further, C is the transistor Q1,
A capacitor connected between both collectors of Q2,
IO is a constant current source. Here, the signal sent from input A is in a high level state and transistor Q
2 is brought into a sufficiently saturated state, and the transistor Q2 is brought into a high impedance state in a low level state.

Next, the operation will be explained.

First, when the signal from input A is at a high level, transistor Q2 is saturated, so the voltage at output B is close to ground potential. On the other hand, when the signal from input A becomes low level as shown in Figure 4a, charging of capacitor C starts, and output B
The voltage begins to rise as shown in FIG. 4b.

Here, transistor Q1 and transistor Q2
constitutes a current mirror circuit, and assuming that the collector current of the transistor Q1 is 1, the collector current of the transistor Q2 is n from the ratio of the emitter sizes of both transistors. Therefore, when the capacitor C is charged with a current of 1, a current of n flows through the collector of the transistor Q2. In other words, this means that the current I is divided into the capacitor C side and the transistor Q2 side at a ratio of 1:n. That is, the current flowing to the capacitor C side is I/(n+1).

Therefore, as shown in FIG. 4b, the output B has a charging curve with a slope of I/C(n+1),
This means that the capacitor capacity is effectively multiplied by (n+1). Here, since the area ratio of the emitters of each transistor Q1 and Q2 can be obtained with high precision, the charging curve can be determined with high precision.

FIG. 5 shows an embodiment of the second invention of the present application, which in addition to the circuit shown in FIG. A third transistor Q3 is provided as a connected emitter follower circuit.

In this example circuit, as in the example circuit shown in FIG. 3 above, the capacitor capacity is effectively (n+1).
In addition, since the emitter follower circuit Q3 also corrects the base currents of the transistors Q1 and Q2, the accuracy of the charging curve can be further improved.

In addition, FIGS. 6 and 7 are the third and third parts of the present application, respectively.
This shows an embodiment of the fourth invention, in which a current mirror circuit is further connected to the collector of the transistor Q1 in the embodiment circuits of FIGS. 3 and 5, respectively.

That is, in FIG. 6, Q5 and Q6 are the third and fourth transistors constituting the current mirror circuit, and the bases and emitters of the transistors Q5 and Q6 are commonly connected, respectively, and the commonly connected base capacitor At C, the commonly connected emitter is connected to the collector of the transistor Q1, and the emitter area ratio is 1:m (m>1). Further, the collector and base of the transistor Q5 are both connected to the input A, and the collector of the transistor Q6 is connected to the current.

Further, in FIG. 7, Q5 and Q6 are current mirror circuits having the same configuration as the embodiment circuit shown in FIG. 6 above.

In both the embodiment circuits shown in FIGS. 6 and 7, the current flowing to the capacitor C side is the I/C
{n(m+1)+1}. Therefore, the capacitance of the capacitor C is effectively multiplied by {n(m+1)+1}, and a charging curve with a gentler slope is obtained.

[Effects of the Invention] As described above, according to the first to fourth inventions of the present application, a capacitor is connected between two transistors having a predetermined emitter area ratio constituting a current mirror circuit, and the capacitor is Since the charging current to is made smaller in accordance with the emitter area ratio, the above capacity can be increased in appearance, and even when charging with a large constant current, the charging curve can be made gentler. . Further, according to the second and fourth inventions of the present application, an emitter follower circuit is connected to the base of the transistor constituting the current mirror circuit to correct the base current, so that the charging curve can be made gentle. At the same time, there is an effect that the accuracy can be improved.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional charging circuit, FIG. 2 is an explanatory diagram of its operation, and FIG. 3 is a circuit diagram of a charging circuit to which an equivalent capacitance circuit according to an embodiment of the first invention of the present application is applied. FIG. 4 is an explanatory diagram of its operation, FIG. 5 is a diagram showing an embodiment of the second invention of the present application, FIG. 6 is a diagram showing an embodiment of the third invention of the present application, and FIG. 7 is a diagram showing an embodiment of the third invention of the present application. It is a figure which shows one Example of 4th invention. Q1...first transistor, Q2...second transistor, IO...constant current source, C...capacitance,
Q3... Emitter follower circuit, Q5... Third transistor, Q6... Fourth transistor. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] 1. A first base and an emitter, each of which is connected in common and whose emitter area ratio is 1:n (n>1);
a current mirror circuit comprising a second transistor and having the collector and base of the first transistor connected; a constant current source connected to the collector of the second transistor; An equivalent capacitance circuit characterized by comprising a capacitor connected between both collectors. 2. The first base and emitter are connected in common and the emitter area ratio is 1:n (n>1).
a current mirror circuit consisting of a second transistor;
a constant current source connected to the collector of the second transistor; a capacitor connected between the collectors of the first and second transistors;
An equivalent capacitance circuit comprising an emitter follower circuit whose output is connected to the collector of the transistor and the base of the first and second transistors. 3. The first base and emitter are commonly connected and the emitter area ratio is 1:n (n>1);
a first current mirror circuit comprising a second transistor and having the collector and base of the first transistor connected; a constant current source connected to the collector of the second transistor; The capacitor connected to the collector of the first transistor, the base, and the emitter are each commonly connected, and the common connection base is connected to the other end of the capacitor, and the common connection emitter is connected to the collector of the first transistor, and the emitter area is Ratio is 1:m
(m>1), the collector and base of the third transistor are connected, and the collector of the fourth transistor is connected to a power supply. An equivalent capacitance circuit characterized by comprising: 4. The first base and emitter are commonly connected and the emitter area ratio is 1:n (n>1);
a first current mirror circuit including a second transistor; a constant current source connected to the collector of the second transistor; a capacitor having one end connected to the collector of the second transistor; An emitter follower circuit whose output is connected to the bases of the first and second transistors at the other end of the capacitor, the base and the emitter are respectively commonly connected, and the common connection base is connected to the input of the emitter follower circuit. is connected to the collector of the first transistor and has an emitter area ratio of 1:m (m>1).The collector of the third transistor is connected to the base of the fourth transistor. and a second current mirror circuit in which the collector of the transistor is connected to a power supply.