JPH0296987A - Digital sound data recording method - Google Patents

Abstract

PURPOSE:To easily discriminate the channel to be used for reproduction at the time of reproduction by recording digital sound data of plural channels on a tape in different recording patterns during the 1st and 2nd field periods together with symbols for discriminating the 1st and 2nd field periods from each other. CONSTITUTION:Sounds of channel 1 to 4 are mixed at a mixing section 5 after the sounds are converted into digital data by means of A/D converter 1 to 4, inputted to a field memory 6, and the data of one field period of each sound data are stored. When an error correcting code producing section 7 completes error correction, readout of the sound data from the memory 6 is started, but the data are recorded by 1/3 of 1-field period for each channel at every paired tracks. Readout addresses from the memory 6 are decided by means of signals from a frame start input terminal 9 in the order of channel 1 to 4 in the 1st field period and channel 4 to 1 in the 2nd field.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to the recording of digital audio data in a digital VTR.

BACKGROUND OF THE INVENTION Consider a composite digital VTR that directly digitizes and records an NTSC system composite signal. The recording head is a pair of two heads and records two tracks at a time. The cylinder is 3 of a typical VTR.
It is assumed that the rotation is 5400 times/minute, which is double the rotation.

In this case, as shown in FIG. 3, one field of video signals is divided into six tracks and recorded.

When recording, for example, 4 channels of audio at the same time as a video signal, the digital audio data of each channel is divided into 6 parts and recorded in units of 2 pairs of tracks, as shown in Figure 3 above. A method has been considered in which the order of the images is reversed and the images are recorded so as to sandwich the video recording period.

Problems to be Solved by the Invention As shown in Fig. 3, the recording pattern on the tape is such that the recording pattern of each audio channel changes alternately in field units, and as shown in Fig. 3, (a), (b) ) There are two patterns. For this reason, there is a problem in that the channel of the digital audio data being reproduced cannot be identified unless it is determined whether a field with a shira pattern is being reproduced during reproduction.

SUMMARY OF THE INVENTION In view of the conventional problems, the present invention makes it possible to easily identify fields during reproduction and to identify channels of reproduced digital audio data.

Means for Solving the Problems The present invention is a recording method for recording multiple channels of digital audio data on a helical gearing digital video tape recorder (hereinafter referred to as digital VTR), comprising:
Regarding the two field periods constituting one frame of the video signal, the recording pattern of the digital audio data on the tape in the first field period is always recorded in a predetermined first recording pattern, and the recording pattern in the second field period is Digital audio data is recorded so that the recording pattern on the tape is always a second recording turn different from the first recording pattern, and when audio data is recorded in each field, a signal is used to identify the two fields. It is characterized by recording.

According to the present invention having such characteristics, digital audio data of a plurality of channels is recorded on the tape in different recording patterns in the first field period and the second field period, and simultaneously in the first field period and the second field period. Alternatively, a symbol identifying the second field will be recorded. Therefore, during reproduction, these digital audio signals are read out, and the recorded patterns are identified based on the field information to restore the original audio data for each channel.

Example FIGS. 1 and 2 show block diagrams of the recording circuit.

In Figure 1, 1 is the audio data of channel 1
2 is the A/D converter for channel 2, 3 is the A/D converter for channel 3, 4 is the A/D converter for channel 4, and 5 is the A/D converter for channel 4. 6 is a field memory that holds data for one field period of four channels of digital audio data; 7 is a first-order error correction code generator;
8 is an address generation section, 9 is a frame start signal input terminal, and 10 is a digital audio data output terminal.

In FIG. 2, 11 is a digital video data input terminal, 12 is a digital audio data input terminal to which the output shown in FIG. is the modulation section, 17
1 is a recording section, and 18 is a frame signal input terminal.

Next, the operation of this embodiment will be explained.

When recording, the audio from channel 1 to channel 4 is
After being converted into digital data by A/D converters 1 to 4, it is mixed in a time division manner from channel 1 to channel 4 by mixer 5 and input to field meter 6. In the field memory 6, one of the input digital audio data from channel 1 to channel 4 is stored.
Stores data for field duration.

The error correction code generator 7 reads out 8 bytes of data from the field memory 7 and generates 8 symbols (1 symbol is 1 symbol).
A first-order error correction code (byte) is generated and written to the field memory 7.

When the generation of the error correction code is completed, the field memory 7
Digital audio data (including primary error correction code)
Start reading. At this time, as shown in the digital audio recording pan in FIG. 3, 1/3 of the data for one field period is recorded for each channel on each pair of tracks.

The read address is generated by the frame start signal inputted from the frame start input terminal 9 so that reading of the digital audio data of the first field period in the two fields constituting the frame starts from channel 1 for each frame. . Therefore, the first
The first paired track of the field period digital audio data is channel 1. 2. 3. 4, the next paired track is channel 4. 3. 2. 1, the last paired track is channel 1. 2. 3. The data are read out from the field memory 6 in the order of 4. Also, for the digital audio data in the second field period, the first paired track is channel 4. 3. 2. In order of 1,
The next pair of tracks is channel 1. 2. The tracks are read out from the field memory 6 in the order of 3°4 and the last paired track is in the order of channels 4 and 3°2.1.

The read digital audio data including the primary error correction code is inputted from the digital audio data input terminal 12 shown in FIG. The signal is input to the signal ID adding section 14.

The synchronization signal ID addition unit 14 treats two sub-blocks of digital audio data (including the primary error correction code) consisting of 85 bytes as one block, and generates a synchronization signal of 2 bytes and an ID of 2.
Bytes are added. As for the ID, for example, block numbers within one frame period are sequentially added to the first half byte. In the latter half, a field number is added to identify the field to be recorded. For example, when the least significant bit is 0, the field number represents the first field within one frame, and when it is 1, the field number represents the second field, and is added based on the frame signal input from the frame signal input terminal 18.

After the synchronization signal ID is added, the error correction code addition unit 15
8 for two 85-byte subblocks of data.
A secondary error correction code for the symbol is added and output to the modulation section 16. At this time, one block has the configuration shown in FIG.

After digital modulation is performed in the modulation section 16, the recording section 17 records the signal onto a tape.

Next, FIGS. 5 and 6 show block diagrams of the reproducing circuit of this embodiment. In FIG. 5, 19 is a reproduction section, 20 is a demodulation section, 21 is an error correction section, 22 is a switch, 23 is a digital audio data output terminal, and 24 is a digital video data output terminal. In FIG. 6, 34 is a digital audio data input terminal, 25 is a latch, 26 is a field memo 1c, 27 is an address generation section, 28 is an error correction section, 2
9 is a switch, and 30, 31, 32, and 33 are D/A converters.

The data reproduced by the reproduction section 19 is demodulated by the demodulation section 20 and then input to the error correction section 21 .

The error correction unit 21 uses a secondary error correction code to correct errors in two subblocks within the block shown in FIG. After error correction, the data is input to switch 22.

The switch 22 outputs digital video data from a digital video data output terminal 23 and outputs digital audio data from a digital audio data output terminal 24.

FIG. 7 shows the structure of one block of digital audio data inputted from the digital audio data input terminal 34. A 2-byte ID of 185-byte data (including a primary error-correcting code), an 8-byte secondary error-correcting code, and the following two sub-blocks are input as one block.

The ID part of the input digital audio data block is latched by the latch 25, and the address generation unit 27 generates a write address based on the block number and the least significant bit of the field number, and the data in the input digital audio data block is latched by the latch 25. Only the original part is written to the field memory 26. At this time, the latched block number determines which block of digital audio data in one field period the input digital audio data block is, and depending on whether the least significant bit of the field number is 0 or 1, the input digital audio data block is It is possible to know whether the data block is data in the first field period or data in the second field period. By separating the fields into HI3, it becomes possible to identify the channel of the input digital audio data, and it becomes possible to store it in a predetermined area of the field memory 26.

That is, if the data is for the first field period, channel 1. 2. 3. 4. 4. 3. 2. 1
．． 1゜2, 3. Data for 1/3 field period is inputted in the order of 4. Also, if the data is for the second field period, channel 4. 3. 2゜L 1. 2. 3. 4. 4. 3. 2. 1
are input in this order.

The digital audio data and primary error correction code read from the field memory 26 are sequentially input to the error correction section 28.

After the error correction unit 28 performs error correction processing using the primary error correction code, the digital audio data is sequentially transferred to the switch 2.
9.

The switch 29 distributes the input digital audio data to channels 1 to 4, and sends each D
/A converters 30 to 33.

The D/A converters 30 to 33 convert the input digital audio data of each channel into an analog signal, and then output the analog signal.

As mentioned above, of the two field periods that constitute one frame during recording, the recording pattern of digital audio data in the first field period is the pattern shown in FIG. 3(a), and the second The recording pattern of the digital audio data for the field period is as shown in FIG. This makes it possible to identify the channel of the reproduced digital audio data.

Effects of the Invention Therefore, according to the present invention, the first,
By storing the audio data in different patterns in the second field, it is possible to detect from which field the sound j:f data was read based on the identification signal during playback.

Therefore, it is possible to easily and reliably separate the audio data of a plurality of channels based on this.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a recording circuit in one embodiment of the present invention, FIG. 2 is a block diagram of a recording circuit in this embodiment,
3 is a recording pattern diagram thereof, FIG. 4 is a data block diagram thereof, FIG. 5 is a block diagram of a reproducing circuit in this embodiment, and FIG. 6 is a block diagram of a reproducing circuit in this embodiment,
FIG. 7 is a reproduction data block diagram. 1-4... A/D converter, 6... Field memory, 8... Address generation unit, 14.
...Additional part from the synchronization signal, 25...Latch,
26...Field memory, 27...Address generation section, 30-33...I)/A converter. Name of agent: Patent attorney Shigeko Kurino

Claims (2)

[Claims] (1) A recording method for recording multiple channels of digital audio data on a helical scan digital video tape recorder (hereinafter referred to as digital VTR), in which the first field period is The recording pattern of digital audio data on the tape is always recorded to be a predetermined first recording pattern, and the recording pattern of digital audio data on the tape during the second field period is always the same as the first recording pattern. A digital audio data recording method, characterized in that recording is performed so as to have a different second recording pattern, and at the time of recording audio data in each field, a signal for identifying the two fields is recorded. (2) For each channel, digital audio data for one field period is divided into multiple blocks, and each block is recorded with a synchronization signal, block number, and error correction code, and the first and second fields are distinguished. 2. The digital audio data recording method according to claim 1, wherein the digital audio data recording method further comprises simultaneously adding and recording signals.