JPH0290634A - Bonding pad of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the time required for the input and correction of coordinate by a method wherein the register reference marks comprising slits or projections are provided on bonding pads or peripheral parts thereof corresponding to the alignment cross mark of a wire bonder. CONSTITUTION:A semiconductor element 1 is formed of bonding pads 2 and inner wirings. Pad leading-out wirings 3 connecting the bonding pads 2 to the inner wirings are formed similarly to the bonding pads 2. Slits 4-1 to 4-3 are simultaneously formed with the bonding pads 2 and the pad leading-out wirings 3. The slit 4-1 is provided opposite to the pad leading-out wirings 3 while the slits 4-2, 4-3 are respectively provided on both sides holding a line connecting the pad leading-out wirings 3 to the slit 4-1. The accurate bonding process can be performed by coordinate inputting so that the center of a register cross mark 5-1 may be aligned with the center of the bonding pads 2. In such a constitution, the pad leading-out wirings 3, the slits 4-1 to 4-3 can be used as the reference marks of the bonding coordinates input positions.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bonding pad for a semiconductor device, and particularly to the shape of a bonding pad for performing wire bonding at an accurate position.

[Conventional technology]

A bonding pad of a conventional semiconductor device has a shape of a parallelogram, a circle, or a shape similar thereto.

[Problem to be solved by the invention]

The bonding pads of the conventional semiconductor devices described above have a shape of a parallelogram, a circle, or a similar shape, so bonding coordinate input is performed by self-teaching (
When manually inputting coordinates one by one, it is difficult to accurately input the center or target position of hundreds of bonding pads, which causes bonding position deviation and a decrease in yield. Another drawback is that it takes a lot of time to input and correct coordinates.

[Means to solve the problem]

The present invention provides, in a bonding pad of a semiconductor device,
The bonding pad has, on its periphery, an alignment reference mark consisting of a slit or a protrusion, corresponding to the positioning cross mark of the wire bonder.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1(a) is a plan view of the first embodiment of the present invention,
FIG. 1(b) is a partially enlarged view of FIG. 1(a).

The semiconductor element 1 has bonding pads 2 and internal wiring (not shown) formed by a known semiconductor manufacturing technique. The pad lead-out wiring 3 connects the bonding pad 2 and the internal wiring, and is formed in the same manner as the bonding pad 2. Slits 4-1 to 4-3 are several μm to several tens of μm
It is formed simultaneously with the bonding pad 2 and the pad lead-out wiring 3 with a size of m. A slit 4-1 is provided facing the pad lead-out wiring 3, and slits 4-2 and 4-3 are provided on both sides of a straight line connecting the pad lead-out wiring 3 and the slit 4-1.

Figure 2 shows the positional relationship between the bonding pad 2, the slits 4-1 to 4-4, and the positioning cross marks 5-1 and 5-2 on the CR7 screen of the bonder when bonding coordinates are input. By inputting the coordinates so that the center of the bonding pad 2 becomes the center of the bonding pad 2, accurate bonding becomes possible. That is, the pad lead wiring 3 and the slits 4-1 to 4-3 can be used as reference marks for the bonding coordinate input position.

FIG. 3 is a plan view for explaining the second embodiment of the present invention. The protrusion 6-1 is provided as a first reference mark at a position facing the pad lead-out wiring, and a pair of protrusions 6-2
．． 6-3 are formed as a second reference mark and a third reference mark at positions shifted by an arbitrary distance from the center in the vertical direction.

In this embodiment, since the reference mark is made of a projection, the bonding area can be increased compared to providing a slit. Furthermore, since the bonding coordinate input position can be arbitrarily selected, there is an advantage that more flexible design can be performed in relation to internal wiring and internal elements.

In the above embodiments, the shapes of the bonding pads are rectangular, but other shapes such as parallelograms, circles, etc., or a combination thereof may also be used. Similarly, the slits and protrusions may also be formed in other shapes.

〔Effect of the invention〕

As described above, the present invention has the effect of shortening the bonding seat ring input time and reducing bonding position deviation by forming a reference mark that is a target at the time of bonding seat ring input on the bonding pad of a semiconductor element.

[Brief explanation of the drawing]

FIG. 1(a) is a plan view for explaining the first embodiment of the present invention, FIG. 1(b) is a partially enlarged view of FIG. 1(a), and FIG. 2 is for explaining the bonding operation. FIG. 3 is a plan view for explaining the second embodiment. 1... Semiconductor element, 2... Bonding pad, 3
...Pad extraction wiring, 4-1 to 4-3...Slit, 5...Positioning cross mark, 6-1 to 6-3
···protrusion.

Claims (1)

[Claims] A bonding pad for a semiconductor device, wherein the bonding pad has an alignment reference mark made of a slit or a protrusion on its periphery, corresponding to a positioning cross mark of a wire bonder. .