JPH0279627U - - Google Patents
Info
- Publication number
- JPH0279627U JPH0279627U JP15998788U JP15998788U JPH0279627U JP H0279627 U JPH0279627 U JP H0279627U JP 15998788 U JP15998788 U JP 15998788U JP 15998788 U JP15998788 U JP 15998788U JP H0279627 U JPH0279627 U JP H0279627U
- Authority
- JP
- Japan
- Prior art keywords
- volume
- down counter
- register
- operated
- volumes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 3
Description
第１図は本考案のパルスデータ発生機構の一実
施例を示したもの、第２図は従来のパルスデータ
発生機構の一実施例を示したものである。
Ｖ１，Ｖ２，Ｖ３……ボリユーム、Ｓ１……Ａ
電源、Ｓ２……Ｂ電源、Ｓ３……Ｃ電源、Ｃ′…
…アツプダウンカウンタ、Ｐ′……処理回路、Ｍ
１，Ｍ２，Ｍ３……メモリ、Ｌ……操作ボリユー
ム指定レジスタ、ＯＲ１，ＯＲ２，ＯＲ３，ＯＲ
ｕ，ＯＲｄ……オア回路。
FIG. 1 shows an embodiment of the pulse data generation mechanism of the present invention, and FIG. 2 shows an embodiment of the conventional pulse data generation mechanism. V 1 , V 2 , V 3 ... volume, S 1 ... A
Power supply, S2 ...B power supply, S3 ...C power supply, C'...
...up-down counter, P'...processing circuit, M
1 , M 2 , M 3 ... Memory, L ... Operation volume specification register, OR 1 , OR 2 , OR 3 , OR
u, ORd...OR circuit.
Claims (1)
中、操作しているボリユームからの一回の操作に
より発生したパルス数をその回転方向に応じてア
ツプ若しくはダウンカウントする一個のアツプダ
ウンカウンタ、操作しているボリユームを指定す
る信号を発生するレジスタ、上記各パルス発生用
ボリユームの数に対応した数のメモリを有し、上
記レジスタにより指定されたボリユーム専用のメ
モリに上記アツプダウンカウンタのカウント値を
それまでに蓄えたカウント値に加えると同時に、
上記アツプダウンカウンタのカウント値をクリア
させる処理回路を備えたパルスデータ発生機構。 A plurality of pulse generation volumes, one up-down counter that counts up or down the number of pulses generated by one operation from the volume being operated, depending on the direction of rotation, and the volume being operated. It has a register that generates a signal specifying a signal, and a number of memories corresponding to the number of volumes for each pulse generation described above, and stores the count value of the up-down counter in the memory dedicated to the volume specified by the register. At the same time, add it to the counted value,
A pulse data generation mechanism equipped with a processing circuit that clears the count value of the up-down counter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15998788U JPH0279627U (en) | 1988-12-09 | 1988-12-09 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15998788U JPH0279627U (en) | 1988-12-09 | 1988-12-09 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0279627U true JPH0279627U (en) | 1990-06-19 |
Family
ID=31441676
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15998788U Pending JPH0279627U (en) | 1988-12-09 | 1988-12-09 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0279627U (en) |
-
1988
- 1988-12-09 JP JP15998788U patent/JPH0279627U/ja active Pending
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