JPH0278222A - Formation of fine electrode - Google Patents

Abstract

PURPOSE:To control a width of a recessed part using an insulating film without causing a charging-up phenomenon by a method wherein a metal film is formed on the insulating film, a resist layer is formed on this metal film and an opening is formed by irradiation with an electron beam. CONSTITUTION:An insulating film layer 2 is formed on a wafer substrate 1. Then, a metal film 3 is formed on the layer 2. In succession, a resist 4 for electron beam use is coated. This layer structure is drawn directly by using an electron beam. The irradiated electron beam penetrates the inside of the resist 4 and reaches the film 3 while the resist 4 is being exposed to light. An electron which has reached the film 3 flows out to the outside of the substrate 1 from a ground needle coming into contact with the film 3; it is possible to avoid a charging-up of the resist 4. After that, the film 3 and the film 2 which have been exposed by using the resist 4 as a mask are etched; a recessed part 5 is formed. Then, a metal is evaporated and lifted off; a gate 6 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to fine pattern formation using charged particle beam exposure.

(Prior Art) When generally forming fine patterns in semiconductor devices, the most easily used technique at present is resist patterning using electron beam exposure. That is, this is a method in which a resist layer for electron beams is formed on a substrate, and a photosensitive pattern is formed by directly writing an electron beam narrowed to minute dimensions on the resist layer, and then developed. With this method, if only a resist pattern is used, the current size is 1/4 μm.
It has now become possible to obtain fine patterns of the same size. By performing various post-processes using this resist as a mask, various electrode structures in semiconductor devices can be formed.

Electron beam exposure machines can be broadly divided into two types.

One is the point beam exposure machine, which narrows down the electron beam into a fine spot and draws a pattern using that spot, and the other uses a shutter to make the electron beam into a rectangular pattern of an appropriate size according to the pattern to be exposed. It is a [variable beam type exposure machine] that shapes and draws. The former is suitable for forming fine patterns of 1/4 pm or less, and the latter can increase exposure speed, so high throughput can be expected.

In compound semiconductors, the formation of fine gates clearly reflects the high frequency characteristics, and this method using electron beam exposure is particularly important.

The easiest method is probably the resist lift-off method. In other words, this is a method of forming electrodes by vapor depositing and lifting off gate metal using a patterned resist as a mask. This is because once the conditions are set, a high yield can be expected, and furthermore, it can be expected that fine electrodes can be formed with good uniformity without damaging the semiconductor substrate. Currently, fine gates are partially formed by a resist lift-off method using a point-beam electron beam exposure system (P, C, Chao et al; 1999).
87 in IEDMTech, Dig,, PP41
0 others). Device structures using this resist lift-off method generally employ a recessed structure in which the wafer cap layer is a highly doped layer with the intention of reducing source resistance and increasing gate-to-ohmic breakdown voltage.

(Problem to be Solved by the Invention) When forming a gate using the resist lift-off method described in "Prior Art", depending on the resist used or the exposure conditions, the gate metal and the process edge may become close to each other. . Although this is useful for reducing the source resistance depending on the substrate structure, the parasitic capacitance due to the substrate etch and gate metal cannot be ignored and has an effect on the device characteristics. Especially 1
This problem becomes noticeable when forming a gate with a diameter of /4 pm or less.

Therefore, in order to avoid this problem, an oxide film is formed between the resist and the substrate, and after the resist is opened, the oxide film is side-etched to thicken the exposed surface of the substrate and widen the recess width.

When using this method using electron beam exposure, attention must be paid to the problem of charge-up due to beam electrons. Specifically, the exposure accuracy deteriorates due to fluctuation of the electron beam, and the adhesion between the resist and the insulating film deteriorates. The latter means that the recess width cannot be controlled. To avoid this problem during exposure, the needle is generally brought into contact with the wafer and grounded, but if the surface is covered with an insulating film, the needle does not touch the ground and this charge-up phenomenon occurs. is likely to occur. Further, in the case of a variable beam type electron beam exposure apparatus, this problem is particularly serious because the substrate is irradiated with a particularly large current. The present invention solves the above problems and provides a method for forming finer electrodes in which the recess width can be controlled without causing a charge-up phenomenon.

(Means for solving the problem) This method includes a step of forming an insulating film layer on a substrate, a step of forming a metal film on the insulating film layer, a step of forming a resist layer on the metal film, and a step of forming a resist layer on the metal film. forming an opening pattern by irradiating the resist layer with an electron beam and developing it;
Using the resist layer as a mask, the exposed portions of the metal film and the insulating film layer of the opening pattern are sequentially etched, and the exposed portions of the substrate surface are etched to an appropriate depth to form a recess structure. a step of depositing metal on the substrate including the opening pattern;
The method is characterized in that it includes a step of peeling off the resist layer and removing metal on the resist layer at the same time.

(Function) The purpose of growing an insulating layer on the substrate, which is the object to be processed by electron beam exposure, is to control the recess width to a desired size. However, if a resist layer is formed on top of the insulating layer and irradiated with the electron beam, Charge-up occurs in the surface insulating layer, which tends to cause fluctuations in the electron beam and peeling of the resist. Therefore, this problem can be solved by forming an even thinner metal film on the insulating film layer. In other words, the metal film allows the irradiated electrons to escape to the outside of the substrate, thereby avoiding the charge-up phenomenon. In this way, the recess width can be controlled using the insulating film without causing charge-up.

(Example) Examples of the present invention will be described in detail below with reference to the drawings.

Figure 1(a) shows the layer structure before electron beam exposure according to the present invention.
Shown below. Wafer substrate 1 For example, the surface layer is 3 x 1018 cm
On a substrate, such as GaAs doped with -2, an insulating film layer 2, e.g.
Grow with 00 people. Next, a metal film 3, such as Ti, is deposited on the insulating film layer 2 to a suitable thickness, for example, 200 mm. Subsequently, an electron beam resist 4, such as PMMA, is applied to a certain thickness, for example, Ipm, and is formed by baking. Electron beam drawing is performed on the above layered structure using an electron beam exposure device.

The electron beam irradiated on the surface of the resist layer
The metal film 3 is punched through the resist 4 while being exposed to light.
reach. The electrons that have reached the metal film 3 flow out of the wafer through the ground needle in contact with the metal film 3, and charging up of the resist 4 can be avoided. Thereafter, by performing development and baking, an opening pattern as shown in FIG. 1(b) can be formed. The size of this opening pattern determines the final gate length. After forming the opening pattern, the exposed metal film 3 and insulating film 2 are etched using the resist 4 as a mask. Here, when an oxide film or a nitride film is used as the insulating film 2 and a material such as Ti is used as the metal film 3, there is an advantage that the insulating film 2 and the metal film 3 can be etched simultaneously with buffered hydrofluoric acid. Motsu. After etching the metal film 3 and the insulating film 2, the exposed parts of the substrate 1 are etched using the insulating film 2 as a mask.
By etching, a recess 5 is formed as shown in FIG. 1(e). By controlling the amount of side etching of the insulating film 2, the size of the recess width can be controlled. Next, a gate metal such as Ti/Pt/Au or TυA1 is deposited and lifted off to obtain a gate 6 as shown in FIG. 1(d).

Although the embodiments of the present invention have been explained using specific materials and specific values, this is for ease of understanding; for example, it is not always necessary to use an oxide film as the insulating film layer, and the recess width Any material may be used as long as it is sufficient to control the temperature, and even a nitride film, for example, will not interfere with the effects of the invention. The same applies to the metal film, but if a metal that is easily dissolved in buffered hydrofluoric acid, such as Ti used in the example, is used, the oxide film and nitride film may be used as the insulating film. It has the advantage that when used as a layer, it can be etched at the same time. Also, during etching, a dry etching method using a CF4 gas or the like may be used.

(Effects of the Invention) According to the present invention, the metal film on the insulating film layer allows the irradiated electrons to escape to the outside of the substrate. Even when the irradiation is performed at a high temperature, problems of thio-oxidation, such as beam fluctuation and deterioration of adhesion between the resist and the insulating film, can be avoided. Therefore, it is possible to control the recess width using an insulating film without worrying about the charge-up problem, and it becomes easy to set conditions during electron beam lithography.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(d) are conceptual diagrams for explaining the present invention. 1...Substrate 2...Insulating film 3...Metal film 4...Resist 5...Recess 6...Gate

Claims (1)

[Claims] A step of forming an insulating film layer on a substrate, a step of forming a metal film on the insulating film layer, a step of forming a resist layer on the metal film, and irradiating the resist layer with an electron beam and developing it. forming an opening pattern; using the resist layer as a mask, sequentially etching the metal film and the insulating film layer in the exposed portion of the opening pattern, and etching the exposed portion of the substrate surface to a predetermined depth; A step of forming a recess structure by etching, a step of depositing metal on the substrate including the opening pattern portion, and a step of removing the metal on the resist layer at the same time as peeling off the resist layer. A method for forming a microelectrode characterized by: