JPH0265631A - Battery recharge detecting circuit - Google Patents

Abstract

PURPOSE:To recharge a battery corresponding to its capacity by constituting a battery charge detecting circuit with a circuit for detecting the peak charge voltage, a circuit for holding the peak voltage for a predetermined interval, a comparator for detecting - V and a latch circuit being triggered by the output from the comparator. CONSTITUTION:An operational amplifier 2 employs a voltage follower configuration and charges a holding capacitor 8 through a reverse-current preventive diode 3 and a resistor 6 such that it will have a voltage identical to the voltage across a resistor R2. A voltage higher than the voltage at the operational amplifier 2 by such amount as corresponding to the voltage drop of a resistor R3 is fed to the inverted input of a comparator 4. When the battery charge voltage passes through the peak and drops to - V, the output of the comparator 4 inverts to high level so as to hold Q output of next latch at high level. At the same time, a discharge transistor 7 is turned ON to discharge the capacitor 8.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a charge detection circuit for batteries such as NiC, D batteries, etc., and particularly to prevent overcharging during rapid charging. Problem] The conventional charging detection circuit described above only compares the built-in reference voltage and the partial voltage of the battery voltage, and in order to avoid overcharging, the voltage during charging must be lowered. The drawback is that it may run out of charge.

[Differences between the Invention and the Prior Art] The present invention differs from the conventional charge detection circuit described above in that it has a configuration of a 1ΔV control type charge detection circuit, which is the most ideal charging method.

[Means for Solving the Problems] The charging detection circuit of the present invention includes: a circuit that detects the peak value of the charging voltage that changes with time during the charging period; a halt circuit that holds the peak voltage for a certain period of time; It has a comparator that detects ΔV and a latch circuit that is triggered by the comparator output.

[Example] Next, the present invention will be explained through examples.

FIG. 1 is a circuit diagram of a first embodiment of the present invention, and a circuit 1 surrounded by a broken line is a charging detection circuit. The operational amplifier 2 has a voltage follower configuration, and charges a hold capacitor 8 (approximately 1000 μF) via a backflow prevention diode 3 and a resistor 6 to a voltage equal to the voltage across the resistor R2.

A voltage higher than that of the operational amplifier 2 by the voltage drop of the resistor R3 is input to the inverting input of the comparator 4, and the battery charging voltage curve passes the peak and begins to fall.
When the voltage drops to ΔV (approximately -0.2V for a 6V NiCD battery), the output of the comparator is inverted and becomes a high level, and the next Q output of latch 5 is held at a high level. At the same time, the discharge transistor 7 is turned on and the charge in the capacitor 8 is discharged. In this embodiment, the transistor 7 is an NPN bipolar transistor.
In addition, an N-channel FET can also be used.

FIG. 2 is a circuit diagram of a second embodiment of the present invention.

The inverting input of comparator 4 is connected to the non-inverting input terminal of operational amplifier 2, and the battery voltage detection resistors are connected to R1 and R
The circuit diagram of the first embodiment is the same as that of the first embodiment except that a level shifter 9 is added between the cathode of the backflow prevention diode 3 and the non-inverting input terminal of the comparator 4.

In this embodiment, a level shifter 9 is provided inside the charge detection circuit 1.
Since the -ΔV setting circuit is incorporated, there is no need for an external resistor R3 as in the first embodiment, and there is an advantage that only one battery voltage detection terminal is required.

FIG. 3 is a circuit diagram of a third embodiment of the present invention.

The operational amplifier 2° and the buffer operational amplifier 12 having a voltage follower configuration are connected in cascade through a reverse current prevention diode, and the output of the operational amplifier 12 is connected to the operational amplifier 2' through a current limiting resistor (approximately 30Ω) 11.
By being connected to the inverting input of the operational amplifier 2', the preceding operational amplifier 2' also operates as a voltage follower. When the battery charging voltage curve passes the peak and begins to fall, the diode 10 is connected to the operational amplifier 2', which loses voltage follower operation and becomes OV.
Even in this case, the output terminal of the operational amplifier 2' has a voltage equal to the forward voltage of the diode 10, which is approximately 0.0.
A 7V lower voltage is output. Therefore, at this time, only a reverse voltage of approximately -0.7V is applied to the voltage across the reverse current prevention diode 3, and since the value of the reverse voltage is reduced compared to the case of the first embodiment, the reverse current of the diode 3 is reduced. do. Furthermore, since the inverting input of the operational amplifier 2 is not connected to the line of the hold capacitor 8 as in the first embodiment, there is no current flowing out from the capacitor 8 as a manual bias current of the operational amplifier 2 in the hold state, and the capacitor The current flowing out from 8 is significantly reduced. Therefore, there is an advantage that the capacitance of the hold capacitor can be reduced (approximately 172 μF compared to 1000 μF in the first embodiment).

[Effects of the Invention] As explained above, the present invention allows the most ideal -ΔV control type circuit to be easily constructed as a battery quick charging circuit using a peak hold circuit composed of an operational amplifier and a capacitor, a comparator, and a latch circuit. , it is possible to charge the battery according to its capacity without overcharging.

(Hereafter, margin) Part 1 &

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of the first embodiment of the present invention, Fig. 2 is a circuit diagram of the second embodiment, Fig. 7A3 is a circuit diagram of the third embodiment, and Fig. 4 is a charge detection circuit according to the prior art. It is a diagram. 1, 1' ・ 2, 2' ・ 3 ・ ・ 4, r 5 ・ ・ 6 ・ ・ 7 ・ ・ 8 ・ ・ ・ 9 ・ ・ ・ ・ 10 ・ ・ ・ 11 ・ ・ ・ ・ ・Charge Detection circuit, Voltage follower configuration operational amplifier for peak voltage detection, Reverse current prevention diode, Comparator, Latch circuit, Hold capacitor charge/discharge current limiting resistor, Hold capacitor discharge transistor, Peak voltage hold capacitor, Level shifter, - Guaranteed voltage follower operation of operational amplifier 2', output current of operational amplifiers 2' and 12, 11...resistance for limiting the output current of operational amplifiers 2' and 12, 12... operational amplifier for buffer.

Claims (1)

[Claims] An operational amplifier for peak voltage detection that forms a voltage follower configuration via a backflow prevention diode, a hold capacitor for holding the peak voltage, a comparator for comparing the voltage of the hold capacitor with the battery terminal voltage, and a comparator. 1. A battery charging detection circuit comprising: a latch circuit triggered by the latch circuit; and a discharge transistor, the output of the latch circuit being connected to a base electrode and the collector electrode being connected to one end of a hold capacitor via a resistor.