JPH0254246U - - Google Patents
Info
- Publication number
- JPH0254246U JPH0254246U JP13398488U JP13398488U JPH0254246U JP H0254246 U JPH0254246 U JP H0254246U JP 13398488 U JP13398488 U JP 13398488U JP 13398488 U JP13398488 U JP 13398488U JP H0254246 U JPH0254246 U JP H0254246U
- Authority
- JP
- Japan
- Prior art keywords
- lead terminals
- semiconductor device
- package
- led out
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は実装基板に実装された状態にある本考
案の実施例に係る半導体装置の側面断面図、第２
図はその要部の斜視図である。第３図は従来例に
係る半導体装置の要部の平面図である。
１０……半導体装置、１２……パツケージ、１
４……側面、１６……側面導出リード端子、１８
……実装基板、２２……下面、２４……下面導出
リード端子、２６……リード端子挿通用穴。
FIG. 1 is a side sectional view of a semiconductor device according to an embodiment of the present invention mounted on a mounting board;
The figure is a perspective view of the main parts. FIG. 3 is a plan view of main parts of a conventional semiconductor device. 10...Semiconductor device, 12...Package, 1
4...Side surface, 16...Side lead terminal, 18
... Mounting board, 22 ... Bottom surface, 24 ... Lead terminal led out from bottom surface, 26 ... Lead terminal insertion hole.
Claims (1)
側面導出リード端子と下面導出リード端子とを導
出してなる半導体装置。 A semiconductor device in which side lead terminals and bottom lead terminals are alternately led out from the side and bottom surfaces of a package.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13398488U JPH0254246U (en) | 1988-10-13 | 1988-10-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13398488U JPH0254246U (en) | 1988-10-13 | 1988-10-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0254246U true JPH0254246U (en) | 1990-04-19 |
Family
ID=31392351
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13398488U Pending JPH0254246U (en) | 1988-10-13 | 1988-10-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0254246U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62266855A (en) * | 1986-05-15 | 1987-11-19 | Matsushita Electronics Corp | Semiconductor package and packaging method |
-
1988
- 1988-10-13 JP JP13398488U patent/JPH0254246U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62266855A (en) * | 1986-05-15 | 1987-11-19 | Matsushita Electronics Corp | Semiconductor package and packaging method |