JPH0245462B2 - - Google Patents

Description

Claim 1: An apparatus for defibrillating the heart of a patient with abnormal rhythm, which is capable of defibrillating the cardiac rhythm of a patient with abnormal heart rhythm, which is comprised of one of ventricular fibrillation, high heart rate tachycardia, and low heart rate tachycardia. a sensing means for sensing heart rate to distinguish between ventricular fibrillation and tachycardia with a high heart rate and tachycardia with a low heart rate; automatic defibrillation means for automatically defibrillating the patient's heart only when the presence is determined by the sensing means.

2 The detection means includes a sensing circuit that senses an electrocardiogram (ECG) signal of the heart and generates ECG data;
2. The apparatus according to claim 1, further comprising processing means for processing the ECG data based on a probability density function.

3. The sensing means includes a sensing circuit that senses a cardiac electrocardiogram (ECG) signal to produce ECG data, and the sensing means is configured to low-pass filter the ECG data to produce a low-pass filter output. With a connected low-pass filter circuit,
Claim 1, wherein said sensing means further comprises a heart rate circuit connected to said low pass filter circuit for sensing heart rate in response to and responsive to said low pass filter output. The device described.

4 the detection means and the sensing means operate simultaneously, the detection means comprising a sensing circuit that senses a cardiac electrocardiogram (ECG) signal and produces ECG data;
It is equipped with a processing circuit that processes this ECG data based on a probability density function and generates a detection output.
The sensing means includes a heart rate circuit for inhibiting the detected output of the processing circuit in response to the detection of low heart rate tachycardia, whereby when the low heart rate tachycardia is detected, the patient's 2. A device according to claim 1, which inhibits automatic defibrillation of the heart.

5. A base electrode, a tip electrode, a sensing button connected to the heart, and connecting means for connecting the base electrode and the tip electrode to the detection means, and connecting the sensing button to the sensing means. An apparatus as claimed in claim 1, comprising:

6. The connecting means comprises a switch circuit having a first state and a second state, the switch circuit being initially in the first state during operation of the detecting means for detecting abnormal heart rhythms; The switch circuit is activated to the second state in response to the detection of the cardiac rhythm abnormality by the detection means, and the switch circuit determines the presence of one of the ventricular fibrillation and the high heart rate tachycardia. 6. The device of claim 5, wherein the device is activated to said first state in response to said automatic defibrillation means automatically defibrillating a patient's heart.

7. The detection means is connected to a probability density function circuit that determines when the abnormal heart rhythm is present, and the probability density function circuit determines the presence of the abnormal heart rhythm. 7. A bistable circuit as claimed in claim 6, further comprising a bistable circuit activated to a first state in response to said cardiac rhythm producing a first output indicative of the presence of said cardiac dysrhythmia.

8. Claim 6, wherein said switch circuit connects said base electrode and tip electrode to said detection means in said first state, and connects said sensing button to said sensing means in said second state.
Equipment described in Section.

9 further comprising interface means for interfacing said switch circuit with said detection means and said sensing means, said switch circuit connecting said base electrode and said tip electrode to said interface means in said first state; 7. Apparatus as claimed in claim 6, wherein in said second state said sensing button is connected to said interface means.

10 The detection means includes an ECG input circuit that senses a cardiac ECG signal and generates ECG data, and processes the ECG data based on a probability density function,
a processing circuit that generates a first output when the probability density function is satisfied, and the detection means further instructs detection of the cardiac rhythm abnormality in response to the first output of the processing circuit. 2. The apparatus of claim 1, further comprising a bistable circuit providing a further output signal.

11 further comprising a base electrode, a tip electrode, a sensing button connected to the heart, and connecting means for initially connecting the base electrode and the tip electrode to the ECG input circuit, the connecting means being connected to the ECG input circuit. 11. The apparatus of claim 10, wherein said sensing button is connected to said sensing means in response to said further output signal from a ballast circuit.

12. Said sensing means comprises a heart rate circuit for monitoring the patient's heart rate, said heart rate circuit responsive to said further output signal from said bistable circuit to initiate a heart rate monitoring operation. The device according to item 10.

13 further comprising a second detection means for measuring the heart rate from the ECG signal, the automatic defibrillation means storing defibrillation electrical energy and discharging means for discharging the electrical energy through the heart; control means for activating the discharge means to deliver the defibrillating electrical energy to the heart; The discharge means is actuated only when a heart rate above a predetermined threshold is confirmed by the means, and the detection means is actuated according to a probability density function to confirm the presence of ventricular fibrillation. 2. Apparatus as claimed in claim 1, including first detection means.

14. The apparatus according to claim 13, wherein the first detection means confirms the presence of ventricular fibrillation when the time-averaged derivative of the cardiac ECG signal remains deviated from the baseline for a predetermined period of time or more.

TECHNICAL FIELD The present invention relates to an arrhythmia detection device and method, and more particularly to an improved device and method for defibrillating a patient's heart when life-threatening fibrillation occurs in the heart.

BACKGROUND ART In recent years, considerable progress has been made in the development of defibrillation techniques that provide effective medical treatment for various heart disorders or arrhythmias. Previous efforts have focused on standby systems that, in response to detection of cardiac pulse abnormalities, provide sufficient energy to electrodes connected to the heart to depolarize the heart and restore normal cardiac rhythm. Electronic defibrillators have been developed. Such standby electronic defibrillators are disclosed, for example, in commonly assigned U.S. Pat. No. 3,614,954 (later
Re.27652) and No.3614955 (later Re.27757)
No.).

Previous efforts in this field have also developed implantable electrodes for use in ventricular defibrillation (and other therapeutic techniques). According to such techniques, (for example) Heilman et al.
As disclosed in US Pat. No. 4,030,509, a tip electrode is attached to the inner or outer pericardial surface of the heart, and this electrode operates relative to an equivalent or base electrode in the form of an intravascular catheter. above
As disclosed in the Heilman et al. patent, such known electrode configurations may utilize separate pacer tips in combination with the base electrode or the tip electrode, or both electrodes.

Recent efforts have also developed techniques to monitor cardiac activity (to determine when defibrillation or cardioversion is required), which can be used to monitor cardiac activity when ventricular fibrillation occurs. A probability density function is used to determine the time. Such a technique using a probability density function is described in US Pat.
No. 4184493 and No. 4202340.

According to this latter known technique, cardiac fibrillation is indicated when the probability density function is satisfied. However, in the presence of one or more specific abnormal ECG patterns, this known probability density functional detector
If not optimally regulated, it may not only be "triggered" by actual ventricular fibrillation, but also cause certain forms of rapid ventricular tachycardia or heart rate, especially if there are abnormalities in ventricular conduction. Recent experiments have shown that it can be "triggered" even by low-volume ventricular tachycardia. The detector is triggered in the event of a tachycardia at such a high heart rate that it is life-threatening and cannot be left untreated if it occurs at such a high heart rate that sufficient blood is no longer being pumped. I don't mind. However, the problem is that the detector is triggered when a non-life-threatening low heart rate tachycardia occurs. Accordingly, there is a need for an apparatus and method for distinguishing between ventricular fibrillation and high heart rate tachycardia and low heart rate tachycardia.

Known devices based on probability density function technology were, at one time,
Note that it was only allowed to "trigger" when ventricular fibrillation occurred. This was done by conservatively adjusting the decision limits of the probability density functional detector so that it would only "trigger" when life-threatening ventricular fibrillation occurred. However, the detection of high heart rate tachycardia, indicated by a heart rate above a lower threshold level (e.g., approximately 200 beats/min), may be a condition in which therapeutic action may be desirable. eventually became clear. This was initially done by simply adjusting the criterion of the probability density function to "trigger" at the lower threshold level.

However, the criterion is that a modified probability density function detector can be "triggered" by an abnormal ECG signal even though there is no ventricular fibrillation or high heart rate tachycardia. It was soon discovered that there was a problem with the detector if only the gradual detection of Therefore,
In addition to performing analysis using probability density functions,
There is a need for arrhythmia detection devices and methods that also include techniques for distinguishing between fibrillation and high heart rate tachycardia and low heart rate tachycardia. Accordingly, the devices and methods of the invention disclosed herein treat high heart rate tachycardias by administering a defibrillation shock to the patient, but do not treat low heart rate tachycardias in this manner. ``It's about technology.

DISCLOSURE OF THE INVENTION According to the present invention, an arrhythmia detection device and method, particularly for detecting ventricular fibrillation and high heart rate tachycardia,
Improved devices and methods are provided for defibrillating a dysrhythmic heart using yet another technique for distinguishing low heart rate from tachycardia. In particular, the devices and methods of the present invention, in addition to using probability density function techniques to determine whether the heart has developed a dysrhythmia, utilize Heart rate sensing technology is also used to distinguish between fibrillation and high heart rate tachycardias and low heart rate tachycardias indicated by a heart rate below the predetermined threshold.

The present invention combines a superior vena cava (i.e., base) electrode as well as a distal (i.e., patch) electrode on the heart in a conventional manner to not only extract an electrocardiogram (ECG) signal but also provide a defibrillation shock to the heart. This is achieved in the first preferred device embodiment as used. Note that the ECG intensifier of this first embodiment essentially creates a derivative of the cardiac signal as taught in US Pat. No. 4,184,493. However, unlike the prior art, in this first embodiment of the invention, this differentiated ECG
A signal is applied to a probability density function circuit and a low pass filter and heart rate circuit, which provide a probability density function and a heart rate, respectively. According to this first embodiment, if the probability density criterion is satisfied while the heart rate is above a predetermined threshold (i.e., whether the time-averaged derivative of the ECG remains far from the baseline for an extended period of time) Once it has been determined whether the defibrillation is necessary), a conventional defibrillation pulse generator is activated to deliver a defibrillation shock to the heart. Therefore, a defibrillation shock is given to the heart only when fibrillation or high-rate tachycardia occurs, as opposed to low-rate tachycardia, which is not life-threatening.

According to a second embodiment of the invention, a sensing button (preferably a
The tip (combined with a patch electrode) is connected to the heart. Therefore, in this example, the base electrode and the tip electrode are first used to extract the ECG signal, thereby examining the probability density function. If the probability density function indicates an abnormal heart rhythm, a switch actuation occurs and the sensing button is used to
The ECG signal is retrieved and used to further measure heart rate. Since a signal that can identify cardiac depolarization even during ventricular fibrillation is generated by a very small area electrode, a common R-wave detector is used to generate the R-wave for heart rate sensing. be able to. Therefore, if the heart rate is above a predetermined threshold, a defibrillation shock is given. Once the shock is applied, further switching operations are performed and the probability density function is further examined using the base and tip electrodes.

According to a further feature of the invention, this second embodiment is provided with a timed reset function, which resets the predetermined threshold even if the probability density function indicates an abnormal heart rhythm. If a heart rate higher than the hold is not indicated within the specified time,
The return switch is automatically activated to resume monitoring the base and tip electrodes.
The ECG signal and the probability density function can be examined head-on.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an improved arrhythmia detection apparatus and method, and more particularly, an improved apparatus and method for defibrillating a dysrhythmic heart.

Yet another object of the present invention is to provide an apparatus and method that can differentiate between ventricular fibrillation and high heart rate tachycardia and low heart rate tachycardia.

Yet another object of the present invention is to use probability density function techniques to determine whether the heart has abnormal rhythms, and also to use heart rate sensing techniques to detect ventricular fibrillation and high heart rate tachycardia, as well as heart rate abnormalities. It is an object of the present invention to provide an apparatus and method for distinguishing between low tachycardia and low tachycardia.

Yet another object of the present invention is to use a base electrode and a tip electrode to monitor the ECG signal and the probability density function face-to-face and to determine whether the heart rate is above or below a predetermined threshold. An object of the present invention is to provide an apparatus and method.

Yet another object of the present invention is to monitor ECG signals using a base electrode and a tip electrode and
Examine the signal head-on with the probability density function, and retrieve the heart rate information using the sense button.
It is an object of the present invention to provide an apparatus and method for distinguishing between ventricular fibrillation and high heart rate tachycardia and low heart rate tachycardia.

Yet another object of the invention is to first examine the probability density function to determine whether the heart has an abnormal rhythm, and then examine the patient's heart rate if there is such an abnormal rhythm. differentiate between ventricular fibrillation and high-rate tachycardia and low-rate tachycardia, generate defibrillation pulses in the case of ventricular fibrillation and high-rate tachycardia, and It is an object of the present invention to provide an apparatus and method that does not generate defibrillation pulses in the case of low tachycardia.

Still another object of the present invention is to convert the ECG signal and the probability density function into a It is an object of the present invention to provide an apparatus and method having a timed reset function that returns to face-to-face monitoring operation and does not generate defibrillation pulses.

The above objects and other objects and features of the invention that will become apparent below will be clearly understood from the following description, claims, and accompanying drawings.

[Brief explanation of the drawing]

1 is a block diagram showing a first embodiment of the arrhythmia detection device of the present invention; FIG. 2 is a detailed circuit diagram of a heart rate circuit used to detect heart rate in the embodiment of FIG. 1; 3B and 3B are a series of waveform diagrams used to explain the operation of the heart rate circuit of FIG. 2; FIG. 4 is a block diagram showing a second embodiment of the device of the invention; 4 is a detailed circuit diagram of the heart rate circuit used to detect heart rate in the embodiment of FIG. 4, and FIG. 6 is a series of waveform diagrams used to explain the operation of the heart rate circuit of FIG. .

BEST MODE FOR CARRYING OUT THE INVENTION The arrhythmia detection apparatus and method of the present invention will be described in detail with reference to FIG. 1, which is a block diagram of a first embodiment of the apparatus of the present invention.

Referring to FIG. 1, the apparatus of the present invention (reference number
10) includes a superior vena cava (i.e., base) electrode 12 and a distal (i.e., patch) electrode 14.
This latter electrode is placed in contact with the patient's heart in a manner well known (see, eg, Heilman et al., US Pat. No. 4,030,509, supra). In device 10, electrodes 12 and 14 are connected via interface device 16.
It is connected to an ECG amplifier 18, which has an inherent filtering effect and produces an approximate differential ECG signal.

The ECG amplifier 18 is connected to a low pass filter circuit 19 (which is itself connected to a heart rate circuit 21) and a probability density function (PDF) circuit 20. Heart rate circuit 21 has its inhibit output line (lNHlBlT)
The output line of the heart rate circuit 21 is thereby connected to the PDF circuit 20 through the . PDF circuit 20
The output of is connected to a defibrillation pulse generator 26, which is connected to electrodes 12 and 14 via interface device 16.

In operation, electrodes 12 and 14 connect (1) ECG amplifier 1 to generate a differentiated ECG signal output that is applied to PDF circuit 20 and low-pass filter 21, respectively;
(2) defibrillation pulse generator 26 to interface device 16;
The interface device 16 (general interface device or isolation circuit) serves the dual purpose of delivering a defibrillation shock to the heart via the
used via In particular, the PDF circuit 20 is
The probability density function of the differentiated ECG output signal of the ECG amplifier 18 is monitored and conventional techniques (e.g.
Langer et al., U.S. Pat. No. 4,184,493 and
4202340) to determine when the heart has an abnormal rhythm. At the same time, the low-pass filtered ECG signal provided as the output of low-pass filter 19 is used by heart rate circuit 21 to determine when the heart rate exceeds a predetermined threshold; The number circuit 21 is
The inhibiting effect on the PDF circuit 20 is removed.

Therefore, it is determined by the PDF circuit 20 that the heart has an abnormal rhythm, and the heart rate circuit 2
1 determines that the heart rate is above a predetermined threshold.
enables the defibrillation pulse generator 26 to deliver a defibrillation shock to the heart via the interface device 16.

FIG. 2 is a detailed circuit diagram of the heart rate circuit used to detect heart rate in the embodiment of FIG. 1, and FIGS. 3A and 3B illustrate the operation of the heart rate circuit of FIG. 1 is a series of waveform diagrams used to

As is clear from FIG. 2, the heart rate circuit 21 includes an operational amplifier OP1 (which is used as a comparator), transistors Q1 to Q4, and a resistor R.
3 to R14, and capacitors C2 and C3,
It includes diodes D1 and D2.

The operation of heart rate circuit 21 of FIG. 2 will be described below with reference to the waveforms shown in FIG. As mentioned above, the input to the ECG amplifier 18 (FIG. 1) is
The undifferentiated ECG signal provided by electrodes 12 and 14. This undifferentiated
The ECG signal is shown as waveform 100 in FIG. 3A.

Also, as mentioned above, the ECG amplifier 18
Amplify and filter (differentiate) the ECG signal, and
This amplified and differentiated output of the amplifier 18 is the third
It is shown as waveform 102 in Figure A. Amplifier 1
This amplified and differentiated ECG signal from 8 is
Before being provided as input to the heart rate circuit 21, it is further filtered as described below by a low pass filter 19 (comprised of a resistor R1 and a capacitor C1).

Referring to FIG. 2, the amplified, differentiated and filtered ECG signal is applied to the negative input of operational amplifier OP1, the positive input of which receives the reference input REF via resistor R3. Arithmetic amplifier OP1
is used as a comparator, connecting the ECG input and the reference input
Based on its relationship to REF, its output switches between a low level output and a high level output. In particular, note that the zero crossing point of the derivative waveform (such as the output of amplifier 18 in FIG. 1) corresponds to the peak of the original signal (original ECG signal). Therefore, the low-pass filter 19 in FIG. 1 filters the differentiated ECG input applied to it, so that the output of the operational amplifier OP1 (FIG. 2) used as a comparator is
The switching occurs at the zero crossing point of the derivative waveform corresponding to the main peak of the ECG input signal. The output of comparator OP1 appears as waveform 104 in FIG. 3A, illustrating the switching action described above.

Still referring to FIG. 2, the emitter of transistor Q1 is connected to one of the offset adjustment terminals of operational amplifier OP1 to add hysteresis to the switching threshold of operational amplifier OP1. This hysteresis, in conjunction with the characteristics of reduction filter 19 of FIG. 1, serves to reduce the sensitivity of heart rate circuit 21 to small peaks in the ECG input signal. As discussed below, the other portions of the heart rate circuit 21 of FIG. do.

In particular, a programmable unidirectional transistor Q2 is connected in series with a resistor R5, the series connection being connected between the output of the operational amplifier OP1 and the collector of the transistor Q1. Further, the gate lead of transistor Q2 is connected to the output of operational amplifier OP1 via resistor R4. Briefly, a programmable unijunction transistor Q2 is connected to provide a narrow pulse to the base of a further transistor Q3, the base of which is connected to a resistor R7 and a resistor R7 as shown. It is connected to the unijunction transistor Q2 via R8.
The narrow pulse thus applied to the base of transistor Q3 corresponds to the rising edge of the output of operational amplifier OP1 (waveform 104 in FIG. 3A);
This narrow pulse is illustrated by waveform 106 in FIG. 3A. The operation of programmable unijunction transistor Q2 to provide the pulsed output shown in waveform 106 in this manner will be apparent to those skilled in the art associated with the use of such devices.

The narrow pulse shown by waveform 106 in FIG. 3A is also shown in FIG. 3B. This narrow pulse is applied to the base of transistor Q3, turning it on at a frequency determined by the frequency of rising edges of the output of operational amplifier OP1, ie, a frequency related to the heart rate. Therefore, if the heart rate is high enough, a voltage such as that shown by waveform 108 in FIG. 3B will be established on capacitor C2. In other words, (resistors R9 and R10
A voltage is established across capacitor C2 under the action of a power supply V _s (provided via a power source V s ), and the base of transistor Q3 is turned on by receiving a narrow pulse (waveform 106 in FIG. 3B). When this occurs, capacitor C2 discharges through this transistor Q3. Therefore, since the voltage on capacitor C2 does not reach the threshold voltage of programmable unidirectional transistor Q4 at high heart rates, transistor Q4 will not conduct and the gate voltage of transistor Q4 (i.e., resistor R11 and , R12, the voltage at the connection point of diode D2, and transistor Q4)
remains at a high level (waveform 110 in Figure 3B).
reference). Therefore, the output lNHlBlT of the heart rate circuit 21 remains at a high level, and the PDF circuit 20 of FIG.
not prohibited.

On the other hand, when the heart rate is low, transistor Q3 conducts relatively infrequently and capacitor C2 charges to the point where transistor Q4 "fires"; C2 discharges. This charging and discharging of capacitor C2 under these conditions is illustrated by waveform 112 in FIG. 3A. When transistor Q4 "fires" in this way, its gate lead is pulled low and remains low until it receives the next narrow pulse applied to the base of transistor Q3. In particular, when the next narrow pulse is received at the base of transistor Q3, a slightly negative voltage is applied to capacitor C2 (3rd A
As shown by waveform 112 in the figure), this slightly negative voltage turns off transistor Q4, causing it to return to a non-conducting state. Therefore, the voltage at the connection point between resistors R11, R12, diode D2, and transistor Q4 is waveform 1 in FIG. 3A.
It returns to positive polarity as shown at 14.

Thus, when transistor Q4 fires, a negative going pulse (waveform 114 in FIG. 3A) is generated at the junction of resistors R11, R12, diode D2, and transistor Q4. Such a negative going pulse is used to inhibit operation of the PDF circuit 20 of FIG. 1 (via control line lNHlBlT). Specifically, these negative-going pulses are used to remove charge from the integrating capacitor of PDF circuit 20, as taught in Langer et al., US Pat. No. 4,184,493.

In summary, if your heart rate is low, PDF circuit 2
0 (FIG. 1) is inhibited by the heart rate circuit 21, but this inhibiting effect does not occur when the heart rate is high. Therefore, if your heart rate is high,
PDF circuit 20 continues normal sensing operations and enables defibrillation pulse generator 26 based thereon.

Still referring to FIG. 2, note that diode D2 is provided for temperature and voltage stabilization over the activation time interval of transistor Q4.

Referring again to FIG. 1, as mentioned above, interface device 16 is a conventional interface device. In particular, interface device 1
6 simultaneously protects the ECG intensifier 18 from defibrillation pulses generated by the pulse generator 26.
An ECG intensifier 18 allows cardiac activity to be monitored. Interface device 16 is, for example, entitled "Method and Apparatus for Combining Defibrillation and Pacing Functionality into One Implantable Device"
It is described in detail in the US patent application of Langer et al. Further, the PDF circuit 20 is a general circuit for determining a probability density function, and is described in detail in, for example, Langer et al., US Pat. Nos. 4,184,493 and 4,202,340.

FIG. 4 is a block diagram of a second embodiment of the apparatus of the invention. Elements common to both FIG. 1 and FIG. 4 are designated with the same reference numerals.

Referring to FIG. 4, the device 30 includes a base electrode 1
2 and tip electrode 14 and is shown connected to sensing button 32 (associated with tip electrode 14). In particular, electrodes 12 and 14 and sensing button 32 are connected to ECG intensifier 18 and defibrillation pulse generator 26 via switch 34 and interface device 16. The ECG amplifier 18 is connected to the PDF circuit 20 as in FIG. 1, but also connected to an R-wave detector 22, which is of general design and is Generates a pulse every time. The R-wave detector 22 is then connected to the heart rate circuit 2 shown in detail in FIG. 5 (described below).
Connected to 3. The output of the PDF circuit 20 is connected via a flip-flop 36 to one input of an AND gate 24, the other input of which is connected to the output of the heart rate circuit 23. The output of flip-flop 36 is connected to heart rate circuit 23, to the input of a timed reset circuit 38 (the output of which is connected to the "reset" input of flip-flop 36), and to switch 34. Ru. Additionally, the output of AND gate 24 is connected not only to defibrillation pulse generator 26, but also to the "reset" input of flip-flop 36 and switch 34.

In operation, switch 34 initially bears the reference number 4.
It is located at the position indicated by 0. Therefore, in this mode (hereinafter referred to as "patch" mode),
A base electrode and a tip electrode are used in an ECG amplifier 18 that connects the interface device 16, the switch 34, and the electrodes 12 and 14.
Monitor heart activity through. Thereby, the ECG signal output generated from the amplifier 18 is transmitted to the PDF circuit 20.
(heart rate circuit 23 is initially “off”)
state). When a cardiac rhythm abnormality is detected by the PDF circuit 20, an output is generated and a flip-flop is generated.
applied to the "set" input of flop 36. When flip-flop 36 is set, it "remembers" the presence of a cardiac dysrhythmia and generates a Q output.

This Q output of flip-flop 36 is provided as an "enable input" to AND gate 24. The Q output is also given as a "start" command to the heart rate circuit 23 and to the timed reset circuit 38. Furthermore, flipp-
The Q output of flop 36 is also a signal to switch 34.
SENSE actuates switch 34 to the position indicated by reference numeral 42. This establishes a "sense" mode of operation during which heart rate is monitored by heart rate circuit 23. In particular, switch 34 is moved to the position indicated by reference numeral 42.
is activated, the interface device 16 is connected to the sensing button 32 and thus the heart rate circuit 23 causes the R-wave detector 22, switch 34,
Interface device 16 and ECG amplifier 18
Heart rate can be monitored through. ECG
The amplifier 18 is connected to an electrode with a very small surface area so that a clear depolarization signal is transmitted to the R-wave detector 2.
2 and an appropriate signal indication of the heart rate occurs. The heart rate circuit 23 is activated by the Q output of the flip-flop 36, and this Q output is detected by the PDF circuit 20 as a cardiac rhythm abnormality (the criterion of the probability density function is satisfied). Please remember that this occurs.

If a heart rate above a predetermined threshold is detected by heart rate circuit 23, the circuit generates an output to AND gate 24, which in turn generates an output on the Q output of flip-flop 36. This output is provided as an enable input to the defibrillation pulse generator 26 when the defibrillation pulse generator 26 is enabled. Additionally, AND gate 24 provides this output to the "reset" input of flip-flop 36 (thus resetting flip-flop 36), and also provides the input signal PATCH to switch 34, which is indicated by reference numeral 40. actuate to the indicated position, thereby placing device 30 back into the "patch" mode of operation. Additionally, a defibrillation pulse generator 26
When enabled by AND gate 24, interface device 16 and switch 34
(at position 40) to generate defibrillation pulses to the base electrode 12 and tip electrode 14, respectively, to defibrillate the patient's heart.

As described above, when a cardiac rhythm abnormality is detected by the PDF circuit 20, the timing reset circuit 38 is activated by the Q output of the flip-flop 36. If, after a predetermined period of time, heart rate circuit 23 does not detect a heart rate above a predetermined threshold, timed reset circuit 38 automatically provides a "reset" input to flip-flop 36. and another input to the switch 34.
PATCH is applied and switch 34 is actuated to the position indicated by reference numeral 40, again placing it in the "punch" operating mode. Therefore, if a heart rate exceeding a predetermined threshold is not detected within a predetermined period of time after a cardiac rhythm abnormality is detected by the PDF circuit 20, the ECG signal can be further monitored by the PDF circuit 20. The device 30 is provided with the advantageous ability to return the device 30 to a "punch" mode of operation at any time. In other words, timed reset circuit 38 removes the enable input from AND gate 24, turns off heart rate circuit 23, and places switch 34 in the "patched" position (indicated by reference numeral 40). to return to. PDF circuit 2
0 monitors the base electrode 12 and tip electrode 14 via switch 34, interface device 16 and ECG intensifier 18, respectively, to once again detect the presence of cardiac rhythm abnormalities.

5 is a detailed circuit diagram of the heart rate circuit 23 of FIG. 4, and FIG. 6 is a series of waveform diagrams illustrating the operation of the heart rate circuit 23 of FIG. 4. As is clear from FIG. 5, the heart rate circuit 23 includes an input resistor 50,
an NPN transistor 52, a current source 54, a capacitor 56, a differential amplifier or comparison circuit 58,
It includes a peak detector 60, a shift register 62, and an AND gate 64.

In operation, an ECG signal (generally indicated at 70 in FIG. 6) is transmitted to the R-wave detector 22 (FIG. 4).
and the detector generates a corresponding pulse train (designated generally at 75 in FIG. 6). In particular, this pulse train output of the R-wave detector 22 is routed through an input resistor 50 (FIG. 5).
Applied to the base of NPN transistor 52.
Transistor 52 is turned on by receiving each individual pulse of pulse train 75 and is therefore turned on in response to the detection of an individual R-wave 72,74.
During the time between each R-wave 72 (or 74) in FIG. 6, transistor 52 is non-conducting and a voltage is established on capacitor 56 by current source 54. This voltage established on capacitor 56
It is generally indicated by waveform 76 in the figure.

However, when R waves 72 or 74 occur,
NPN transistor 52 (FIG. 5) becomes conductive and capacitor 56 discharges through it (see individual waveforms 78 and 80 in FIG. 6). Therefore, for a normal heart rate (as shown by waveform 72 in FIG. 6), capacitor 56
It is clear that the current source 54 is able to establish a relatively high level of voltage across the capacitor 56 in excess of a predetermined reference value (indicated by reference numeral 86 in FIG. 6). Dew. On the other hand, an abnormally high heart rate (waveform 7 in Figure 6)
4), capacitor 56 discharges more frequently (as shown by waveform 80 in FIG. 6).
Do not exceed the reference value REF.

Still referring to FIG. 5, the negative input of the differential amplifier 58 is provided with a voltage corresponding to the voltage established on the capacitor 56, and the positive input of the differential amplifier 58 is provided with a voltage corresponding to the voltage established on the capacitor 56. It is clear that a voltage REF is provided which corresponds to the predetermined reference level 86 of FIG.
5 and 6, when the voltage on capacitor 56 exceeds a predetermined reference value 86 (as in waveform 78), differential amplifier 58
An output x equal to zero is generated to shift register 62, shown as inverted square wave 84 in FIG. On the other hand, during times when the voltage across capacitor 56 does not exceed reference value 86 (as in waveform 80 of FIG. 6), differential amplifier 58 sends an output equal to one to shift register 62. occurs to.

The heart rate circuit 23 in FIG.
is further provided, which corresponds to the R wave 70 in FIG.
This is a general circuit that detects the presence of a peak. When the detector 60 detects each peak, the input
Generate SHlFT to shift register 62. As a result, the current output x of differential amplifier 58 is shifted to the terminal stage of shift register 62, and the contents of shift register 62 are thus shifted to the right one stage at a time.

Additionally, the output of shift register 62 (corresponding to the contents of each bit or stage thereof) is input to AND gate 64.
given to. An output is produced from AND gate 64 only when all ones are detected in shift register 62. This output of AND gate 64 is applied to one input of AND gate 24 (FIG. 4),
The other input receives the Q output of flip-flop 36, which indicates that PDF circuit 20 has determined that the probability density function criterion has been met. Thus, when the probability density function criteria are met and an excessive heart rate is detected, AND gate 24 enables defibrillation pulse generator 26 to provide a defibrillation pulse to the patient's heart.
In contrast, AND gate 64 will not produce an output as long as the value of any bit in shift register 62 is 0, indicating that a consistently high heart rate has not been detected by heart rate circuit 23. . Therefore,
The shift register 62 serves as a means for storing the previous heart rate. (The more bits the shift register has, the more
It will be clear that there are many R-waves that must exceed a given percentage before a certain high heart rate is indicated. ) Therefore, even if the probability density function is satisfied, defibrillation will not occur.

Although the invention has been described with reference to preferred embodiments and configurations, it will be clearly understood that various changes may be made in detail and configuration without departing from the spirit and scope of the invention.