JPH0240194B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a radar monitoring device that is supplied with a radar video signal and displays the same.

<Background> Radar video signals, trigger signals,
It has been proposed that an azimuth signal and an azimuth reference signal are supplied to a radar monitoring device, the radar image signal is stored in a main memory, and the main memory is repeatedly read out and supplied to a scanning display for displaying, for example, PPI. There is. In this case, if the distance range set in the radar monitoring device and the distance range set in the radar device that is the source of the radar video signal do not match, the correct radar image may not be displayed on the radar monitoring device.

That is, in this type of radar monitoring device, when an azimuth signal is input, an input radar video signal is temporarily stored in a buffer circuit as a digital signal based on an input trigger signal immediately after the azimuth signal. The storage speed in the buffer circuit is determined according to the distance range set for the radar monitoring device.
When a certain number of radar video signals, for example 256 samples, are stored in the buffer circuit, the radar video signal of the buffer circuit is transferred to the main memory.
The transfer rate is always constant regardless of the value of the set distance range, therefore, the data is transferred at a constant time, and is performed once during one period of the direction signal. When a trigger signal is input next, the radar monitoring device moves to the next processing mode, so the read/write address generation circuit for the buffer circuit is cleared.

For example, the distance range is 0.5 (nautical miles), 1, 2, 4,
8, 16, 32, 64, and the frequency of the trigger signal is, for example, 2200Hz for distance ranges 0.5, 1, and 2, 1100Hz for distance ranges 4 and 8, and 1100Hz for distance ranges 16, 32, and 64.
It is 550Hz. Therefore, if the distance range of the radar device, that is, the signal source of the input radar video signal, is set to 8 nautical miles, the frequency of the input trigger signal will be 1100Hz.
And the period is 910μS. On the other hand, if the distance range for the radar monitoring device is set to 64 nautical miles, the detection time for 1 nautical mile is 12.3 μS, so the writing time of the radar video signal to the buffer circuit is 64×
12.3μS = 787μS, and assuming that the transfer time from the buffer circuit to the main memory is 500μS, the radar video signal starts to be stored in the buffer circuit based on the input trigger signal, and then the radar video signal is transferred to the main memory. The time it takes to complete is 787μS + 500μS =
It becomes 1287μS. On the other hand, the period of the input trigger signal is 910 μS in this case, which is shorter than 1287 μS, so the next trigger signal is input before the transfer to the main memory is completed, and the address signal generation circuit for the buffer circuit is cleared. Therefore, the radar video signal cannot be stored correctly in the main memory.

<Summary of the Invention> The purpose of the present invention is to issue an alarm when the radar video signal cannot be stored correctly in the main memory due to a difference between the set distance range of the input radar video signal and the set distance range of the radar monitoring device. An object of the present invention is to provide a radar monitoring device that enables radar monitoring to occur.

According to this invention, the write end detection circuit generates a write end signal every time the transfer to the main memory is completed, and it is detected whether or not the write end signal exists within each period of the direction signal to detect whether or not the write end is completed. It is detected by the circuit, and if it does not exist, a write incomplete signal is generated. When the writing incomplete signal occurs more than a predetermined number of times within one cycle of the direction reference signal, an alarm signal is generated from the alarm generation circuit, and the alarm signal drives an alarm device to issue a visual or audible alarm.

<Example> As shown in FIG. 1, the radar device 11 is a normal one, which emits pulse radio waves from an antenna rotating in the directional direction, receives the reflected waves, amplifies and detects them, and uses a cathode ray tube. For example, PPI is displayed on a scanning display such as a display. For this purpose, there is a rotation reference for the direction of the antenna, for example, if a radar device is installed on a ship, a direction reference signal indicating that the antenna direction is directed toward the bow, a direction signal for each unit angle, and a pulse radio wave. A trigger signal that triggers transmission is generated. In addition, the detection distance can be changed by changing the distance range setting.As mentioned earlier, there are multiple predetermined distance ranges, and depending on the set distance range, one main scan on the display surface, that is, the radial direction. For example, the scanning period becomes longer as the set distance range becomes longer, and the repetition period of the trigger signal is also changed according to the distance ranges divided into a plurality of groups.

In order to display the detection radar video signal from the radar device 11 on another, for example, a color display radar monitoring device 12, the radar video signal, azimuth reference signal, azimuth signal, and trigger signal from the radar device 11 are sent to the interface 13. Through the video input terminal 14, azimuth reference input terminal 15, azimuth input terminal 16 and trigger input terminal 17 of the radar monitoring device 12
are supplied respectively. The radar video signal from the video input terminal 14 is periodically sampled in the AD converter 18, and each sample is, for example, 3
It is converted into a bit digital signal. This digital signal is temporarily stored in the buffer circuit 19. Addressing for storage is performed by applying the count value of the write counter 21 to the buffer circuit 19 through the selector 22.

The start of writing to the buffer circuit 19 is performed based on a trigger signal input to the terminal 17 immediately after the azimuth signal input to the azimuth input terminal 16. Moreover, the writing is performed at a clock speed corresponding to the distance range set by the distance range setting section 23 of the radar monitoring device 12, and by a fixed number of samples, for example, 256 samples. That is, the reference clock generator 24 generates clocks having a speed corresponding to each distance range, and these clocks are selected by the selector 25 based on a signal indicating the distance range set by the distance range setting section 23. The selected clock is input to AND gate 26. On the other hand, every time a trigger signal is input to the terminal 17, the flip-flop 27 is set, and the AND gate 26 is opened by its Q output. gate 26
The output clock of the selector 25 that has passed through is counted by the counter 21. The counter 21 is a fixed number,
For example, when 256 is counted, the output resets the flip-flop 27 and also resets the counter 21.

On the other hand, the input terminal 1 of the processing mode control circuit 28
Direction signals (FIG. 2A) and trigger signals (FIG. 2B) are input from 6 and 17, respectively, and write control to the buffer circuit 19 is performed based on the trigger signal immediately after each direction signal, that is, immediately after the fall in the figure. A signal is generated from terminal 29. Furthermore, each time a subsequent trigger signal is input, the processing mode is changed. When the selector 22 selects the count value of the counter 21 under the control of the signal at the terminal 29, the buffer circuit 19 is controlled to be in the write state. In this way, for each azimuth signal, a fixed number of sample values of the radar video signal are stored as digital signals in the buffer circuit 19 during a period corresponding to the set distance range.

When one write to the buffer circuit 19 is completed, the write end signal from the output of the counter 21 is input to the processing mode control circuit 28, the control circuit 28 enters the transfer mode, and the digital radar video signal of the buffer circuit 19 is The data is transferred to the main memory 31. That is, the transfer counter 32 counts the clocks at the terminal 33, and the contents of this counter 33 are selected by the selector 22 to designate the read address of the buffer circuit 19. On the other hand, this transfer counter 32
The contents of the address specify a lower address of the main memory 31 as a distance address through the selector 34. The azimuth signal from the input terminal 16 is applied to the counter 35 and counted;
It is reset by the direction reference signal from
The counted value of this counter 35 is supplied to the main memory 31 as an upper address through the selector 34.

As shown in FIG. 3, the main memory 31 has memory cells _M11 to _M1o that store one sample value of the radar video signal stored in the buffer circuit 19 arranged in rows and columns. The angle addresses in this example are 0 degrees, 0.5 degrees, 1.0 degrees,
The addresses are set in increments of 0.5 degrees, such as 1.5 degrees, and the counter 35 specifies a row in the main memory 31, and for each angular address, the addresses increase in the order of the reflected signals having the closest distance address. Therefore, the transfer from the buffer circuit 19 to the main memory 31 is such that the radar image signal at 0 degree is sequentially stored in the memory cells as shown by the solid arrow in FIG. Storage is performed in the eye memory cells, and in this way, radar image signals corresponding to the angle signals are sequentially stored.

This main memory 31 is repeatedly read out to display a scanning color display 36, such as a color cathode ray tube display.
is supplied as a display signal to At this time, the digital radar video signal read from the main memory 31 is supplied to the color converter 38 through the synthesizer 37, where it is converted into a color signal corresponding to the digital value of the input signal and displayed in color. 36 as a display signal. On the other hand, the clock from the terminal 39 is counted by the angle counter 41, the carry of this angle counter 41 is counted by the distance counter 42, and the counted values of these counters 41 and 42 are given to the main memory 31 as a read address through the selector 34. . In other words, the addresses in the column direction of the main memory 31 are sequentially specified according to the contents of the angle counter 41, that is, the angle addresses are sequentially specified, and when the angle address for one column has been specified, a carry is carried out and the distance address is increased by one step. All the row addresses for that column, that is, the angular addresses, are specified by advancing the column, and the main memory 31 is therefore sequentially read out as shown by dotted lines in FIG.

The carry signal of this angle counter 41 is
3, the signal is converted into a sine wave having the same period as the generation period, that is, a sine wave signal whose one period is the period for reading out one row of memory cells in FIG. 3 is obtained. The count value of the distance counter 42 is sent to the DA converter 44.
The analog signal converted by , that is, the analog signal corresponding to the address in each distance direction of the memory cell in FIG.
4 and is outputted from the modulator 45. The output is divided into two parts, one of which remains unchanged, and the other of which is shifted in phase by 90 degrees by a phase shifter 46 and supplied to the deflection circuit 47 of the color display 36, respectively. Therefore, the color display 36 performs concentric scanning, and as a result, the radar image signal read from the main memory 31 is displayed in PPI color. A spiral operation may be used instead of this concentric scanning.

Note that the contents of the angle counter 41 and the distance counter 42 and the azimuth reference signal from the input terminal 15 are supplied to the marker generator 48 to generate distance marker signals,
A bearing marker signal and a reference bearing display signal are respectively generated, and these signals are supplied to a color converter 38 through a synthesis circuit 37, so that the distance marker, the bearing marker, and the reference bearing are displayed on the display 36. The processing mode control unit 28 switches the address signals of the selectors 22 and 34 and controls reading and writing of the buffer circuit 19 and the main memory 31. Furthermore, the control circuit 28 resets the transfer counter 32 for each trigger signal at the input terminal 17.

Therefore, as mentioned above, the azimuth signal shown in FIG. 2A is input from the input terminal 16, and the azimuth signal shown in FIG.
When the trigger signal shown in FIG. 2B is input,
For the buffer circuit 19, the period shown in FIG.
The radar video signal is written to Tw. This writing period Tw becomes longer as the set distance range becomes longer. When this writing is completed, the data is transferred to the main memory 31 as shown in FIG. 2D. This transfer period Tt is constant. If the distance range settings in the radar device 11 and the radar monitoring device 12 match, after this transfer to the main memory 31, the next trigger signal causes the transfer counter 32 to be reset by the reset pulse shown in FIG. 2E. It will be done.

The distance range setting section 23 of the radar monitoring device 12 corresponds to the set distance range in the radar device 11.
If the set distance range in is significantly different on the long distance side, the buffer circuit 1 will change as shown in Figure 2F.
9 becomes longer, and after the writing is completed, the main memory 31 is stored as shown in FIG. 2G.
The transfer period is Tt. During this transfer period Tt,
Since the next trigger signal is input and a reset signal is generated for the transfer counter 32 during this transfer period Tt as shown in FIG. 2H, correct transfer to the main memory 31 is no longer performed.

In this invention, the azimuth signal of the input terminal 16 and the output signal of the transfer counter 32 are input to the overrange detection circuit 49 to detect a state in which the transfer to the main memory 31 is not performed correctly and generate an alarm. be done.

For example, as shown in FIG.
The output of is supplied to the write end detection circuit 51, and when the final transfer output, for example, the radar video signal as in the above example, is written to the buffer circuit 19 as 256 samples, when the transfer counter 32 counts 256, A write end signal shown in FIG. 2I is generated for FIG. 2D.

This write end signal and the azimuth signal of the input terminal 16 are supplied to the write unfinished detection circuit 52, and if the write end signal does not exist within each cycle of the azimuth signal, the write unfinished signal is output. That is, the direction signal at the terminal 16 is sent to the delayed pulse generation circuit 53,
As shown in FIG. 2J, a negative pulse is generated slightly delayed from the falling edge of each azimuth signal, thereby clearing flip-flop 54. A constant positive voltage is applied from a terminal 55 to the data terminal D of the flip-flop 54, and the output of the write end detection circuit 51 is applied to the clock terminal ck of the flip-flop 54. Therefore, the write end signal of FIG.
The Q output of is at a high level as shown in FIG. 2K. This Q output is given to the data terminal D of the flip-flop 56, and a signal obtained by inverting the azimuth signal at the terminal 16 is input to the clock terminal ck of the flip-flop 56. is taken in. Therefore, for the Q output of FIG. 2K, the output of flip-flop 56 remains at a low level, as shown in FIG. 2L. This low level is inverted and the OR circuit 57
Therefore, the output of the OR circuit 57 remains at a high level regardless of the other input (output of the delayed pulse generation circuit 53), and the output of the counter 58 remains high.
is not counted.

However, in the states shown in FIGS. 2F and 2G, the clear signal shown in FIG. 2H is generated before the transfer to the main memory 31 is completed, so that the clear signal shown in FIG. As such, the write end signal is not generated. Therefore, the Q output of flip-flop 54 remains at a low level, and since this low level is taken into flip-flop 56 at the falling edge of the bearing signal, the output of flip-flop 56 remains at a high level, and this high level is reversed
Since it is supplied to one input of the OR circuit 57,
The OR circuit 57 inverts the output of the delayed pulse generating circuit 53 and outputs it as shown in FIG. 2N.
If the write completion signal is not obtained within one cycle of the azimuth signal in this manner, one pulse is generated from the OR circuit 57 as a write incomplete signal. In other words, OR
The circuit 57 constitutes a gate means which is controlled to be closed when there is a write end signal and to be opened when there is no write end signal.

When the write incomplete detection circuit 52 generates a predetermined number of write incomplete signals, an alarm signal is generated. That is, the output of the OR circuit 57 is supplied to a counter 58 as an alarm generation circuit. Counter 58 is terminal 1
5, which generates an alarm signal at terminal 59 when it counts a predetermined number, for example 32. This alarm signal is supplied to the alarm device 61, and the overrange is visually or audibly notified. For example, the transistor 62 is turned on and the light emitting diode 63 connected in series with the transistor 62 lights up, indicating an overrange condition;
In other words, since the set distance ranges of the radar device 11 and the radar monitoring device 12 do not match, the main memory 31
It is displayed that the correct transfer is not being performed.

The reason why the alarm generation circuit 58 counts multiple unfinished writing signals is that the azimuth signal and the trigger signal are asynchronous, and moreover, the rotation speed fluctuates while the antenna of the radar device 11 rotates 360 degrees depending on the wind direction. Therefore, there is a possibility that the write unfinished signal may be generated several times. In other words, this is to prevent it from being detected as an overrange that is not an overrange.

<Effects> As described above, according to the present invention, correct storage is not performed in the main memory 31 because the distance range setting in the radar monitoring device 12 does not match the distance range of the trigger signal of the input radar video signal. If this is not the case, the alarm 61 will notify you of this. Therefore, the operator can immediately notice an error in the set distance range and correct the setting.

In the above description, the radar image signal is taken into the buffer circuit within one period of the input trigger signal and transferred to the main memory 31, but each period of the direct trigger signal of the azimuth signal and the next one period are The present invention can also be applied to the case where radar video signals are correlated to improve the SN ratio and then transferred to the main memory. Furthermore, in a normal distance range, data is transferred to the main memory in two cycles of the input trigger signal, but when the distance range is set to 0.5 nautical miles, data is transferred to the main memory in four cycles of the input trigger signal. There is a radar monitoring device. In this device, even if the set distance range of the radar device is set to 0.5 nautical miles or more and the radar monitoring device is set to 0.5 nautical miles, that is, short, there is a risk that the transfer to the main memory cannot be performed correctly. This invention also works effectively.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a radar monitoring device according to the invention, FIG. 2 is a time chart for explaining the operation of the invention, and FIG. 3 is an explanation of memory cells of the main memory and writing and reading thereof. FIG. 4 is a logic circuit diagram showing a specific example of the overrange detection circuit 49 which is the essential part of the present invention. 11: Radar device, 12: Radar monitoring device, 1
3: Interface, 14: Radar video input terminal, 15: Direction reference input terminal, 16: Direction input terminal, 17: Trigger input terminal, 18: AD converter,
19: Buffer circuit, 21: Write counter, 2
2, 34: Selector, 23: Distance range setting section,
24: Reference clock generator, 28: Processing mode control circuit, 31: Main memory, 32: Transfer counter,
36: Display, 49: Overrange detection circuit,
51: writing completion detection circuit, 52: writing unfinished detection circuit, 58: alarm signal circuit, 61: alarm device.

Claims (1)

[Claims] 1 Radar video signal, trigger signal, azimuth signal, and azimuth reference signal are input, and the radar video signal is
The digital signal is converted into a digital signal by a DA converter, and the digital signal is temporarily stored in a buffer circuit by a clock according to the set distance range using the above trigger signal as a reference, and the stored signal of the buffer circuit is transferred to the main memory for each of the above direction signals. In the radar monitoring device, the signal read from the main memory is supplied as a display signal to a scanning type display whose display surface is scanned in synchronization with the readout. a write end detection circuit that detects the end of writing to the memory and generates a write end signal; a delay pulse generation circuit that is supplied with the azimuth signal and generates a slightly delayed delay pulse; and a delay pulse generation circuit that is cleared by the delay pulse.
The first point where a high level is taken in by the above write end signal.
A flip-flop, a second flip-flop in which the output of the first flip-flop is taken in as an inverted signal of the azimuth signal, gate means whose opening and closing are controlled by the output of the second flip-flop and to which the delay pulse is supplied, and the gate means. What is claimed is: 1. A radar monitoring device comprising: an alarm generation circuit that counts the output pulses of the circuit and generates an alarm signal when the counted value reaches a predetermined number; and an alarm that is driven by the alarm signal.