JPH0236612A - Optical coupling type relay circuit - Google Patents

Abstract

PURPOSE:To make the switching operation stable against the fluctuation of an input signal by providing a hysteresis characteristic to an operating point where an output MOSFET is switched from the OFF state into the ON state and an operating point where an output MOSFET is switched from the ON state into the OFF state. CONSTITUTION:A normally ON type control TR 4 with different conduction type from that of a control TR 3 is connected in series with an impedance element biasing the normally ON control TR 3 into the high resistance state. When the control TR 3 is biased into the high resistance state, the voltage across the control TR 3 biases the control TR 4 into the high resistance state. Then a hysteresis characteristic is obtained at the operating point where the ON state and the OFF state of the output MOSFET 7 are switched. Thus, even if the input signal is fluctuated near the operating point, the stable switching operation is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an optically coupled relay circuit in which input and output are electrically isolated using an optical coupling method.

[Prior art] Figure 2 shows a conventional optically coupled relay circuit (Japanese Patent Application No. 1986-2).
55023) is a circuit diagram. In this circuit,
Input terminal 1. .・It is applied between sources.

The drain and source of the output MO8FET 7 are connected to output terminals 0 + and 02, respectively. M for output
The train and source of a control transistor 3 made of a depletion mode MOSFET are connected to the gate and source of the O8FET7, respectively, and the gate and source of the control transistor 3 are connected to both ends of a resistor 5. There is.

Enhancement mode MOSF is connected to both ends of resistor 5.
The drain and source of ET are connected respectively,
The drain and gate of this MOSFET are commonly connected to form a voltage regulating element 6.

The light emitting diode 1 generates an optical signal in response to an input signal, and when this optical signal is received and a photovoltaic force is generated in the photodiode array 2, a voltage is generated between the drain and source of the normally-on control transistor 3. A photocurrent flows through the resistor 5 through the resistor 5, and a voltage is generated across the resistor 5. This voltage biases the control transistor 3 to a high resistance state, so the photovoltaic force of the photodiode array 2 is applied between the gate and source of the output MO3FET 7, and the output MO3FET 7 is turned on.

When the input signal to the light emitting diode 1 is cut off, the photovoltaic force of the photodiode array 2 disappears, and the voltage across the resistor 5 disappears, so the normally-on control transistor 3 returns to a low resistance state. Since the accumulated charge between the gate L- and the source of the output MO3FET7 is discharged, the output MO8FET7 is turned off.

Note that the voltage regulating element 6 is composed of an enhancement mode MOSFET whose gate is connected to the drain, and limits the voltage generated across the resistor 5 to below a threshold voltage.

[Problem to be solved by the invention] By the way, in the best conventional electromagnetic relay, once the input signal reaches the operating point (sensing current value) and turns on,
Even if the level of the input signal fluctuates somewhat at the operating point, it remains on as long as there is an input signal, and has a hysteresis characteristic in which it turns off only when the input signal drops considerably below the operating point.

Due to this hysteresis characteristic, the switching of electromagnetic relays is extremely stable. However, in the optically coupled relay circuit shown in Fig. 2,
When the input signal fluctuates around the operating point, switching becomes unstable and an intermediate state between an on state and an off state tends to occur.

The present invention has been made in view of these points, and its purpose is to provide an optically coupled relay circuit that is capable of stable switching operation even when the input signal fluctuates around the operating point. It's about doing.

[Means for Solving the Problems] In order to solve the above problems, the optically coupled relay circuit according to the present invention transmits an optical signal in response to an input signal, as shown in FIG. The generated light emitting diode 1, the photodiode array 2 arranged to receive the optical signal of the light emitting diode 1, and the photovoltaic force of the photodiode array 2 are applied between the gate and source, and the drain and
M for output where conductive state and non-conductive layer between sources are switched
○SFF, T7 and output MOSFET7 gate I~
- Normally, which constitutes a discharge path for accumulated charge between sources.
The photocurrent of the photodiode array 2 is passed through the on-type first control transistor 3 and the first control transistor 3 to generate a voltage that biases the first control transistor 3 to a high resistance state. The impedance element (resistance 5) and the first control transistor 3 have different conductivity types, and are connected in series to the impedance element (resistance 5), so that the first control transistor 3 is in a high resistance state. A normally-on type second control transistor 4 which is biased to a high resistance state by the voltage across the first control transistor 3 when biased, the impedance element (resistance 5) and the second control transistor 4. Control transistor 4
The voltage regulating element 6 is connected in parallel to the series circuit of the voltage regulating element 6.

[Function] In the present invention, the gate-source storage of the output MO3FET7 is is connected in series with an impedance element for biasing the normally-on type first control transistor 3 constituting a charge discharge path to a high resistance state, and has a conductivity type different from that of the first control transistor 3. When the normally-on type second control transistor 4 is connected and the first control transistor 3 is biased to a high resistance state, the voltage across the first control transistor 3 causes the second control transistor 4 to be connected. Since the control transistor 4 is biased to a high resistance state, when the first control transistor 3 is in a high resistance state and the output MOSFET 7 is turned on, the second control transistor 4 is biased to a high resistance state. becomes a high resistance state. Therefore, the bias resistance of the first control transistor 3 has become substantially high, and even if the input signal fluctuates somewhat, the first control transistor 3 does not return to the high resistance state, and the output MO3FET 7 never returns to the off state.

Further, when the level of the input signal decreases to such an extent that the second control transistor 4 returns to a low resistance state, the bias resistance of the first control transistor 3 has become substantially low, and the first control transistor 4 has a low resistance. Since the control transistor 3 returns to a low resistance state, a discharge path for the accumulated charge between the gate and source of the output MO3FET 7 is formed, and the output MO3FET 7
T7 is in an off state.

Therefore, in the present invention, the output MO3FET7
A hysteresis characteristic is obtained at the operating point where the on-state and off-state are switched, and the switching operation of the output MO3FET 7 is stabilized.

[Embodiment] FIG. 1 is a circuit diagram of an embodiment of the present invention. Relay input terminal 1. A light emitting diode 1 is connected to , I. An optical signal generated by the light emitting diode 1 is received by the photodiode array 2 .

The positive end of photodiode array 2 is MO8F for output.
Connected to the gate of ET7. MO9FET for output
The drain of 7 is connected to the output terminal O3, and the source is connected to the output terminal o2.

A series circuit (not shown) of a DC power supply and a load is connected to the output terminals 0 + and 02, and the polarity of the DC power supply is such that output terminal O1 is output terminal 0. It is connected so that the potential is higher than that of the

The negative terminal of the photodiode array 2 is connected to the gate of a control transistor 3 consisting of a depletion mode N-channel MOSFET. The train of the control transistor 3 is connected to the positive end of the photodiode array 2, and the source is connected to the source of the output MO3FET 7, and the P in depletion mode.
It is connected to the Q terminal of the photodiode array 2 between the source and train of a second so-called official transistor 4 consisting of a channel MO3FET and via a resistor.

The gate of the control transistor 4 is connected to the positive end of the photodiode array 2.

The operation of this circuit will be explained below. When an input signal is applied between relay input terminals II and I2, light emitting diode 1 generates an optical signal according to the level of the input signal.

This optical signal is received by photodiode array 2,
The photodiode array 2 generates a photocurrent depending on the level of the optical signal.

This light ZK flows through the normally-on control transistors 3 and 4 and the resistor 5, and a voltage of the polarity shown is generated across the resistor 5. With this voltage, first,
The normally-on control transistor 3 is biased to a high resistance state. Therefore, the photocurrent from the photodiode array 2 flows through the gate-source capacity of the output MO3FET7, and the output MO8FET7
The voltage between '/- is increased, and the output MO3FET 7 is turned on. The photodiode array 2 is made up of a number of photodiodes connected in series so that the output MO3FET 7 can be turned on. At the same time, since the drain-source voltage of the normally-on control transistor 3 increases, the gate-source voltage of the normally-on second control transistor 4 also increases, and the control transistor 4 increases. Biased to high resistance state. Therefore, the bias resistance of the first control transistor 3 has a resistance value that is the sum of the resistance 5 and the high resistance between the drain and source of the control transistor 4, and the resistance value has substantially increased.

In addition, during the transition period until the gate-source capacitance of the output MO3FET 7 is charged, the voltage across the resistor 5 will rise compared to the steady state due to the charging current of the gate-source capacitance. When the voltage across the voltage regulating element 5 exceeds the threshold voltage of the voltage regulating element 6, the charging current is bypassed through the voltage regulating element 6. therefore,
The gate-source voltage of the output MOSFET 7 rises quickly.

Next, from this state, the level of the input signal decreases, and the level of the photocurrent becomes the first level when only the voltage generated across the resistor 5 is present.
Even if the control transistor 3 cannot be biased to a high resistance state, the high resistance between the drain and source of the second control transistor 3 is connected in series to the resistor 5. The first control transistor 3 continues to be biased to a high resistance state by the composite voltage of the voltage generated across the resistor 5 and the voltage generated between the drain and source of the second control transistor 4.

Therefore, the electromotive force generated by the photodiode array 2 continues to be applied between the gate and source of the output MO3FET 7, and the output MO8FET 7 maintains the on state.

Then, when the level of the input signal further decreases and the normally-on control transistor 4 cannot be biased to a high resistance state due to the photocurrent, the drain and source surfaces of the control transistor 4 become low resistance. , it is no longer possible to bias the control transistor 3 to the high resistance state only with the voltage generated across the resistor 5 due to the photocurrent, and the control transistor 3 returns to the low resistance state. Therefore, the accumulated charge between the gate and source of output MO3FET7 is υ
It is discharged between the drain and source of the control transistor 3, and the output MO3FET 7 is turned off.

Due to the above operation, this optically coupled relay circuit has hysteresis characteristics, and even if the input signal fluctuates around the operating point, the relay circuit will not enter an intermediate state between the on state π and the off state, and the switching This stabilizes the operation.

In the illustrated embodiment, the normally-on control transistor 3.4 is a depletion mode M transistor.
OSFET is used, but J in depletion mode is used.
It goes without saying that FETs can be used. Further, although the resistor 5 is used as the impedance element, a series array of diodes or a series circuit of a diode and a resistor may be used.

[Effects of the Invention] As described above, the present invention provides hysteresis characteristics at the operating point where the output MO3FET switches from the OFF state to the ON state and the operating point where the output MO3FET switches from the ON state to the OFF state in an optically coupled relay circuit. Therefore, even if the input signal fluctuates somewhat around the operating point, the state of the output MO3FET will not become unstable, and the switching operation will be stabilized.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional example. 1 is a light emitting diode, 2 is a photodiode array, 3
4 is a normally-on first control transistor, 4 is a normally-on second control transistor, 5 is a resistor, 6 is a voltage regulating element, and 7 is an output MO9FET.

Claims (1)

[Claims] (1) A light emitting diode that generates an optical signal in response to an input signal, a photodiode array arranged to receive the light signal from the light emitting diode, and a photovoltaic force of the photodiode array applied between the gate and source. The output MOSFET switches between conduction and non-conduction between the drain and source, and the output MOSFET gate and
A normally-on type first control transistor constitutes a discharge path for accumulated charge between the sources, and a photocurrent of the photodiode array is passed through the first control transistor to cause the first control transistor to An impedance element that generates a voltage to bias the high resistance state and the first control transistor have different conductivity types, and are connected in series to the impedance element to bias the first control transistor to the high resistance state. a normally-on type second control transistor that is biased to a high resistance state by the voltage across the first control transistor, and a series circuit of the impedance element and the second control transistor. An optically coupled relay circuit characterized by comprising voltage regulating elements connected in parallel.