JPH0230634B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an imaging device that can easily switch between continuous imaging and one-shot imaging.

Conventional video cameras have been capable of only continuous imaging, and have been unable to capture only one shot. It is an object of the present invention to provide a new and improved imaging device that can solve these problems.

Therefore, in the present invention, when switching from continuous mode to one-shot imaging or still mode imaging, the synchronizing signal generating means is changed to perform new accumulation and scanning completely different from the previous scanning cycle by operating the switch means. ing.

In addition, by configuring the exposure parameter to be switched only during this still mode and to return to the original value when returning to the continuous mode, the monitor and the like can be stabilized. Further, a storage means is provided for temporarily storing the video output from the imaging means during the continuous mode, and this storage is reset periodically, and this resetting is canceled by switching to the still mode, and the contents of the storage means are is guided to the monitoring means, so even if the still mode is entered for a short time during the continuous mode, the monitor will not be disturbed.

Furthermore, the present invention has a means for periodically sampling and holding a part of the output of the imaging means during continuous mode, and uses this output as subject brightness information and stops this sampling when switching to still mode. By doing so, the information in continuous mode can be used as is.

Furthermore, since a shutter is provided to prohibit light from entering the image sensor at least during the charge transfer period in the still mode, it is possible to suppress the occurrence of smear.

The present invention will be explained in detail below based on the drawings.

FIG. 1 is a block diagram showing an example of the configuration of the imaging device of the present invention, FIG. 2 is a diagram showing the timing of the main parts of the same block diagram, and FIG. 3 is the logic of the mode selector, continuous mode instruction circuit, etc. shown in the first diagram. FIG. 4 is a schematic diagram of the configuration of the image sensor.

In the figure, LS is the imaging optical system, AP is the aperture, SHT is the shutter, ID is the solid-state image sensor, PS1 is the process circuit, and MTX is the R (red) and G from the process circuit.
PS2, a matrix circuit that converts (green) and B (blue) outputs into color difference signals R-Y, B-Y and luminance signal Y.
is the recording signal processing circuit, RH is the recording head, RG,
PG is a rack gear and a pinion gear, respectively, for shifting the head one track at a time.

M2 is a pulse motor for driving the pinion gear PG, and SMC is a shift control circuit that synchronously controls the pulse motor M2 using, for example, a vertical synchronization signal from a sequence control circuit SCTL, which will be described later.

D is a recording medium such as a magnetic disk, and the disk is rotated by a motor M1.
RMC is a disk motor control circuit that controls the rotation of the motor. Note that the output of the matrix circuit MTX can be connected to a monitor device via a switch SW4. DR1 is a driver circuit that generates drive pulses for storage, transfer, readout, etc. of the image sensor ID, and is synchronously controlled by the output of the synchronization signal generation circuit SYNC or the sequence control circuit SCTL. CR is the reference signal generator. IG is an integrating circuit which extracts and integrates the Y signal from the output of the matrix circuit MTX, and R is its reset terminal. This reset terminal R is connected to the synchronous signal generator.
The output terminal of a one-shot circuit OS1 is connected to form a pulse by the fall of the output of SYNC as shown in the second diagram.

SHC is a sample and hold circuit according to the present invention, which samples the output of the integration circuit at a predetermined timing and holds it until the next sampling point.
At the sample signal input terminal of S, the output of the one-shot circuit OS2, which forms a pulse at the rising edge of the synchronizing signal generator output, is inputted via an AND gate.

The output of the sample hold circuit SHC is an arithmetic circuit
The output of the accumulation time setting circuit SE1 inputted in advance or the fixed accumulation time instruction circuit SE input to OP
2 or the output of the aperture value setting circuit SE3, and is selectively output to the output A or B according to the states of the control inputs a to c as shown in FIG.

The control input terminals a to c are connected to the output of the mode selector MS and the continuous mode indicating circuit CD via gate circuits G4 and G5, respectively.
Gates G4 and G5 are controlled by the Q output of the RS flip-flop FF, and when the Q output is at a high level, G4 opens and G5 closes. The opposite is true when the Q output is at low level.

A coil of an ammeter AM is connected to the A output of the arithmetic circuit OP via a drive circuit DR2, and the amount of current applied to the ammeter AM changes depending on the level of the A output. Further, the movable part of the ammeter is configured to change the aperture amount of the aperture AP.

The B output terminal of the arithmetic circuit OP is an A/D converter.
It is connected to a preset input terminal Pre of a presettable counter CNT via an ADC, and the output of the reference oscillator is input to the clock input CL of the counter. C is an output terminal that generates one pulse when the clock is counted up to a preset value, and R is a reset input terminal, which is connected to the Q output of the flip-flop FF. The output terminal C is input to the shutter drive circuit DR3 via a rise-synchronized one-shot circuit OS3 having a predetermined pulse width (T ₂ in Fig. 2), and the shutter is closed only while the output of this one-shot circuit is at a high level. The magnet Mg is energized to make it happen. The shutter according to the present invention is different from the conventional shutter for silver halide film, and is designed to block light from entering the light receiving part of the image sensor during the transfer period from the light receiving part to the storage part. is biased in the direction of opening, and blocks light from entering the image sensor only while the magnet is energized.

The output of the one-shot circuit OS3 is input to the reset terminal of the flip-flop FF via a fall-synchronized one-shot circuit. GH is a recording/reproducing head according to the present invention, and while the Q output of the flip-flop FF is at a low level,
The video output of the recording signal processing circuit PS2 can be recorded on a predetermined track of the magnetic disk D via the switch SW5, and when the Q output of the flip-flop becomes high level, the recording is performed by switching to the e side. The reproduced video signal is guided to a reproduced signal processing circuit PS3, and is configured to be monitored by a monitor device MTV via a switch SW4. The switches SW3 to SW5 are configured so that they are switched to the e side when the Q output of the flip-flop FF is at a high level, and to the d side when it is at a low level. The flip-flop FF is configured as shown in the figure and is set by turning on the still mode start switch SW2. Further, when SW1 is a continuous mode start switch and is turned on, the motor control circuit RMC is started.

Incidentally, the Q output of the flip-flop is connected to the remaining input terminal of the AND circuit AND. Further, the sequence control circuit SCTL is connected to the synchronization signal generation circuit SYNC in the still mode of the present invention.
Instead, it outputs a drive control signal to the driver circuit DR1 and also supplies a synchronization signal for synchronously shifting the head RH by the shift motor control circuit in continuous mode.

Next, the operation of the first illustrated block diagram will be explained based on FIGS. 1 to 4. Continuous mode switch SW1
When turned ON, the motor control circuit RMC is started, the rotation of the disk D is started, and the imaging system etc. are driven, and the synchronization signal generation circuit SYNC outputs a synchronization signal at a period _T0 as shown in the second diagram, for example.
This period T ₀ is set to 1/60 seconds, for example. This synchronizing signal is then supplied to the driver circuit DR1 via the switch SW3, and pulses φ ₁ to _{φ 3} as shown in the second diagram are generated. That is, φ ₁ is a transfer pulse that transfers the charge in the light receiving section 1 to the storage section S, φ ₂ is a transfer pulse that transfers the charge in the storage section S to the horizontal register HR, and φ ₃ outputs the charge in the horizontal register HR. This is a horizontal clock pulse for reading to amplifier AM. In addition, the image sensor shown in the fourth figure has a horizontal register HR.
An overflow drain OFD is provided near the register, and the barrier between it and the horizontal register has an anti-blooming barrier structure, so if only the transfer using φ ₁ and φ ₂ is performed without reading using the pulse φ ₃ , excessive Charge is absorbed from the horizontal register into the overflow drain.

As shown in the second diagram, the charge accumulated in the light receiving section 1 during the time _T4 is during the high level period _T3 of the synchronization signal.
is transferred to the storage section S by pulses φ ₁ and φ ₂ during
During the next low level period T ₄ , the data is shifted to the horizontal register one row at a time and read out by pulses φ ₂ and φ ₃ . This read signal is then sent to the process circuit PS1, matrix circuit MTX, and switch.
The signal is supplied to the monitor device MTV via the d side of SW4, and is repeatedly recorded on a predetermined track of the rotating disk via the recording signal processing circuit PS2, the d side of switch SW5, and the head GH. The motor control circuit RMC performs synchronous control so that the rotation period of the disk is equal to or an integral multiple of the period _T0 of the synchronization signal. Also, the recording/playback head
An erasing head is provided on the same track in front of the GH.

Further, in this continuous mode state, for example, the Y signal output of the matrix circuit MTX is periodically integrated by the integrating circuit IG, which is reset every time the synchronizing signal falls, and the integrated output is output immediately before this reset, that is, at the rising edge of the synchronizing signal. Each sample is sampled and held until the next sampling. Therefore, this sample-and-hold circuit output corresponds to the TTL photometric value, although it is delayed from the real time by the period T ₀ minutes. By inputting this photometric value E to the calculation circuit OP, it is calculated with the input information from the 1N terminal, and a combined output as shown in FIG. 3 is output from the terminals A and B. Also, the outputs from the A and B ends are, for example,
These are signals that correspond to Av and Tv obtained by APEX method calculations. Moreover, x and y indicate variables.

In addition, each control input terminal a of the arithmetic circuit OP,
Logic inputs as shown in FIG. 3 are input to b and c from the continuous mode instruction circuit CD or mode selector MS, respectively. For example, if continuous mode switch SW1 is
ON, when the steel mode switch SW2 is OFF, that is, in the continuous mode, the gate G5 is opened and the gate G4 is closed, so that the output value (010) of the circuit CD is supplied to the input terminals a to c. As a result, as shown in the third diagram, a signal corresponding to Av is output from the A terminal to control the aperture AP. Also, there is no output from the B terminal. In this way, in the continuous mode, the aperture is controlled based on the photometric value sampled and held, and the accumulation time of the image sensor is fixed at time _T4 .
As described above, the video signal is monitored and recorded in a predetermined field memory track. Also, moving images are recorded by the recording head RH while sequentially switching tracks for each field.

Next, after selecting the appropriate mode shown in Figure 3 using the mode selector MS, and setting the appropriate accumulation time, aperture, etc. using SE1 and SE3, turn on the steel mode switch SW2, the flip-flop FF is set, and the arithmetic circuit OP is set. Data from the selector MS is input to the control inputs a to c of the FF, and in response to this, the Q output of the FF becomes high level, the AND gate AND is closed, the sampling in the sample and hold circuit SHC is stopped, and the continuous mode is started. The photometric value E at is held. Further, since SW3 to SW5 are switched to the e side, the driver circuit DR1 supplies drive pulses φ ₁ and φ ₂ as shown in FIG. 2 in response to a signal generated by the sequence control circuit by setting the flip-flop FF. As a result, unnecessary charges within the light receiving section 1 are cleared. Furthermore, when the counter CNT is reset and the accumulation time T ₁ ' according to the preselected mode and set value has elapsed, a pulse is output from the C terminal, which is input to the sequence control circuit SCTL and sent through the driver circuit DR1. Transfer of charge from the light-receiving section of the image sensor to the storage section and reading pulses φ ₁ to _{φ 3} from the storage section start. or,
In synchronization with the rise of the pulse from the C terminal of the counter CNT, the one-shot circuit OS3 outputs a pulse with a pulse width _T2 shown in the second diagram, and during this time the magnet is activated and the shutter closes to prevent light from entering the light receiving section. . This prevents light from entering at least during the charge transfer period (T ₃ ) from the light receiving section 1 to the storage section S, thereby making it possible to prevent smearing. In this embodiment, the shutter is closed for _T2 , which is longer than the transfer period _T3 ', but this does not affect the response of the shutter.
This is because it is difficult to make the time shorter than T ₃ ', and there is no problem even if the time is longer than T ₃ '. Furthermore, in this embodiment, a reset signal for the flip-flop FF is generated by the one-shot OS4 in synchronization with the falling edge of the one-shot circuit OS3 in order to quickly return from the still mode to the continuous mode after reading out the signal from the image sensor. Therefore, it is desirable that the shutter closing time T ₃ is longer than the total time T ₀ required for reading. This is because if the continuous mode is returned too soon, a new image may be transferred to the storage section while the still mode 2 signal is being read. In this embodiment, it is set as T ₀ -T ₃ . Further, in this embodiment, the still mode photographing by the switch SW2 is maintained until a flip-flop reset input is input, even if the switch SW2 is turned on only momentarily.

Furthermore, by turning on switch SW2, the video signal that had been supplied from the matrix circuit MTX to the monitor device until then is switched to the playback output of the signal that was updated and recorded one field at a time during the continuous mode. Even when switching from continuous mode to still mode, the monitor image continues to display the previous image, and the screen does not disappear or become distorted.

In this embodiment, a predetermined track of a magnetic disk is used as the field memory, but the present invention is not limited to such an analog memory, and the output of the matrix circuit is always A/D converted and then converted into digital data. This can also be achieved by temporarily storing the memory and updating it for each field. In this case, by switching to still mode, the contents of the memory may be D/A converted and guided to the monitor. Further, in this embodiment, the Y signal is obtained from the output of the matrix circuit, but it may also be obtained by combining the outputs of the process circuit. A photometric value may be obtained by dedicating a part of the light-receiving section of the image sensor to photometry and integrating the output therefrom.

The imaging means is not limited to a frame transfer type CCD as shown in FIG. 4, but may be an interline transfer type.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the imaging device of the present invention, FIG. 2 is a timing diagram of main parts of the circuit shown in FIG. 1, FIG. 3 is an input/output state diagram of the arithmetic circuit OP, and FIG.
The figure is a diagram showing an example of an image sensor applied to the present invention. AP...Aperture means, SHT...Shutter means, ID...Image sensor, DR ₁ ...Driver circuit, IG...Integrator circuit,
SHC...sample hold circuit, GH...memory write/read head, MTV...monitor device,
OP...Arithmetic circuit.

Claims (1)

[Scope of Claims] 1. A switching means for switching between a video shooting mode and a still image shooting mode, an imaging means for taking an optical image, and a device for periodically scanning the imaging means while the video shooting mode is selected by the switching means. and a video exposure control means that automatically continuously controls the exposure of the imaging means using the output from the imaging means; a parameter setting means that can preset exposure parameters for a still image shooting mode; and the switching means As the video shooting mode is switched to the still image shooting mode, the output of the imaging means formed in the video shooting mode is held, and the output of the imaging means that is held and the output set in advance by the parameter setting means are stored. a still image that performs exposure control for the still image shooting mode using the exposure control signal formed by the calculation means; An imaging device comprising an exposure control means for