JPH02302074A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To acquire a by-pass capacitor of a small occupied area, a large capacity, and a low impedance by forming a diffusion layer of high concentration of the same conductivity type as that of a semiconductor substrate thereon, by forming an insulating layer thereon, by forming a gate electrode on the insulating layer, and by constituting a gate structure of MIS-type. CONSTITUTION:A high concentration diffusion layer 2 of P-type is formed on a P-type semiconductor substrate 1. An insulating layer 3 is formed thereon, and a gate electrode 4 is formed on the insulating layer 3. A part of the insulating layer 3 on the diffusion layer 2 wherein the gate electrode 4 is not formed is removed to realize contact with the substrate; and a contact with an aluminum wiring 5b at the side of grounding is provided to reverse-bias a gate. An aluminum wiring 5a at the power side is brought into contact with the gate electrode 4. An element which is constituted and connected as above has a gate capacity by reverse-bias and serves as a by-pass capacitor between a power source and a wiring of grounding. Since a diffusion layer 2 of the game conductivity type as that of the substrate 1 is formed thereon, a capacitor of a low impedance can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to a semiconductor integrated circuit, and particularly to the structure of a capacitor provided between its power source and ground.

<Prior Art> FIG. 3 shows a cross-sectional view of a capacitor structure provided in a conventional semiconductor integrated circuit. In the figure, a diffusion layer (2a) of a conductivity type opposite to that of the semiconductor substrate and a diffusion layer (2b) of the same conductivity type as the semiconductor substrate are formed on a semiconductor substrate <1), and each diffusion layer /l (2m) (2b ) and a diffusion layer (2b) of the same conductivity type as the semiconductor substrate, and each diffusion layer (2b) is formed.
2m) (2b) and the wiring connected to the power supply (5m)
, make contact with the wiring (5b) connected to ground.

The N-type diffusion layer (2a) has a wiring (
5), and the P-type diffusion layer (2b) is contacted with the wiring (5b) connected to ground.

By connecting as above, a junction capacitance is generated between the semiconductor substrate (1) and the diffusion layer (2) of the opposite conductivity type, and a capacitor is inserted between the power supply and ground. This capacitance functions as a bypass capacitor.

<Problems to be Solved by the Invention> Conventional bypass capacitors formed inside semiconductor integrated circuits have the above-mentioned configuration, and as semiconductor integrated circuits become smaller and more highly integrated, Reducing noise voltage and minimizing fluctuations in power supply voltage are important issues. Bypass capacitors formed in IC chips using such conventional methods use junction capacitance, so the capacitance relative to the area occupied by the bypass capacitor is small, and in order to maximize the effect of the bypass capacitor, requires an increase in the area occupied by the bypass capacitor within the chip. This is a problem that is contradictory to high integration. Further, since a diffusion layer of a conductivity type opposite to that of the semiconductor substrate is formed, there are problems such as an increase in impedance.

This invention was made in order to solve the above-mentioned problems, and when forming a noise/fs capacitor inside a semiconductor integrated circuit, the area occupied by the s The purpose is to obtain a bypass capacitor with high capacity and low impedance.

Means for Solving the Problems> In the semiconductor integrated circuit according to the present invention, a heavily doped diffusion layer having the same conductivity type as the semiconductor substrate is formed on a semiconductor substrate, and an insulating layer is formed on the highly doped diffusion layer. Furthermore, a gate Wl pole is formed on this insulating layer to constitute a MIS type gate structure.

Effect> Since the bypass capacitor in this invention uses an MIg type gate structure, a capacitor with a large ratio of capacitance to occupied area can be obtained, and the diffusion layer is a highly concentrated diffusion layer having the same conductivity type as the semiconductor substrate. Therefore, a capacitor with low impedance can be obtained.

<Example> An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a sectional view of a semiconductor integrated circuit according to an embodiment of the present invention. In the figure, a P-type semiconductor substrate (1) J:
A P-type high concentration diffusion layer (2) is formed. An insulating layer (3) is formed on this P-type high concentration diffusion layer (2), and a gate electrode (4) is further formed on this insulating layer (3). In order to make contact with the semiconductor substrate, a part of the insulation/I (3) on the high concentration diffusion layer (2) where the gate electrode (4) is not formed is removed, and the ground side is removed so that the gate is reverse biased. Make contact with the aluminum wiring (5b). The aluminum wiring (5S) on the power supply side makes contact with the gate electrode (4).

The element configured and connected as described above has a gate capacitance due to reverse bias of the gate between the power supply and ground wirings, and serves as a bypass capacitor. In addition, a high concentration diffusion layer (of the same conductivity type) (
2), it becomes a low impedance bypass capacitor.

FIG. 2 is a plan view of the structure shown in FIG. 1.

Aluminum wiring connected to the power supply in semiconductor integrated circuits (
5) and the bottom 1 of the aluminum wiring (5b) connected to ground?
(c) By arranging and forming the bypass capacitors having the above-mentioned gate structure and making contact with them through contacts (6a) and (6b), the pass capacitors do not occupy any area on the integrated circuit chip by themselves.

Although the above example shows the case where a P-type semiconductor substrate (1) is used, the conductivity type of the substrate does not matter as long as the gate is connected between the power supply and ground so that it is reverse biased. do not have. Further, although the case where aluminum is used for the power supply and ground wiring is shown, this wiring is not limited to aluminum either.

<Effects of the Invention> As described above, according to the present invention, an MIS type gate structure is formed in which a highly doped diffusion layer of the same conductivity type as the semiconductor substrate is formed, so that the capacitance ratio to the occupied area is large and low. Impedance bypass capacitor can be obtained,
Furthermore, since it can be formed below the power supply and ground wiring, it is possible to avoid the bypass capacitor from occupying the area on the integrated circuit chip by itself.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a semiconductor integrated circuit according to an embodiment of the present invention, FIG. 2 is a plan view of the semiconductor integrated circuit of FIG. 1, and FIG.
The figure is a cross-sectional view of a conventional semiconductor integrated circuit. In the figure, (1) is a semiconductor substrate, (2), (2m
), (2b) is a high concentration diffusion layer, (3) is an insulating layer, (
4) is a gate electrode, (5m) and (sb) are aluminum wirings, and (6) and (6b) are contacts. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] A semiconductor substrate, a highly concentrated diffusion layer formed on this semiconductor substrate and having the same conductivity type as the substrate, an insulating layer formed on this diffusion layer, and a layer formed on this insulating layer to make direct or ohmic contact. a first electrode to be connected to a power source or ground using means of the above, and a second electrode formed on the high concentration diffusion layer and to be connected to the power source or ground, the diffusion layer and the insulating layer. and a semiconductor integrated circuit, characterized in that the first electrode constitutes a gate.