JPH02285421A - Execution time control circuit - Google Patents

Abstract

PURPOSE:To easily cope with the change of an execution time by controlling a basic clock according to execution time information indicating the execution corresponding to an instruction. CONSTITUTION:A clock control circuit 4 controls the basic clock signal sent from a clock oscillator 5 through a basic clock signal line 105 according to the contents of an execution time field part 33 sent from an instruction register 3, and sends the controlled basic clock signal to an arithmetic control part 6 through a clock signal line 106. The arithmetic control part 6 operates based upon the period of this clock signal according to the contents of an operator code part 31 and an operand part 32 sent from the instruction register 3, and also sends the address of an instruction to be executed to an address register 7 through an address line 107. Then the address register 7 is stored with the address and supplies it to a ROM 1 and a RAM 2 through an address line 108. Consequently, the change of execution time is easily made to cope with.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to an execution time control circuit, and more particularly to an execution time control method in a microprocessor that operates with instructions having different execution times.

BACKGROUND ART Conventionally, in this type of microprocessor, an operational code in an instruction is decoded by hardware, and the execution time is determined based on the content.

In microprocessors in which the execution time can be specified using part of the field of the opcode, instructions including the opcode field are stored in a read-only control memory or a control memory that can be read and written at any time.

In such conventional microprocessors, the obecode in the instruction is decoded by hardware, and the execution time is determined based on the contents. Therefore, the execution time cannot be changed, and the When it is incorporated into a device, it has the disadvantage that performance deteriorates because the execution time cannot be optimized.

Also, in order to secure a certain amount of time in a microprogram, useless instructions (no-op; no-operatlon I) are used.
n5tructlon, etc.), there is a drawback that the number of steps of the microbroderum increases.

Additionally, if the instruction containing the opcode field is stored in read-only control memory, any changes to the microprogram that cause the execution time to change;
The disadvantage is that the entire control memory must be replaced, and if instructions including an opcode field are stored in control memory that can be read and written at any time, the firmware can be rewritten with a microprogram whose execution time has been changed. The drawback is that it takes a long time to load.

Purpose of the Invention The present invention has been made to eliminate the above-mentioned drawbacks of the conventional ones, and can be incorporated into devices with different operating clocks without deteriorating performance, and can maintain control even when the execution time changes. An object of the present invention is to provide an execution time control circuit capable of responding to changes in execution time without replacing memory.

Composition of the Invention The execution time control circuit according to the present invention is an execution time control circuit for a microprocessor that operates according to instructions having different execution times, and includes a first read-only circuit for storing the instructions.
a storage means, a readable and writable second storage means for storing execution time information indicating an execution time corresponding to the instruction in correspondence with an address of the first storage means, and the first storage means. When the instruction is read from the second
and clock control means for controlling a basic clock signal in accordance with the execution time information corresponding to the instruction read from the storage means.

Embodiment Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, a ROM (read only memory) 1 stores a microprogram, and the microprogram is sent to an instruction register 3 via a data line 101.

A RAM (random access memory) 2 stores an execution time field indicating the execution time of the instruction corresponding to each instruction of the microprogram stored in the ROM 1, and this execution time field is transmitted via a data line 102. It is sent to instruction register 3.

The microprogram sent from the ROM 1 is stored in the opcode section 31 and operand section 32 of the instruction register 3, and the contents of the opcode section 31 and operand section 32 are sent to the arithmetic control section 6 via the instruction information line 103.
sent to.

Further, the execution time field sent from the RAM 2 is stored in the execution time field section 33 of the instruction register 3, and the contents of the execution time field section 33 are sent to the clock control circuit 4 via the execution time control information line 104. be done.

The clock control circuit 4 controls the basic clock signal sent from the clock oscillator 5 via the basic clock signal line 105 according to the contents of the execution time field part 33 sent from the instruction register 3, and The calculated basic clock signal is sent to the arithmetic control section 6 via the clock signal line 10B.

The arithmetic control unit 6 uses the clock signal sent from the clock control circuit 4 as its cycle and operates according to the contents of the opcode section 31 and operand section 32 sent from the instruction register 3, and also determines the next instruction to be executed. The address is sent to the address register 7 via the address line 107.

Address register 7 stores the address sent from arithmetic control unit 6, and supplies the address to ROMI and RAM 2 via address line 108.

FIG. 2 is a time chart showing the operation of one embodiment of the present invention. The operation of an embodiment of the present invention will be explained using FIG. 1 and FIG. 2.

By the address supplied from address register 7, R
When the microprogram and execution time field are read from OMI and RAM2, respectively, the microprogram and execution time field are stored in instruction register 3.
is stored in

At this time, when °3° is stored as the execution time field in the execution time field section 33, the clock control circuit 4
Then, the basic clock signal from the clock oscillator 5 is suppressed for 3' clocks specified by the contents of the execution time field section 33, and the clock signal is sent to the arithmetic control section 6.

That is, the clock control circuit 4 can change the clock signal to the arithmetic control section 6 according to the contents of the execution time field section 33, regardless of the type of instruction.

The arithmetic control section 6 operates the operation code section 31 and the operand section 3 using the clock signal from the clock control circuit 4 as a period.
2, the operations according to the contents of the opcode section 31 and the operand section 32 are performed at the corresponding execution times.

In this way, by controlling the basic clock signal from the clock oscillator 5 by the clock control circuit 4 according to the execution time field read from the RAM 2 when the microprogram is read from the ROM 1, the same instruction However, since the execution time can be changed arbitrarily, there is no need for unnecessary instructions to secure a certain amount of time in the microprogram, and the number of steps in the microprogram can be reduced compared to the conventional method.

Furthermore, since the execution time field stored in the RAM 2 can be rewritten, the system can be incorporated into devices with different operating clocks without deteriorating performance.

Furthermore, even if the execution time changes due to a change in the microprogram, this can be handled by rewriting the execution time field stored in RAM2, eliminating the need to replace the entire control memory and reducing the hardware Even when a problem occurs, it can be easily dealt with using a microprogram by changing the execution time field stored in the RAM 2.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, when an instruction is read from a read-only storage means, the execution time corresponding to the instruction is stored in the readable/writable storage means corresponding to the instruction. By reading the execution time information indicating the execution time and controlling the basic clock signal according to this execution time information, it is possible to incorporate it into a device with a different operating clock without deteriorating the performance, and the execution time can be changed. This has the effect of being able to respond to changes in execution time without replacing the control memory even if such changes occur.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a time chart showing the operation of the embodiment of the present invention. Explanation of symbols of main parts 1...ROM 2...RAM 4...Clock control circuit 6...Arithmetic control section

Claims (1)

[Claims] (1) An execution time control circuit for a microprocessor that operates according to instructions having different execution times, including a read-only first storage means for storing the instructions, and execution time information indicating the execution time corresponding to the instructions. a readable and writable second storage means that stores the commands corresponding to addresses of the first storage means; and when the instruction is read from the first storage means, the instruction is read from the second storage means. an execution time control circuit comprising clock control means for controlling a basic clock signal according to the execution time information corresponding to the instruction to be executed.