JPH02272775A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent recording information due to radiation of an ultraviolet ray from breaking down by forming an insulating film on a semiconductor substrate and a floating gate electrode, and covering the upper face and side face of the electrode with a conductive film which reflects and absorbs the ultraviolet ray. CONSTITUTION:An insulating film 8 is formed on a substrate 1 and a floating gate electrode 7 of a nonvolatile memory cell, and a contact hole 9' which reaches a drain region 4 is formed at a predetermined part of the film 8. Then, a conductive film 9 for reflecting and absorbing an ultraviolet ray is so formed on the film 8 and the region 4 exposed via the hole 9' to cover the upper and side faces of the electrode 7. With this structure, the ultraviolet ray advanced to the film 8 is almost absorbed by repeatedly reflecting between a semiconductor substrate 1 and the film 9. Accordingly, information is not erased by radiation of the ultraviolet ray, and information regarding manufacture of permanent recording and retaining can be written similarly to the normal writing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a nonvolatile memory element having a gate electrode structure of one or more layers.

(Prior Art) Conventionally, a memory cell of a rewritable read-only memory (hereinafter referred to as "EPROMJ") having a gate electrode structure of one or more layers, for example, a two-layer polycrystalline silicon structure, has a gate electrode structure of one or more layers.
It has a planar pattern and cross-sectional structure as shown in Figures (a) to (C).

In addition, in the same figure (a), the BB' cross section is the same figure (b)
A cross section taken along line cc' is shown in FIG. Also,
21 is a silicon substrate, 22 is a field oxide film, 23 is a drain (D) region, 24 is a source (S) region, 25 is a first gate oxide film, 2B is a floating gate electrode, 27 is a second
A gate oxide film, 28 a control gate electrode, 29 a word line, 30 a silicon oxide film, 31 an interlayer insulating film, 32 a bit line, and 33 a drain contact portion, respectively.

To write information to the EPROM cell, a high voltage is applied to the control gate electrode 28 and the drain region 23 to generate channel electrons.
This is done by injecting electrons into the cell to raise the threshold of the cell transistor. Information is erased using ultraviolet light (UV light)
This is done by irradiating the floating gate electrode 2B with energy to make the electrons in the floating gate electrode 2B jump over the barrier of the gate oxide film. In this case, usually the control gate electrode 28
Since the floating gate electrode 26 and the floating gate electrode 26 are formed in a self-aligned manner, it is possible to directly irradiate the side end surfaces of the floating gate electrode 26 with ultraviolet rays. Therefore, it is possible to erase information at a sufficiently high speed.

By the way, when manufacturing an EFROM integrated circuit or a memory-embedded integrated circuit incorporating an EFROM, it is necessary to record and hold information related to manufacturing (codes, redundant data, etc.) in the semiconductor chip. Further, it is preferable to keep records of this information permanently. However, if this information is stored in an EPROM cell, the recorded data will be destroyed when ultraviolet rays are subsequently applied. Therefore, in such an EPROM cell,
A fuse element is formed within the semiconductor chip to prevent information from being destroyed even when exposed to ultraviolet light. Then, the fuse element is blown by laser beam irradiation in accordance with the recorded information to write the information.

However, such writing by laser beam irradiation is undesirable because it causes physical meltdown due to an overcurrent pulse, which damages the semiconductor chip. Another drawback is that it cannot be written to after packaging. Furthermore, when blowing out the fuse, related equipment and processes are required, which is disadvantageous in terms of cost.

(Problems to be Solved by the Invention) As described above, conventionally, in order to permanently record and retain information related to manufacturing, fuse elements were fused by laser beam irradiation according to the recorded information. This has the disadvantage that it damages the semiconductor chip and that writing cannot be performed after packaging. Furthermore, when blowing out the fuse, related equipment and processes are required, which is disadvantageous in terms of cost.

Therefore, the present invention has been made to solve the drawbacks associated with writing information related to manufacturing by blowing out such a fuse, and is similar to a normal EPROM cell, and
It is an object of the present invention to provide a semiconductor device in which information can be written without fuse blowout and which can function as a FROM in which information is not destroyed even when irradiated with ultraviolet rays.

[Structure of the Invention] (Means for Solving Problems with Sectional Problems) In order to achieve the above object, the semiconductor device of the present invention is configured to cover the floating gate electrode of an EPROM cell having a one-layer polycrystalline silicon structure, for example. A conductive film is formed thereon. The conductive film is formed on the semiconductor substrate and the floating gate electrode via an insulating film, the conductive film is formed so as to completely cover the upper surface and side surfaces of the floating gate electrode, and the conductive film is formed on the source and drain electrodes. It is characterized by contacting either one of the regions and by reflecting and absorbing ultraviolet light.

Further, as the conductive film, for example, a polycrystalline silicon film,
It is preferable to use a single crystal silicon film or the like.

Furthermore, in addition to these, a conductive film and a source or drain region retaining contact portion are formed to surround the floating gate electrode.

(Function) In the semiconductor device of the present invention having such a configuration, the upper and side surfaces of the floating gate electrode are covered with a conductive film that reflects and absorbs ultraviolet rays, so that the floating gate electrode is protected from irradiated ultraviolet rays. be able to. Furthermore, since a conductive film is also formed on the semiconductor substrate via an insulating film, the ultraviolet rays that enter the insulating film are repeatedly reflected between the semiconductor substrate and the conductive film. However, it is absorbed and never reaches the floating gate electrode.

Furthermore, the conductive film is in contact with a source or drain region, or this contact portion is formed so as to surround the floating gate electrode. That is, since the floating gate electrode is formed so as to be surrounded by the semiconductor substrate and the conductive film via the contact portion, it becomes difficult for ultraviolet rays to even enter the insulating film. Therefore, it is possible to provide an EFROM that can function as a FROM whose information is not erased by ultraviolet light.

Furthermore, in the ultraviolet wavelength region (lnm to 400 nm), the conductive silicon film has particularly good absorption, so it is effective to use a polycrystalline silicon film, a single crystal silicon film, or the like as the conductive film. Furthermore, in a polycrystalline silicon film with a rough surface, ultraviolet rays are diffusely reflected and difficult to reach the floating gate electrode, making it even more effective.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIGS. 1(a) to (c) show an embodiment in which the present invention is applied to an EFROM cell with a single-layer polycrystalline silicon structure, and a planar pattern of a semiconductor device functioning as a FROM whose information cannot be erased by ultraviolet rays. and shows the cross-sectional structure.

In addition, in the same figure (a), the I-1' cross section is the same figure (b).
A cross section taken along the line ■-■' is shown in the same figure (C).

A field oxide film 2 is formed on the surface of a p-type silicon substrate 1, forming an element isolation region and an element active region. Surface portion of the element active region: source (S) region 3, drain (D) region 4, and control gate region (G) 5
is formed.

On the channel region between the source region 3 and the drain region 4,
Furthermore, on the control gate region 5, a floating gate electrode 7 is formed in an electrically floating state with a silicon oxide film 6 interposed therebetween. Note that this floating gate electrode 7 is made of polycrystalline silicon doped with impurities. A thin insulating film 8 of about 300 layers is formed on the substrate 1 and the floating gate electrode 7 . Further, a contact hole reaching the drain region 4 is formed in a predetermined portion of the insulating film 8 . A conductive film 9 made of, for example, polycrystalline silicon containing n-type impurities is formed on the insulating film 8 and the drain region 4 exposed through the contact hole so as to cover the floating gate electrode 7. Further, an interlayer insulating film 10 is formed on this conductive film 9.
Contact holes reaching the source region 3, control gate region 5, and conductive film 9 are formed in predetermined portions of the substrate.

Further, an AΩ source line 11 is formed through a contact hole reaching the source region 3. In addition, the conductive film 9
A47 bit line 12 through a contact hole that reaches
is formed. Further, a 647 control signal line 13 is formed through a contact hole reaching the control gate region 5. Here, the contact part between the drain region 4 and the conductive film 9 is 9', the contact part between the source region 3 and the source line 11 is 11', the contact part between the conductive film 9 and the bit line 12 is 12', and the control gate region 5 is Contact portions with the control signal line 13 are indicated by 13'.

That is, an EFROM with such a single layer polycrystalline silicon structure
The cell is formed so that the drain region 4 surrounds the floating gate electrode 7 to the extent that it is electrically insulated from the source region 3 and control gate region 5. Further, the source region 3 is extended so that the contact portion 11' with the source line 11, and the contact portion 13' with the control signal line 13 of the control gate region 5 are provided sufficiently apart from the floating gate electrode 7. It is formed by Further, a contact portion 9' between the drain region 4 and the conductive film 9 has almost the same pattern as the drain region 4, and is formed to surround the floating gate electrode 7. The conductive film 9 completely covers the upper surface and side surfaces of the floating gate electrode 7, and the conductive film 9 extends up to the end of the substrate (including the source region 3, drain region 4, and control gate region 5; the same applies hereinafter) l and the conductive film 9. It has a structure in which a thin insulating film 8 is sandwiched between films 9, and is formed sufficiently long. That is,
The conductive film 9 covers the source region 3 and the control signal line 1 excluding the drain region 4 and the contact portion 11' with the source line 11.
3, a pattern is formed covering the control gate region 5 except for the tact portion 13'. Note that the source region 3 of the contact portion 11' that is not covered with the conductive film 9 is completely covered with the source line 11.

Further, the control gate region 5 of the contact portion 13' is completely covered by the control signal line 13.

According to the EPROM cell with the above structure, data can be written in the same way as in a normal EFROM, but
It is impossible to erase data by UV irradiation. That is, in data writing, a high voltage write voltage VFP is applied to the control gate region 5 through the control signal line 13, and at the same time, the voltage vP is also applied to the drain region 4 through the bit line 2 and the conductive film 9.

This is done by applying . On the other hand, suppose that, for example, when irradiating ultraviolet rays to erase data on an EPROM cell in a memory cell array, the EPROM cell having the above structure is also irradiated with ultraviolet rays. At this time, the ultraviolet rays irradiated on the EPROM cell with the above structure enter the conductive film 9 formed to cover the entire floating gate electrode 7 and are absorbed after about 50 people. cannot be reached. Furthermore, even if the ultraviolet rays enter through the thin insulating film 8 between the substrate l and the conductive film 9,
This ultraviolet light never reaches the floating gate electrode 7. This has a structure in which the path of ultraviolet light (insulating film 8) that should reach floating gate electrode 7 is sandwiched between two silicon crystals (substrate 1 and conductive film (polycrystalline silicon film) 9), and This is because the distance to the floating gate electrode 7 is sufficiently long. That is, the ultraviolet rays that have entered the thin insulating film 8 are absorbed and attenuated by the substrate 1 and the conductive film 9 as they are repeatedly reflected between them.

Furthermore, since the floating gate electrode 7 is formed so as to be surrounded by the substrate 1 and the conductive film 9 via the contact portion 9', it is difficult for ultraviolet rays to even penetrate into the insulating film 8. Moreover, since the source region 3 of the contact section 11' that is not covered with the conductive film 9 is completely covered by the source line 11, and the control gate region 5 of the contact section 13' is completely covered by the control signal line 13, ultraviolet rays are It has become even more difficult to reach the floating gate electrode 7. Therefore, E of the above structure
A PROM cell can be written to like a normal EPROM cell, but it can also function as a FROM, where information cannot be erased by ultraviolet light.

Incidentally, the thickness of the thin insulating film 8 sandwiched between two silicon crystals, the length to the floating gate electrode 7, etc. vary depending on various conditions such as the cell pattern and the intensity of ultraviolet rays, but the effect of attenuating ultraviolet rays can be obtained. As long as it is within the range. That is,
It is necessary that the ultraviolet rays that have entered the insulating film 8 be absorbed by the substrate 1 and the conductive film 9 while being repeatedly reflected between them and not reach the floating gate 7.

Note that in the above embodiment, the conductive film 9 was made of polycrystalline silicon doped with n-type impurities, but instead of this,
Single-crystal silicon may be formed by epitaxial growth after a drain contact hole is opened in the thin insulating film 8. Further, a conductive film that absorbs and reflects ultraviolet rays, such as silicide, is also effective.

[Effects of the Invention] As described above, the semiconductor device of the present invention provides the following effects.

In an EFROM having a single-layer polycrystalline silicon structure, the upper and side surfaces of the floating gate electrode are covered with a conductive film that reflects and absorbs ultraviolet rays, so that the floating gate electrode can be protected from irradiated ultraviolet rays. Furthermore, since a conductive film is also formed on the semiconductor substrate via an insulating film, the ultraviolet rays that enter the insulating film are repeatedly reflected between the semiconductor substrate and the conductive film. It is mostly absorbed and never reaches the floating gate electrode.

Furthermore, since the contact portion between the conductive film and the source or drain region is formed so as to surround the floating gate electrode, it becomes difficult for ultraviolet rays to even enter the insulating film. Therefore, it is possible to have a nonvolatile memory cell that can function as a FROM, in which data can be written in like a normal EFROM, but data cannot be erased by ultraviolet irradiation. Therefore, it becomes possible to easily write manufacturing information for permanent storage into memory cells, and it is effective when applied to EFROM memories, EPROM-equipped one-chip micros, and computers.

[Brief explanation of drawings]

FIG. 1(a) shows the EF of the one-layer polycrystalline silicon structure of the present invention.
A plane pattern showing a ROM cell, FIG. 1(b) is shown in the same figure (
1(c) is a cross-sectional view taken along line I-1' in a).
Fig. 2(a) is a plane pattern showing a conventional EFROM cell; Fig. 2(b) is a cross-sectional view taken along line BB' in Fig. 2(a). FIG. 2(c) is a sectional view taken along line cc' in FIG. 2(a). DESCRIPTION OF SYMBOLS 1...p-type silicon substrate, 2...field oxide film, 3...source (S) region, 4...drain (D)
region, 5... control gate (G) region, 6... silicon oxide film, 7... floating gate electrode, 8... insulating film,
9... Conductive film, 9'... Conductive film contact portion, 10
...Interlayer insulating film, 11...source line, 11'...
Source line contact portion, 12...Bit line, 12'...
...Bit line contact portion, 13...Control signal line, 1
3'...Control signal line contact section. Applicant's agent Patent attorney Takehiko Suzue (b) Hie (a) Figure 1 (C) Figure 1-39□1-

Claims (1)

Scope of Claims: (1) a control gate region formed in a surface region of a semiconductor substrate; source and drain regions electrically insulated from the control gate region and formed in the surface region of the semiconductor substrate; In a nonvolatile memory element having a floating gate electrode formed on the control gate region and a channel region between the source and drain regions via an insulating film, (1) an insulating film is formed on the semiconductor substrate and the floating gate electrode; (2) being formed so as to cover the top and side surfaces of the floating gate electrode; (3) being in contact with either one of the source and drain regions; and (4) A semiconductor device comprising a conductive film that reflects and absorbs ultraviolet rays. (2) A semiconductor device, wherein the conductive film according to claim 1 is a single crystal silicon film grown by epitaxial growth. (3) A semiconductor device, wherein the conductive film according to claim 1 is a polycrystalline silicon film. (4) In the semiconductor device according to claim 1, 2 or 3,
A semiconductor device characterized in that a contact portion between a conductive film and a source or drain region is formed to surround a floating gate electrode.