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JPH02268460A - Electrostatic breakdown preventing circuit - Google Patents

Electrostatic breakdown preventing circuit

Info

Publication number
JPH02268460A
JPH02268460A JP1090115A JP9011589A JPH02268460A JP H02268460 A JPH02268460 A JP H02268460A JP 1090115 A JP1090115 A JP 1090115A JP 9011589 A JP9011589 A JP 9011589A JP H02268460 A JPH02268460 A JP H02268460A
Authority
JP
Japan
Prior art keywords
diode
voltage
electrostatic breakdown
input terminal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1090115A
Other languages
Japanese (ja)
Inventor
Yoshiya Takeda
悦矢 武田
Yutaka Minamino
裕 南野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1090115A priority Critical patent/JPH02268460A/en
Publication of JPH02268460A publication Critical patent/JPH02268460A/en
Pending legal-status Critical Current

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  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent electrostatic breakdown by connecting two diodes in a specified direction between an outer input terminal and an inner circuit of an IC device and by realizing specified relationship between a driving voltage range of the IC and a threshold voltage of the diode. CONSTITUTION:Diodes D13 and D22 are connected to an outer connecting terminal 4 of a gate electrode busbar of an inner circuit 1 which consists of an aSi thin film transistor array formed on a glass substrate. The other ends 5, 6 of the diode are connected to a source electrode busbar. A threshold voltage of the diode is made Vt1, and Vt2; and -Vt2<Vd<Vt1 is selected as a range of a driving voltage Vd of the inner circuit. According to this constitution, when a voltage not less than the inner driving voltage Vd is applied to an external terminal 4, a current flows through the diode and a high surge voltage is not applied to the inner circuit 1. When a voltage is not exceeding the threshold of the diode, it is transmitted to the inner circuit. A diode can be realized by n<+>aSi/iaSi/SiNx and composition of SiNx can control a threshold by film thickness.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は静電破壊防止回路に間する。[Detailed description of the invention] Industrial applications The present invention relates to an electrostatic damage prevention circuit.

従来の技術 第3図に従来の静電破壊防止回路の例を示す。Conventional technology FIG. 3 shows an example of a conventional electrostatic damage prevention circuit.

同図に示される静電破壊防止回路は半導体集積回路の外
部入力端子4と内部回路lとの間に設置されるものであ
る。外部入力端子4から接地電位に逆方向に接続された
ダイオードDoll、外部入力端子4から電源電位に順
方向に接続されたダイオードD210を接地している。
The electrostatic damage prevention circuit shown in the figure is installed between an external input terminal 4 and an internal circuit 1 of a semiconductor integrated circuit. A diode Doll connected from the external input terminal 4 to the ground potential in the reverse direction, and a diode D210 connected from the external input terminal 4 to the power supply potential in the forward direction are grounded.

これによれば、負極性の高圧サージは第1のダイオード
D111によって接地電位にクランプされ、正極性の高
圧サージは第2のダイオードD212によって電源電位
V c cにクランプされ、正負いずれに極性の高圧サ
ージに対しても十分な静電破壊防止の効果が得られる。
According to this, a high voltage surge of negative polarity is clamped to the ground potential by the first diode D111, and a high voltage surge of positive polarity is clamped to the power supply potential V c c by the second diode D212. Sufficient electrostatic damage prevention effects can be obtained even against surges.

静電破壊は、とくに絶縁層上に形成する薄膜トランジス
タ(TPT)アレー基板基板においては深刻な問題であ
った。そこでゲート母線どうしおよびソース母線どうし
を金属で接続したり、さらにはゲート母線とソース母線
を金属で接続し、作成プロセス終了後上記金属を除去す
るという方法も提案されている。
Electrostatic breakdown has been a serious problem, particularly in thin film transistor (TPT) array substrates formed on insulating layers. Therefore, methods have been proposed in which gate busbars and source busbars are connected with metal, or gate busbars and source busbars are connected with metal, and the metal is removed after the creation process is completed.

発明が解決しようとする課題 上述したダイオードを接続する従来の方法ではダイオー
ドの一方を電源電位、接地電位に接続する必要があった
。したがって内部回路を作成するプロセス途中や後の取
扱中に内部回路が静電破壊されてしまう欠点があった。
Problems to be Solved by the Invention In the conventional method of connecting diodes as described above, it was necessary to connect one side of the diode to a power supply potential and a ground potential. Therefore, there is a drawback that the internal circuit may be damaged by electrostatic discharge during the process of creating the internal circuit or during subsequent handling.

また母線どうしを接続する方法ではプロセス終了後の静
電破壊に対して憲防備である。
Furthermore, the method of connecting busbars provides protection against electrostatic damage after the process is completed.

本発明はかかる点に鑑み、電源電圧なしで正負いずれの
高圧サージ電圧に対して破壊防止が可能な半導体集積回
路の静電破壊防止回路を提供することを目的とする。
In view of the above, an object of the present invention is to provide an electrostatic breakdown prevention circuit for a semiconductor integrated circuit that can prevent breakdown against both positive and negative high voltage surge voltages without using a power supply voltage.

課題を解決するための手段 本発明は半導体集積回路装置の外部入力端子と内部回路
との間に、前記内部回路の駆動電圧vdの範囲と前記第
1、第2のダイオードの順方向電流の閾値電圧Vtl、
Vt2との関係が V t 2 < V d< V t rの関係を溝足し
、上記外部入力端子から第1の電位側にむけて順方向に
第1のダイオードを、上記外部入力端子から第1の電位
側にむけて逆方向に第2のダイオードを接続した静電破
壊防止回路である。
Means for Solving the Problems The present invention provides an interface between an external input terminal and an internal circuit of a semiconductor integrated circuit device, the range of the driving voltage vd of the internal circuit and the threshold of the forward current of the first and second diodes. Voltage Vtl,
The relationship with Vt2 is the sum of the relationship of V t 2 < V d < V tr , and the first diode is connected in the forward direction from the external input terminal to the first potential side, and the first diode is connected from the external input terminal to the first potential side. This is an electrostatic breakdown prevention circuit in which a second diode is connected in the opposite direction toward the potential side.

また本発明は前記内部回路の駆動電圧Vdの範囲と前記
直列に互いに逆方向に接続されたダイオード群の正方向
の閾値電圧Vt(+)と負方向の閾値電圧V t(−)
の関係が V t(−)< V d< V t(+)の関係をする
ダイオード群を上記外部入力端子と第1の電位の間に接
続した静電破壊防止回路である。
The present invention also provides a range of the driving voltage Vd of the internal circuit, a positive threshold voltage Vt(+) and a negative threshold voltage Vt(-) of the group of diodes connected in series in opposite directions.
This is an electrostatic breakdown prevention circuit in which a group of diodes having a relationship of Vt(-)<Vd<Vt(+) are connected between the external input terminal and a first potential.

作用 本発明は上述した構成により、内部回路の駆動電圧以上
の電圧が外部接続端子に印加された場合端子に接続され
たダイオードを通して電流が流れ内部回路には高圧のサ
ージ電圧がかからないようにできる。ダイオードのしき
い値以下の電圧が印加された場合はその電圧が内部回路
に伝達される。
According to the above-described configuration, the present invention allows current to flow through the diode connected to the terminal when a voltage higher than the driving voltage of the internal circuit is applied to the external connection terminal, thereby preventing high surge voltage from being applied to the internal circuit. If a voltage below the threshold of the diode is applied, that voltage is transmitted to the internal circuit.

実施例 以下に、本発明の実施例について図面を参照しながら説
明する。
Examples Examples of the present invention will be described below with reference to the drawings.

実施例1 第1図に実施例1の説明図を示す。ガラス基板上に形成
されたaSi薄膜トランジスタ(TPT)アレーからな
る内部回路1のゲート電極母線の外部接続端子4に第1
図(b)に示す特性を示すダイオードDI、  D23
.2を接続する。ダイオードの他端5.6はソース電極
母線に接続する。ダイオードDI、D23.2のしきい
値電圧V t hはそれぞれVt+5Vt2である。第
1図(b)に示すダイオードはn”−aSi/1−aS
i/SiNxで実現できるeVthはS+NXの組成ま
たは膜厚で制御可能である0例えばSiNxの膜厚が9
0nmの場合は30vのしきい値電圧をもつダイオード
が実現できる。別の実現方法としては内部回路であるア
レーのTPTの構造を利用したトランジスタのソースま
たはドレーンの少なくとも一方の電極とゲート電極が絶
縁層および半導体層を介して重なり合わないいわゆる「
オフセットトランジスタ」構造において、ソースまたは
ドレーン電極のいずれか一方とゲート電極を接続しても
実現できる。第1図(b)のしきい値電圧Vthはソー
スまたはドレーンの少なくとも一方の電極とゲート電極
が絶縁層および半導体層を介して重なり合っていない部
分の距離によって制御できる。ギャップ2μmでしきい
値電圧50Vとなる。TPTアレーを駆動するのに必要
なゲート電圧は一10Vから15Vの範囲であり通常の
駆動ではダイオードの接続は影響をうけない。
Example 1 FIG. 1 shows an explanatory diagram of Example 1. A first terminal is connected to an external connection terminal 4 of a gate electrode bus of an internal circuit 1 consisting of an aSi thin film transistor (TPT) array formed on a glass substrate.
Diode DI, D23, exhibiting the characteristics shown in figure (b)
.. Connect 2. The other end 5.6 of the diode is connected to the source electrode bus. The threshold voltages V th of the diodes DI and D23.2 are each Vt+5Vt2. The diode shown in FIG. 1(b) is n”-aSi/1-aS
The eVth that can be achieved with i/SiNx can be controlled by the composition or film thickness of S+NX. For example, if the film thickness of SiNx is 9
In the case of 0 nm, a diode with a threshold voltage of 30 V can be realized. Another implementation method is to utilize the TPT structure of the array, which is an internal circuit, so that at least one source or drain electrode and the gate electrode of a transistor do not overlap with each other through an insulating layer and a semiconductor layer.
It can also be realized by connecting either the source or drain electrode and the gate electrode in the "offset transistor" structure. The threshold voltage Vth in FIG. 1(b) can be controlled by the distance of the portion where at least one of the source or drain electrodes and the gate electrode do not overlap with the insulating layer and the semiconductor layer interposed therebetween. The threshold voltage is 50V with a gap of 2 μm. The gate voltage required to drive the TPT array is in the range of -10V to 15V, and the diode connections are not affected by normal drive.

ソース電極母線にも上述したゲート電極母線の場合と同
様にダイオードを設置し他端をゲート電極母線に接続す
ればソース電極母線に入るサージ電圧が防止できる。
If a diode is installed on the source electrode bus as in the case of the gate electrode bus described above and the other end is connected to the gate electrode bus, surge voltage entering the source electrode bus can be prevented.

実施例2 第2図に実施例2を説明する図を示す。半導体集積回路
である内部回路lの外部接続端子4に互いに逆方向に直
列接続したダイオード7.8を接続する。他方の端子9
は接地電位で良い。第2図(b)のような特性のVe(
+)、Vt(−)はそれぞれのダイオードの逆方向のブ
レークダウン電圧で決定される。もしこの電圧を大きく
したいときには複数このダイオードを直列接続すればよ
い、内部回路をV t (JからVt(+)の範囲で駆
動できる。
Example 2 FIG. 2 shows a diagram explaining Example 2. Diodes 7.8 connected in series in opposite directions are connected to the external connection terminal 4 of the internal circuit 1, which is a semiconductor integrated circuit. other terminal 9
may be at ground potential. Ve(
+) and Vt(-) are determined by the reverse breakdown voltage of each diode. If it is desired to increase this voltage, it is sufficient to connect a plurality of diodes in series, and the internal circuit can be driven in the range from V t (J to Vt (+)).

この互いに逆方向に直列接続したダイオード7.8は金
属/絶縁体/金属のいわゆるMIMダイオードでも同様
の働きをする。
The diodes 7.8 connected in series in opposite directions to each other function in the same manner as so-called MIM diodes made of metal/insulator/metal.

発明の効果 本発明によれば、ダイオードの一方を電源電位、接地電
位に接続しなくとも静電破壊を回避することが可能であ
る。したがって内部回路を作成するプロセス後も内部回
路に接続しておくことが可能で取扱中に内部回路が静電
破壊されてしまう欠点もない、正負いずれの高圧サージ
に対しても効果がありその実用的価値は高い。
Effects of the Invention According to the present invention, it is possible to avoid electrostatic discharge damage without connecting one of the diodes to the power supply potential and the ground potential. Therefore, it can be connected to the internal circuit even after the process of creating the internal circuit, and there is no disadvantage that the internal circuit will be damaged by static electricity during handling.It is effective against both positive and negative high voltage surges, and its practical use. The value is high.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)、(b)は各々、本発明の静電破壊防止回
路の実施例を説明するための回路図及び特性図、第2図
(a)、(b)は各々、本発明の静電破壊防止回路の他
の実施例を説明するための回路図及び特性図、第3図は
、従来の静電破壊防止回路を説明するための回路図であ
る。 l◆・中白部回路、2.3.7.8.1O111・・・
ダイオード、4・・・外部接続端子。 代理人の氏名 弁理士 粟野重孝はか1名高 図 (α) 第2図 C(L) 落 図
1(a) and (b) are a circuit diagram and a characteristic diagram for explaining an embodiment of the electrostatic breakdown prevention circuit of the present invention, and FIG. 2(a) and (b) are respectively FIG. 3 is a circuit diagram for explaining a conventional electrostatic discharge prevention circuit. l◆・Middle white circuit, 2.3.7.8.1O111...
Diode, 4...External connection terminal. Name of agent Patent attorney Shigetaka Awano Hakaichi Takazu (α) Figure 2 C (L) Rakuzu

Claims (6)

【特許請求の範囲】[Claims] (1)半導体集積回路装置の外部入力端子と内部回路と
の間に設けられる静電破壊防止回路において、前記外部
入力端子から第1の電位側にむけて順方向に接続された
第1のダイオードと前記外部入力端子から第1の電位側
にむけて逆方向に接続された第2のダイオードとを具備
し、前記内部回路の駆動電圧V_dの範囲と前記第1、
第2のダイオードの順方向電流のしきい値電圧V_t_
1、V_t_2との関係が −V_t_2<V_d<V_t_1 の関係を満足することを特徴とする静電破壊防止回路。
(1) In an electrostatic breakdown prevention circuit provided between an external input terminal and an internal circuit of a semiconductor integrated circuit device, a first diode connected in a forward direction from the external input terminal toward a first potential side. and a second diode connected in a reverse direction from the external input terminal toward the first potential side, the range of the drive voltage V_d of the internal circuit and the first,
Threshold voltage of forward current of second diode V_t_
1. An electrostatic damage prevention circuit characterized in that the relationship with V_t_2 satisfies the following relationship: -V_t_2<V_d<V_t_1.
(2)第1、第2のダイオードが、トランジスタのソー
スまたはドレーンの少なくとも一方の電極とゲート電極
が絶縁層および半導体層を介して重なり合わず、前記ソ
ースまたはドレーン電極のいずれか一方と前記ゲート電
極を接続してなることを特徴とする請求項1記載の静電
破壊防止回路。
(2) In the first and second diodes, at least one of the source or drain electrode of the transistor and the gate electrode do not overlap with each other with an insulating layer and a semiconductor layer interposed therebetween, 2. The electrostatic damage prevention circuit according to claim 1, characterized in that the circuit is formed by connecting electrodes.
(3)第1、第2のダイオードが半導体層と絶縁層の2
層構造を有するを特徴とする請求項1記載の静電破壊防
止回路。
(3) The first and second diodes are composed of a semiconductor layer and an insulating layer.
The electrostatic breakdown prevention circuit according to claim 1, having a layered structure.
(4)半導体集積回路装置の外部入力端子と内部回路と
の間に設けられる静電破壊防止回路において、前記外部
入力端子と第1の電位の間に正負両方向に正方向のしき
い値電圧V_t(+)と負方向のしきい値電圧V_t(
−)を有する2端子素子を具備し、前記内部回路の駆動
電圧V_dの範囲と前記2端子素子のしきい値電圧、V
_t(−)、V_t(+)の関係がV_t(−)<V_
d<V_t(+) の関係を満足することを特徴とする静電破壊防止回路。
(4) In an electrostatic breakdown prevention circuit provided between an external input terminal and an internal circuit of a semiconductor integrated circuit device, a threshold voltage V_t in the positive direction between the external input terminal and a first potential is applied in both positive and negative directions. (+) and negative threshold voltage V_t(
), the range of the drive voltage V_d of the internal circuit and the threshold voltage of the two-terminal element, V
The relationship between _t(-) and V_t(+) is V_t(-)<V_
An electrostatic breakdown prevention circuit characterized by satisfying the relationship: d<V_t(+).
(5)2端子素子が直列に互いに逆方向に接続されたダ
イオード群であることを特徴とする請求項4記載の静電
破壊防止回路。
(5) The electrostatic breakdown prevention circuit according to claim 4, wherein the two-terminal elements are a group of diodes connected in series in opposite directions.
(6)2端子素子が絶縁層をはさんで第1、第2の金属
を有することを特徴とする請求項4記載の静電破壊防止
回路。
(6) The electrostatic breakdown prevention circuit according to claim 4, wherein the two-terminal element has first and second metals with an insulating layer sandwiched therebetween.
JP1090115A 1989-04-10 1989-04-10 Electrostatic breakdown preventing circuit Pending JPH02268460A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1090115A JPH02268460A (en) 1989-04-10 1989-04-10 Electrostatic breakdown preventing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1090115A JPH02268460A (en) 1989-04-10 1989-04-10 Electrostatic breakdown preventing circuit

Publications (1)

Publication Number Publication Date
JPH02268460A true JPH02268460A (en) 1990-11-02

Family

ID=13989517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1090115A Pending JPH02268460A (en) 1989-04-10 1989-04-10 Electrostatic breakdown preventing circuit

Country Status (1)

Country Link
JP (1) JPH02268460A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006262104A (en) * 2005-03-17 2006-09-28 Yamaha Corp D level amplifier
JP2010129893A (en) * 2008-11-28 2010-06-10 Sony Corp Semiconductor integrated circuit
US9887188B2 (en) 2015-01-20 2018-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Electro-static discharge structure, circuit including the same and method of using the same

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5140774A (en) * 1974-10-03 1976-04-05 Fujitsu Ltd
JPS5338269A (en) * 1976-09-20 1978-04-08 Nippon Precision Circuits Input*output protecting circuit of mos ic
JPS5345978A (en) * 1976-10-08 1978-04-25 Hitachi Ltd Insulated-gate-protective semiconductor device
JPS5376678A (en) * 1976-12-17 1978-07-07 Nec Corp Semiconductor device
JPS5950559A (en) * 1982-09-16 1984-03-23 Hitachi Ltd Semiconductor device protection circuit
JPS6034051A (en) * 1983-08-05 1985-02-21 Nec Corp semiconductor integrated circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5140774A (en) * 1974-10-03 1976-04-05 Fujitsu Ltd
JPS5338269A (en) * 1976-09-20 1978-04-08 Nippon Precision Circuits Input*output protecting circuit of mos ic
JPS5345978A (en) * 1976-10-08 1978-04-25 Hitachi Ltd Insulated-gate-protective semiconductor device
JPS5376678A (en) * 1976-12-17 1978-07-07 Nec Corp Semiconductor device
JPS5950559A (en) * 1982-09-16 1984-03-23 Hitachi Ltd Semiconductor device protection circuit
JPS6034051A (en) * 1983-08-05 1985-02-21 Nec Corp semiconductor integrated circuit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006262104A (en) * 2005-03-17 2006-09-28 Yamaha Corp D level amplifier
JP2010129893A (en) * 2008-11-28 2010-06-10 Sony Corp Semiconductor integrated circuit
US8093623B2 (en) 2008-11-28 2012-01-10 Sony Corporation Semiconductor integrated circuit
US9887188B2 (en) 2015-01-20 2018-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Electro-static discharge structure, circuit including the same and method of using the same
TWI615938B (en) * 2015-01-20 2018-02-21 台灣積體電路製造股份有限公司 Electrostatic discharge structure, circuit using electrostatic discharge structure, and method using electrostatic discharge structure

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