JPH02265252A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPH02265252A JPH02265252A JP1086341A JP8634189A JPH02265252A JP H02265252 A JPH02265252 A JP H02265252A JP 1086341 A JP1086341 A JP 1086341A JP 8634189 A JP8634189 A JP 8634189A JP H02265252 A JPH02265252 A JP H02265252A
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- circuit board
- resin
- chip
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概 要〕
プリント基板上に直接搭載したICチップを樹脂封止し
てなる半導体装置の製造方法に関し、プリント基板にI
Cチップを樹脂封止した後の工程で該プリント基板に他
のデバイスを半田接続する際に発生するICチップの該
プリント基板からの剥離や封止樹脂のクラックを防止す
ることを目的とし、
プリント基板に直接搭載したICチップを樹脂封止した
後、該プリント基板上に搭載する他の電子デバイスの半
田付は作業工程直前に、少なくとも該プリント基板の含
水量が該プリント基板単体時との重量比で0.13%以
下となるようにベーキング処理を施して構成する。[Detailed Description of the Invention] [Summary] A method for manufacturing a semiconductor device in which an IC chip mounted directly on a printed circuit board is sealed with a resin.
The purpose of the printing process is to prevent the IC chip from peeling off from the printed circuit board and cracks in the sealing resin that occur when other devices are soldered to the printed circuit board in the process after the C chip is sealed with resin. After the IC chip directly mounted on the board is sealed with resin, other electronic devices mounted on the printed board are soldered immediately before the work process, so that the moisture content of the printed board is at least as high as the weight of the printed board alone. Baking treatment is performed so that the ratio is 0.13% or less.
〔産業上の利用分野]
本発明はプリント基板上に直接搭載したICチップを樹
脂封止してなる半導体装置に係り、特にプリント基板に
ICチップを樹脂封止した後の工程で該プリント基板に
他の電子デバイスを半田接続する際に発生するICチッ
プの該プリント基板からの剥離や封止樹脂のクラックを
防止して生産性および特性の向上を図った半導体装置の
製造方法に関する。[Industrial Application Field] The present invention relates to a semiconductor device formed by resin-sealing an IC chip mounted directly on a printed circuit board, and in particular, in a process after the IC chip is resin-sealed to the printed circuit board. The present invention relates to a method of manufacturing a semiconductor device that improves productivity and characteristics by preventing peeling of an IC chip from the printed circuit board and cracking of the sealing resin that occur when connecting other electronic devices by soldering.
第3図は従来の半導体装置製造方法の一例を示す工程図
であり、第4図は問題点を説明する図である。FIG. 3 is a process diagram showing an example of a conventional semiconductor device manufacturing method, and FIG. 4 is a diagram illustrating problems.
工程例を示す第3図はプリント基板上に直接搭載されて
いるICチップを樹脂封止して樹脂封止部を形成した後
、該プリント基板上の所定位置にコネクタや他の電子デ
バイスを半田付けする場合を示したものであり、図では
理解し易くするためコンデンサの如きデバイスを半田接
続する場合について説明する。Figure 3, which shows an example of the process, seals an IC chip directly mounted on a printed circuit board with resin to form a resin sealing part, and then solders connectors and other electronic devices to predetermined positions on the printed circuit board. The figure shows the case where a device such as a capacitor is connected by soldering for ease of understanding.
図(1)で、破線Aで示す領域はICチップの樹脂封止
領域を、また破線Bで示す領域は電子デバイスを半田接
続する領域をそれぞれ示している。In FIG. 1, a region indicated by a broken line A indicates a resin-sealed region of an IC chip, and a region indicated by a broken line B indicates a region to which an electronic device is soldered.
図で、■はパターン形成された導体2を持つ例えば厚さ
が0.5mmのガラスエポキシ樹脂からなるプリント基
板であり、該プリント基板1の表面所定位置には上記導
体2の所定の電極とワイヤ3で接続された状態にある例
えば−辺が6■程度のICチップ4が図示されない接着
材を介して搭載されている。In the figure, ■ is a printed circuit board made of glass epoxy resin having a patterned conductor 2, for example, with a thickness of 0.5 mm, and at a predetermined position on the surface of the printed circuit board 1 are predetermined electrodes and wires of the conductor 2. For example, an IC chip 4 having a side of about 6 cm is mounted with an adhesive (not shown) connected thereto.
また図の5は上記の破線Aで示す領域をカバーする大き
さ(例えば−辺が12ff+m程度)で厚さが0゜7〜
1.0mmのエポキシ樹脂からなる封止材を示している
。In addition, 5 in the figure has a size that covers the area indicated by the broken line A above (for example, the - side is about 12ff+m) and a thickness of 0°7~
A sealing material made of 1.0 mm of epoxy resin is shown.
ここで、該封止材5を図示矢印りの如く上記ICチップ
4上の所定位置に載置して悼印方向から見た図(2)に
示す状態とする。Here, the sealing material 5 is placed at a predetermined position on the IC chip 4 as indicated by the arrow in the figure, and the state shown in Figure (2) as seen from the direction of the memorial seal is obtained.
この状態のまま封止材5の部分を150〜170 ’C
で加熱すると、該封止材5は軟化してその周囲から垂れ
下がるようになり、結果的に図(3)に示すように上記
ワイヤ3と導体2のボンディング電極部分を含む領域す
なわち図(1)のAで示す領域が樹脂封止されて樹脂封
止部6を得ることができる。In this state, heat the sealant 5 part to 150~170'C.
When heated, the sealing material 5 softens and begins to hang down from its periphery, resulting in a region including the bonding electrode portion of the wire 3 and the conductor 2 as shown in FIG. 3 (FIG. 1). The region indicated by A is sealed with resin to obtain a resin-sealed portion 6.
次いで、図(2)のB領域に所定の電子デバイス7を載
置し半田ペースト8を接続部分に塗布した状態で215
℃程度の高温状態にあるフロン系液体(例えば商品名:
フロリナート住友3M■製)9が入れられたチャンバ1
0内の高温のフロンガス9aで満たされた空間領域にセ
ットし、上記半田ベースト8を融解させて該デバイス7
の導体2に対する半田接続を行うようにしている。Next, a predetermined electronic device 7 is placed in area B in FIG.
Freon-based liquids (e.g. product name:
Chamber 1 containing Fluorinert (manufactured by Sumitomo 3M■) 9
The solder base 8 is melted and the device 7
A solder connection is made to the conductor 2.
図(4)はこの状態を示したものであり、その後該チャ
ンバ10から取り出すことによって図(5)に示す如く
樹脂封止された所要の樹脂封止部6および電子デバイス
7が搭載された回路基板11を得ることができる。FIG. (4) shows this state, and by taking it out from the chamber 10, the circuit in which the required resin-sealed part 6 and electronic device 7 are mounted is sealed with resin as shown in FIG. (5). A substrate 11 can be obtained.
一方、プリント基板上に樹脂封止された樹脂封止部を形
成した移譲プリント基板にコネクタや他のデバイス等を
半田接続にて搭載するには、上述の如く−例えば高温の
フロンガス雰囲気中に曝す等の方法で加熱する必要があ
るが、この際の熱でrCチップが該プリント基板から剥
離したり封止樹脂にクラックが発生することがある。On the other hand, in order to mount connectors and other devices by soldering on a transferred printed circuit board with a resin-sealed portion formed on the printed circuit board, as described above, for example, exposure to a high-temperature chlorofluorocarbon gas atmosphere is necessary. However, the heat generated at this time may cause the rC chip to peel off from the printed circuit board or cracks may occur in the sealing resin.
問題点を示す第4図はこれらの不具合状態を示したもの
で、主要部である樹脂封止部分を断面で表わしている。FIG. 4, which shows these problems, shows the resin-sealed portion, which is the main part, in cross section.
図(イ)は正常な状態にある樹脂封止部を示したもので
、lがプリント基板、2が導体、3がワイヤ、4がIC
チップ、5が封止材をそれぞれ表わしており、これらの
各構成要素によって正常な樹脂封止部6が形成されてい
ることは第3図の場合と同様である。Figure (A) shows the resin sealing part in a normal state, where l is a printed circuit board, 2 is a conductor, 3 is a wire, and 4 is an IC.
As in the case of FIG. 3, the chips and 5 each represent a sealing material, and a normal resin sealing portion 6 is formed by each of these components, as in the case of FIG.
この場合には、導体2を含むICチ・ンプ4の周囲が封
止材5で完全に覆われているため、安定した特性を持つ
樹脂封止部6が形成されている。In this case, since the periphery of the IC chip 4 including the conductor 2 is completely covered with the sealing material 5, a resin sealing portion 6 having stable characteristics is formed.
また図(ロ)は該樹脂封止部6の周囲にICチップ4に
達するクラック6aが発生した状態を表わしたもので、
この場合には内存するICチップ4やワイヤ3が部分的
に露出することから特性の低下を誘起すると共に、例え
ばワイヤ3の切断やボンディング部分の剥離の如く露出
部分が損なわれる危険がある。Furthermore, Figure (B) shows a state in which a crack 6a has occurred around the resin sealing part 6, reaching the IC chip 4.
In this case, the IC chip 4 and the wires 3 inside are partially exposed, which induces a deterioration of the characteristics, and there is a risk that the exposed portions will be damaged, for example, by cutting the wires 3 or peeling off the bonding portions.
更に図(ハ)は該樹脂封止部6の裏面すなわちプリント
基板1側で該プリント基板lがICチップ4から剥離し
て膨れ上がり該プリント基板1とICチップ4との間に
隙間6bが発生した状態を示したもので、この場合には
樹脂材5による封止が不完全になって特性が低下したり
破壊する危険がある。Further, in Figure (C), the printed circuit board l peels off from the IC chip 4 on the back side of the resin sealing portion 6, that is, on the printed circuit board 1 side, and bulges, creating a gap 6b between the printed circuit board 1 and the IC chip 4. In this case, the sealing with the resin material 5 becomes incomplete, and there is a risk that the characteristics will deteriorate or the device will be destroyed.
〔発明が解決しようとする課題〕
従来の半導体装置の製造方法では、後工程での半田付は
作業工程で該樹脂封止部にクラックが生じたりプリント
基板が変形して膨れあがる等の問題があった。[Problems to be Solved by the Invention] In the conventional manufacturing method of semiconductor devices, soldering in the post-process has problems such as cracks occurring in the resin sealing part and deformation and swelling of the printed circuit board during the work process. there were.
[課題を解決するための手段]
上記問題点は、プリント基板に直接搭載したICチップ
を樹脂封止した後、
該プリント基板上に搭載する他の電子デバイスの半田付
は作業工程直前に、少なくとも該プリント基板の含水量
が該プリント基板単体時との重量比で0.13%以下と
なるようにベーキング処理を施す半導体装置の製造方法
によって解決される。[Means for solving the problem] The above problem is that after the IC chip mounted directly on the printed circuit board is sealed with resin, the soldering of other electronic devices mounted on the printed circuit board must be done at least immediately before the work process. The problem is solved by a semiconductor device manufacturing method in which a baking treatment is performed so that the moisture content of the printed circuit board is 0.13% or less by weight compared to the printed circuit board alone.
〔作 用]
プリント基板に樹脂封止部を形成した後のデバイス半田
付は作業時の熱によるクラック発生や、核熱によるプリ
ント基板の膨れ等の変形は、該プリント基板に含まれる
水分が気化して体積が膨張することにに起因し、更に該
プリント基板の含水量が該プリント基板単体時との重量
比で0.13%以下になると上記の如き不具合現象が発
生しないことが確認できた。[Function] When soldering a device after forming a resin sealing part on a printed circuit board, cracks may occur due to the heat during soldering, and deformation such as swelling of the printed circuit board due to nuclear heat may occur due to moisture contained in the printed circuit board being vaporized. It was confirmed that the above-mentioned defect phenomenon does not occur when the moisture content of the printed circuit board is 0.13% or less in terms of weight ratio of the printed circuit board alone. .
本発明では、プリント基板に所要の樹脂封止部を形成し
た移譲プリント基板ごとベーキング処理を施して該プリ
ント基板の含水量をほぼ零とし、その状態で他の電子デ
バイスの半田付は作業を実施するように半導体装置の製
造方法を構成している。In the present invention, the transferred printed circuit board with the required resin sealing portion formed on the printed circuit board is subjected to baking treatment to reduce the moisture content of the printed circuit board to almost zero, and soldering of other electronic devices is carried out in this state. The method for manufacturing a semiconductor device is configured to do so.
従って、半田付は作業による熱が付加されてもクランク
の発生がなくまたプリント基板の変形も発生しない半導
体装置を得ることができる。Therefore, it is possible to obtain a semiconductor device in which no cranking occurs even when heat is applied during soldering, and the printed circuit board does not deform.
第1図は本発明になる半導体装置の製造方法を説明する
工程図であり、第2図はプリント基板含水量限定の根拠
を説明する図である。FIG. 1 is a process diagram illustrating a method for manufacturing a semiconductor device according to the present invention, and FIG. 2 is a diagram illustrating the basis for limiting the moisture content of a printed circuit board.
第1図で、(A)は第3図(1)〜(3)で説明した工
程でプリント基Fil上に樹脂封止部6が形成された状
態を示している。In FIG. 1, (A) shows a state in which the resin sealing portion 6 is formed on the printed base Fil in the steps explained in FIGS. 3 (1) to (3).
なお回の破線で示す領域Bは第3図同様に電子デバイス
を搭載する領域である。Note that area B indicated by the broken line is an area where electronic devices are mounted, as in FIG.
ここでその状態のまま図(B)に示す恒温槽15にセッ
トし、125°C中に12〜24時間放置するベーキン
グ処理を施してプリント基板1に含まれる水分を除去す
る。Here, the printed circuit board 1 is placed in the constant temperature bath 15 shown in FIG. 1B in this state, and subjected to baking treatment in which it is left at 125° C. for 12 to 24 hours to remove moisture contained in the printed circuit board 1.
次いで一旦取り出した後、該プリント基板上の所定位置
すなわち図(A)の領域Bに電子デバイス7を載置し更
に該プリント基板1の導体2との接続部分に半田ペース
ト8を塗布して図(C)に示す状態とする。After taking it out, the electronic device 7 is placed on the printed circuit board at a predetermined position, that is, the area B in FIG. The state shown in (C) is obtained.
ここで図(D)に示すように、第3図(4)と同様に構
成されたチャンバ10内の高温のフロンガス9a雰囲気
中にセットして上記電子デバイス7の半田接続を実施す
るようにしている。Here, as shown in FIG. 3(D), the electronic device 7 is set in an atmosphere of high-temperature fluorocarbon gas 9a in the chamber 10 configured similarly to FIG. 3(4), and solder connection of the electronic device 7 is performed. There is.
この場合、図(B)の恒温槽15から取り出してから図
(D)に示すチャンバlOに投入するまでの間はプリン
ト基板1は通常雰囲気中に曝されているためこの間に該
プリント基板1が吸湿する。In this case, the printed circuit board 1 is normally exposed to the atmosphere from the time it is taken out from the thermostat 15 shown in Figure (B) until it is put into the chamber 10 shown in Figure (D). Absorbs moisture.
従ってこの間の時間はできるだけ短い方が望ましく、通
常は2〜3時間程度以内をめどとしている。Therefore, it is desirable that the time during this period be as short as possible, and usually within about 2 to 3 hours.
かかる半導体装置の製造方法では、プリント基板1に含
まれる水分がほぼ全部除去された状態で半田付は作業を
行うことができるため、該作業時の熱によって樹脂封止
部にクラックが発生することがなくまたプリント基板自
体に膨れ等の変形が生ずることがない。In this method of manufacturing a semiconductor device, soldering can be carried out in a state where almost all the moisture contained in the printed circuit board 1 has been removed, so that cracks may occur in the resin sealing part due to the heat generated during the soldering process. Furthermore, the printed circuit board itself does not undergo deformation such as swelling.
プリント基板含水量限定の根拠を説明する第2図は、横
軸Xに時間を日数でまた縦軸Yにはプリント基板単体時
の重量と含水量との比を含水率として%でとったグラフ
であり、各カーブc 、、 c z。Figure 2, which explains the basis for limiting the moisture content of printed circuit boards, is a graph in which the horizontal axis X shows time in days, and the vertical axis Y shows the ratio of the weight of a single printed board to the moisture content as a percentage. and each curve c,,c z.
c3は当初含水率“0″のプリント基板を三種類の異な
る雰囲気中に曝した場合の吸水の度合を時間経過で示し
たものである。c3 shows the degree of water absorption over time when a printed circuit board with an initial moisture content of "0" was exposed to three different atmospheres.
なお、カーブc1は温度25°C1湿度45%R,H。Note that the curve c1 has a temperature of 25° C. and a humidity of 45% R,H.
の通常室内に放置した場合を、カーブC2は温度25°
C1湿度60%R,H,の雰囲気に、またカーブC1は
温度30″C9湿度80%R,H,の雰囲気にそれぞれ
放置したときの実験結果である。Curve C2 represents the case where the temperature is 25° when left indoors.
Curve C1 is the experimental result when left in an atmosphere with a humidity of 60% R, H, and curve C1 is left in an atmosphere with a temperature of 30'' and a humidity of 80% R, H.
また各カーブ上の・で示す点は、該当する条件で抽出し
たプリント基板を使用し第3図で説明した工程で半田付
は作業を行ったときに、樹脂封止部のクラックやプリン
ト基板の膨れ等の変形(以下不具合点とする)が発生し
なかった場合を示しており、また各カーブ上の×で示す
点は、該当条件で抽出したプリント基板を使用したとき
に前述の不具合点が発生したことを示している。In addition, the points indicated by ・ on each curve indicate cracks in the resin sealing part and cracks in the printed circuit board when soldering is performed in the process explained in Figure 3 using the printed circuit board extracted under the corresponding conditions. This shows the case where no deformation such as blistering (hereinafter referred to as defective point) occurred, and the points marked with an x on each curve indicate the case where the above-mentioned defective point occurs when the printed circuit board extracted under the corresponding conditions is used. indicates that it has occurred.
例えば、カーブC0では21点すなわち含水率0.08
4%の場合とP2点すなわち含水率0.13%の場合で
は前述の不具合点が発生しないが、98点すなわち含水
率0.17%の場合では上記不具合点が発生することを
表わしている。For example, in curve C0, there are 21 points, that is, the moisture content is 0.08.
The above-mentioned problems do not occur in the case of 4% and the P2 point, that is, the case of the water content of 0.13%, but the above-mentioned problems occur in the case of 98 points, that is, the case of the water content of 0.17%.
同様にカーブC2では、23点すなわち含水率0.13
2%の場合は不具合点が発生しないが、含水率0.19
4%の93点以降では不具合点が発生することを示して
いる。Similarly, in curve C2, there are 23 points, that is, the water content is 0.13.
No defects occur when the water content is 2%, but the moisture content is 0.19.
This indicates that a defective point occurs after 93 points, which is 4%.
カーブc3の場合も同様である。The same applies to the curve c3.
従って、各カーブc1.c2’、c、上のPl−Qz−
各点の存在領域から、少なくとも半田付は作業時のプリ
ント基板の上記含水率を0.13%以下にすれば半田付
は作業時の熱による上記不具合点の発生のない半導体装
置を得ることができる。Therefore, each curve c1. Pl-Qz- on c2', c,
From the existence area of each point, at least if the moisture content of the printed circuit board during soldering is 0.13% or less, it is possible to obtain a semiconductor device that does not have the above defects caused by the heat during soldering. can.
なお上記の各カーブcl、cz、c3から、第1図で説
明した工程の図(B)から図(D)に到る時間の限度を
ほぼ決定することができる。Note that from each of the above-mentioned curves cl, cz, and c3, it is possible to approximately determine the limit of the time from diagram (B) to diagram (D) in the process explained in FIG.
上述の如く本発明により、プリント基板に樹脂封止部を
形成した後の電子デバイス半田付は工程で、該プリント
基板が変形してICチ・ツブが該プリント基板から剥離
したりまた封止樹脂にクラ・ンクが発生する等の不具合
点が生ずることのない半導体装置を提供することができ
る。As described above, according to the present invention, soldering of electronic devices after forming a resin sealing portion on a printed circuit board is a step in which the printed circuit board is deformed and the IC chips are peeled off from the printed circuit board. Accordingly, it is possible to provide a semiconductor device that does not suffer from problems such as cranking.
第1回は本発明になる半導体装置の製造方法を説明する
工程図、
第2回はプリント基板含水量限定の根拠を説明する図、
第3図は従来の半導体装置製造方法の一例を示す工程図
、
第4図は問題点を説明する図、
である。図において、
1はプリント基板、 4はICチップ、6は樹脂封
止部、 7は電子デバイス、8は半田ペースト、
9aはフロンガス、10はチャンバ、 15
は恒温槽、をそれぞれ表わす。
(B)
(D)
晃 1 図
(?≦)
(f)
1プリント昼木反
r5是豆ぐ文と空ジB月T5 辰口The first part is a process diagram explaining the method for manufacturing a semiconductor device according to the present invention, the second part is a diagram explaining the basis for limiting the moisture content of a printed circuit board, and the third part is a process diagram showing an example of a conventional semiconductor device manufacturing method. Figure 4 is a diagram explaining the problem. In the figure, 1 is a printed circuit board, 4 is an IC chip, 6 is a resin sealing part, 7 is an electronic device, 8 is a solder paste,
9a is a freon gas, 10 is a chamber, 15
represents a constant temperature bath. (B) (D) Akira 1 Figure (?≦) (f) 1 print Hiruki anti-r5 Kore Mamegubun and Soraji B month T5 Tatsuguchi
Claims (1)
樹脂封止した後、 該プリント基板(1)上に搭載する他の電子デバイスの
半田付け作業工程直前に、少なくとも該プリント基板(
1)の含水量が該プリント基板単体時との重量比で0.
13%以下となるようにベーキング処理を施すことを特
徴とした半導体装置の製造方法。[Claims] After the IC chip (4) directly mounted on the printed circuit board (1) is sealed with resin, at least immediately before the soldering process of other electronic devices mounted on the printed circuit board (1). The printed circuit board (
The water content in 1) is 0.0% by weight compared to the printed board alone.
1. A method of manufacturing a semiconductor device, comprising performing a baking treatment to reduce the concentration to 13% or less.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1086341A JP2551141B2 (en) | 1989-04-05 | 1989-04-05 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1086341A JP2551141B2 (en) | 1989-04-05 | 1989-04-05 | Method for manufacturing semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02265252A true JPH02265252A (en) | 1990-10-30 |
JP2551141B2 JP2551141B2 (en) | 1996-11-06 |
Family
ID=13884153
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1086341A Expired - Lifetime JP2551141B2 (en) | 1989-04-05 | 1989-04-05 | Method for manufacturing semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2551141B2 (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60226145A (en) * | 1984-04-25 | 1985-11-11 | Hitachi Ltd | Mounting process of semiconductor device |
-
1989
- 1989-04-05 JP JP1086341A patent/JP2551141B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60226145A (en) * | 1984-04-25 | 1985-11-11 | Hitachi Ltd | Mounting process of semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JP2551141B2 (en) | 1996-11-06 |
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