JPH02249332A - Redundancy system selection circuit - Google Patents

Abstract

PURPOSE:To prevent the momentary error of data selection by giving a prescribed delay to each data, inputting the result to a selection circuit and devising a circuit so that a selected pulse is transmitted faster than the data of the redundancy system and the data selection of the redundancy system is not momentarily interrupted. CONSTITUTION:The subject circuit is provided with a selection circuit 13 selecting one of plural data having the redundancy system and outputting while using a selection pulse to select a normal system through the input of the data, a pulse generating circuit 14 outputting the selection pulse and plural path pattern insertion circuits 11 inserting respectively a path pattern to each data. Moreover, a path pattern detection circuit 15 inputting the data and the path pattern selected by the selection circuit 13 and collating them and plural delay circuits 12 providing a prescribed delay on each data are provided. Thus, the selected pulse from the pulse generating circuit 14 is transmitted faster tot he selection circuit 13 than the data and the selection circuit applies the selection and the redundancy data is selected without being momentarily interrupted. Thus, momentary error in the data selection is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention is utilized in the field of digital communication having a redundant system, and particularly relates to a redundant system selection circuit that selects a redundant system using self-monitoring means based on a path pattern.

〔overview〕

The present invention provides a redundant system selection circuit that inputs a plurality of redundant data and selects and outputs error-free data.The present invention provides a redundant system selection circuit that inputs a plurality of redundant data and selects and outputs error-free data. This system is designed to prevent instantaneous errors in data selection by transmitting data faster than data with a redundant system, and by ensuring that data selection in the redundant system is not interrupted even momentarily.

[Conventional technology]

Conventionally, this type of redundant system selection circuit does not have a circuit configuration that can realize a selection circuit that does not involve instantaneous errors in data that has a redundant system, and during the detection period, it is not switched to the redundant system and remains as it is. Generally, the configuration is such that data containing errors are selected.

[Problem that the invention seeks to solve]

In the conventional redundant system selection circuit described above, the data having the redundant system and the selection pulse for selecting the normal system data from both systems are input to the selection circuit with the same phase delay. During the detection period, it is not possible to switch to a redundant system, which has the disadvantage of causing instantaneous data errors.

SUMMARY OF THE INVENTION An object of the present invention is to provide a redundant system selection circuit that can select redundant data without causing instantaneous errors by eliminating the above drawbacks.

[Means for solving problems]

The present invention provides a selection circuit that inputs a plurality of data having a redundant system and selects and outputs one of these data using a selection pulse that selects a normal system, and a pulse generation circuit that outputs the selection pulse. a redundant selection system comprising: a plurality of path pattern insertion circuits that insert bus patterns into each data; and a path pattern detection circuit that manually compares the data selected by the selection circuit with the bus pattern. The circuit is characterized in that it includes a plurality of delay circuits that respectively apply a predetermined delay to each of the data.

[Effect]

Since the input data having the redundant system is delayed by the delay circuit, the selection pulse from the pulse generation circuit is transmitted to the selection circuit faster than the data, thereby causing the selection circuit to perform a selection operation.

Therefore, selection of redundant data can be performed without instantaneous interruption.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

This embodiment includes a selection circuit 13 that manually inputs a plurality of data having a redundant system and selects and outputs one of these data using a selection pulse 16; a pulse generation circuit 14 that outputs the selection pulse 16; In the redundant system selection circuit, the redundant system selection circuit includes a plurality of path pattern insertion circuits 11 that insert bus patterns into each data, and a path pattern detection circuit 15 that checks the bus pattern of the data string selected by the selection circuit 13. A plurality of delay circuits 1, which is a feature of the present invention, each giving a predetermined delay to each data string.
It is equipped with 2.

Next, the operation of this embodiment will be explained with reference to the timing diagrams shown in FIGS. 2(a), 2(b), and 2(c).

Here, FIG. 2(a) shows the frame structure of input data, FIG. 2(c) shows delayed data delayed by a delay circuit, and FIG. 2(C) shows output data.

Data 1 to data n having the same frame structure as shown in FIG. 2(a) and having a redundant system are input.

The manually entered data is manually entered into the path pattern insertion circuit 11. The bus pattern is inserted into the empty time slot of each data string, the n pieces of data are input to the delay circuit 12, and the data delayed by m bits is manually input to the selection circuit 13, as shown in FIG. 2(b). Ru.

On the other hand, the selection pulse 16 is output from the pulse generation circuit 14 before the input data, and selection control of n data strings is performed without causing instantaneous interruption of transmission data. The selected data string becomes the output data shown in Figure 2 (C),
Data i (i=i to n) performs self-monitoring by detecting a bus pattern inserted into an empty time slot by the path pattern detection circuit 15.

〔Effect of the invention〕

As explained above, the present invention enables, in a circuit configuration having a redundant system, a selected bulk to be transmitted faster than data having a redundant system, and selection of data in the redundant system to be performed without instantaneous interruption. There is an effect that it can be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a timing diagram showing the operation. 11... Bus pattern insertion circuit, 12... Delay circuit, 13... Selection circuit, 14... Pulse generation circuit, 1
5... Bus pattern detection circuit, 16... Selection pulse.

Claims (1)

[Claims] 1. A selection circuit that selects and outputs one of these data using a selection pulse that inputs a plurality of data having a redundant system and selects a normal system, and outputs the selection pulse. a plurality of pass pattern insertion circuits that insert pass patterns into each data, and a pass pattern detection circuit that inputs the data selected by the selection circuit and the pass pattern and compares them. A redundant system selection circuit characterized in that the redundancy system selection circuit comprises a plurality of delay circuits that respectively apply a predetermined delay to each of the data.