JPH02224526A - A/d converter - Google Patents

Abstract

PURPOSE:To improve the conversion accuracy by providing an integration means and a gain amplifier and obtaining a digital data from a data set to a pulse width signal output means and a data being the result of A/D-conversion to a signal amplified from a difference signal. CONSTITUTION:A microprocessor MP applies A/D conversion to an input analog signal Ei to recognize how much magnitude the signal Ei has. A data D1 slightly smaller than the magnitude is set to a pulse width signal output means 2 based on the recognized magnitude and the means 2 outputs a pulse width signal corresponding to the data D1 to an integration means 3. The means 3 integrates the reference voltage by a time corresponding to the pulse Width and outputs the result of integration ef to a gain amplifier 4. The amplifier 4 subtracts the signal Ei from the signal ef corresponding to the data D1, amplifies its difference signal and uses the A/D conversion means 1 to convert the amplified signal Ef, thereby obtaining a data do corresponding to the difference signal. Then the data do is added to the data D1 to obtain a digital data with high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an A/D converter using a microprocessor, and more specifically, to the conversion accuracy of an A/D conversion means provided in the microprocessor. A/D that can improve
Regarding converters.

<Prior Art> Recently, microprocessors that have an internal A/D conversion function and can directly input analog signals have come into use.

In such a microprocessor, the internal A/D
The standard conversion accuracy of the conversion function is about 8 bits, and it becomes expensive to obtain conversion accuracy of more than 8 bits, for example, about 12 bits.

<Problems to be Solved by the Invention> The present invention has been made in view of the above circumstances, and its purpose is to improve A/D conversion accuracy by adding a simple circuit outside the microprocessor. The object of the present invention is to realize an A/D converter that can improve the performance.

Means for Solving the Problems> FIG. 1 is a block diagram showing the basic configuration of the present invention. In FIG. 6, 1 is an A/D conversion means for converting input analog signals into digital signals; 3 is a pulse width signal output means in which the pulse width of the pulse fkjA signal is set according to the data converted by the A/D conversion means 1, and 3 is a time corresponding to the pulse width output from the pulse width signal output means 2. Integrating means for integrating the reference signal; 4, a gain amplifier that calculates and amplifies the difference between the analog signal E1 to be converted and the output signal ef indicating the integration result by the integrating means 3; 5, the analog signal Ei to be converted; This is a switch means for switching between the difference signal from the gain amplifier 4 and the amplified signal E'f to provide it to the A/D conversion means 1.

Function> The switch means first selects the analog signal to be converted and applies it to the A/D conversion means, and the pulse width signal output means selects slightly smaller data ( The pulse width signal corresponding to D1) is output to the integrating means, and then the switch means selects a signal obtained by amplifying the difference signal from the gain amplifier, applies it to the A/D conversion means, and sets it to the pulse width signal output means. Digital data corresponding to the analog signal to be converted is obtained from the obtained data (D1) and the data obtained by A/D converting the signal obtained by amplifying the difference signal.

This makes it possible to improve the accuracy of A/D conversion.

<Example> Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the present invention. In FIG. 6, the same parts as in FIG. 1 are designated by the same reference numerals.

MPX is a multiplexer that converts the analog signal E
1. By switching the span voltage signal ES corresponding to the span and the zero voltage signal Eo corresponding to the zero point, the first stage amplifier A1
to be applied.

The switch means 5, the A/D conversion means 1, and the pulse width signal output means 2 are all configured to be realized by firmware of the microprocessor MP. As a microprocessor configured in this way, for example, N
78312 made by EC can be used.

The integrating means 3 includes a reference voltage Vref, a switch 320 that is turned on for a time corresponding to the pulse width of the signal from the pulse width signal outputting means 2, and an integrator that integrates the reference voltage Vref via a switch S20. INT (Amplifier A
2. (consisting of a resistor R and a capacitor C). Note that the switch SIO is a switch that initializes the integrator INT.

The gain amplifier 4 receives the output signal e from the integrator IN'I'.
An amplifier with a gain of 21 times is used to amplify the difference signal between f and the signal from the first stage amplifier A1.

The operation of the device configured in this way will be described next.

FIG. 3 is a diagram showing the relationship between the result converted by the A/D conversion means 1 and the applied analog signal El, and FIG. 3 is a diagram showing the relationship between data D1 set in width signal output means 2 and A/D conversion data. FIG.

The outline of the operation will first be explained using these figures.

The microprocessor MP first performs A/D conversion of the input analog signal El, and recognizes the magnitude of the input analog signal E1 in FIG. 3.

Next, based on this A/D converted size, data D slightly smaller than this size is sent to the pulse width signal output means 2.
1, and the pulse width signal output means 2 outputs a pulse width signal corresponding to the set data D1 to the integration means 3. The integrating means 3 integrates the reference voltage Vref for a time corresponding to the pulse width, and transmits this integration result ef to the gain amplifier 4.
Output to. That is, the microprocessor MP uses the data D1 to set the data D1 as shown in FIG.

■... Decide which straight line to use.

The gain amplifier 4 subtracts the input analog signal E1 and the analog signal ef corresponding to the setting data D1, amplifies the difference signal, and A/D converts this amplified signal Ef by the A/D conversion means 1. and the data d corresponding to the difference signal
Get O. By adding data dO corresponding to the difference signal to the setting data D1, highly accurate digital data is obtained.

Next, a specific example of operation will be explained. Here, the analog signal E1 to be converted is 3■, and the input range is 1
~5V, the resolution of the A/D conversion means 1 is 8 bits, and the accuracy of the pulse width generated based on the data set from the pulse width signal output means 2 is 16 bits, which is higher than the accuracy of the A/D conversion means 1. shall be. Furthermore, errors of each amplifier are not considered.

First, the microprocessor MP controls the multiplexer MPX to select the analog signal Ei to be converted, turns on the switch S1, and turns on the first stage amplifier A1.
The analog signal E1 to be converted applied via A/
is applied to the D conversion means 1. The A/D conversion means 1 converts this analog signal Ei into a digital signal.

As a result, the microprocessor MP knows how large the input analog signal E1 is (for example, about 3 cm).

Next, the microprocessor MP sets slightly smaller data D1 to the pulse width signal output means 2 according to the magnitude of the converted input analog signal, and outputs a pulse width signal based on the set data. Output. Integration means 3
integrates the reference voltage ref for a time corresponding to the pulse width of the output pulse width signal, and outputs a signal at its output terminal that is slightly smaller than 3, which is the magnitude of the input analog signal, for example, 2.98 The magnitude of this output voltage is the setting data D1
outputs an analog signal ef corresponding to

The analog signal ef output from the integrating means (integrator INT) 3 is applied to the (-) terminal of the gain amplifier 4, where the difference between it and the analog signal E1 from the first stage amplifier A1 is calculated, and the difference signal is n. amplified twice.

Now, if the gain n of the gain amplifier 4 is set to 50 times, the output voltage Ef of the gain amplifier 4 is Ef=(3,oo-2
,98)x50 =IV.

Subsequently, the microprocessor MP turns on the switch S2, applies the amplified signal Ef from the gain amplifier 4 to the A/D conversion means 1, and performs A/D conversion on the amplified signal Ef.

That is, 12 is A/D converted by an 8-bit A/D conversion means. Now, the accuracy of the 8-bit A/D converter is ±IL.
Assuming SB, the resolution is 5V/256=20mV.

Here, in the gain amplifier 4, the difference signal is multiplied by 50, so converting this into an input analog signal becomes 20mV150=0.4mV.This means that even though 8-bit A/D conversion means is used, This corresponds to obtaining a resolution of 14 bits.

The accuracy of this A/D conversion can be further increased by changing the gain of the gain amplifier. Note that increasing the gain of the gain amplifier corresponds to increasing the slope of each straight line as shown by the broken line in FIG. 4.

The microprocessor MP outputs the amplified difference signal E to the LSB side of the data D1 set in the pulse width signal output means 2.
By adding data do obtained by A/D converting f, digital data of the input analog signal El is finally obtained.

In the above explanation, the gain amplifier 4 and integrator INT have zero,
Although it is assumed that there is no span error, these corrections are performed as follows.

■ First, select zero voltage signal EO in multiplexer MPX. The data set in the pulse width signal output means 2 at that time is assumed to be PWM (0), and the data obtained by A/D conversion is assumed to be AD (0).

(2) Next, the multiplexer MPX selects the 5 (2) voltage signal Es corresponding to the full span.

The data set in the pulse width signal output means 2 at that time is PWM (5), and the data obtained by A/D conversion is AD.
(5).

■Next, in the state of ■, change the data set in the pulse width signal output means 2 by "1", and check how much the value of the A/D conversion means 1 at this time changes from AD(5). demand. Let this be AD(1).

Here, PWM (0)XAD (1)+AD (0)PWM
(5) XAD (5) + AD When (5) is performed, OV,
The correct A/D conversion value of 5V is found.

■ Next, the input analog signal to be converted is selected in the multiplexer MPX, the data set in the pulse width signal output means 2 at that time is PWM (Y), and the data obtained by A/D conversion is AD (Y). Then, O obtained by ■
By correcting with V, 5V, correct A/D conversion data Do can be obtained by performing a correction calculation according to the following equation.

FIG. 5 is a block diagram showing another embodiment of the present invention.

In the embodiment shown in Fig. 2, it is assumed that the number of input analog signals to be converted is one, but if there are multiple input analog signals, the accuracy may be sacrificed to some extent. You may also want to increase the conversion speed. Fifth
The embodiment shown in the figure has been developed in view of these requirements, and is configured so that the integration time of the integrator INT constituting the integration means 3 can be changed programmably by the microprocessor MP.

That is, in the integrating means 3, 321 to S20 are a plurality of switches R1-R connected at one end to the reference voltage source.
One end of n is connected to these switches and the other end is connected to amplifier A.
A plurality of resistors are commonly connected to the two input terminals, and each resistance value is different.

One of the plurality of switches 821 to S2n is selected by a signal from the microprocessor MP, and the selected switch is driven by a pulse signal from the pulse width signal output means 2. ing.

In the circuit configured in this way, the integration time for the output voltage ef of the integrator INT to reach a predetermined value corresponding to the setting data D1 is determined by the value of the integration resistor R (the integration time constant changes depending on this value). Therefore, by selecting a specific switch from a plurality of switches according to instructions from the microprocessor MP, the integration time, that is, A/
D conversion time can be changed.

Therefore, if the integration time is shortened, the A/D conversion accuracy will drop somewhat, but the conversion speed can be increased.

Here, shortening the integration time corresponds to widening the widths between the lines (2), (2), (2), etc. in FIG. 4.

Note that the integration time may be determined by changing the value of the capacitor C instead of the resistor R, or by changing the value of the reference voltage Vref.

In the apparatus of the present invention, by increasing the integration time of the integrating means and selecting a large gain of the gain amplifier, it is possible to perform A/D conversion with significantly higher accuracy.

<Effects of the Invention> As explained in detail above, according to the present invention, by adding a simple circuit consisting of an integrating means and a gain amplifier outside the microprocessor, the A/D conversion accuracy can be improved. A D converter can be realized. Furthermore, the speed of A/D conversion can be changed as necessary.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the basic configuration of the present invention, Figure 2 is a block diagram showing the basic configuration of the present invention.
The figure is a block diagram showing one embodiment of the present invention, FIG. 3 is a diagram showing the relationship between the result of conversion by the A/D conversion means and the applied analog signal E1, and FIG. Diagram 5 showing the relationship between data D1 set in the pulse width signal output means based on the conversion result and A/D conversion data.
The figure is a configuration block diagram showing another embodiment of the present invention. 2... Pulse width signal output means, 3... Integrating means, 4
...gain amplifier, 5...switch means INT...
・Integrator, MP...Microprocessor, MPX...
・Multiplexer, A1...First stage ambut...A/D
conversion means,

Claims (3)

[Claims] (1) A/D conversion means for converting an input analog signal into a digital signal, and a pulse width signal output means for setting the pulse width of a pulse width signal to be output according to the data converted by this A/D conversion means. , an integrating means for integrating the reference signal for a time corresponding to the pulse width output from the pulse width signal output means, calculating the difference between the analog signal to be converted and the integration result by the integrating means, and amplifying this difference signal. a gain amplifier; a switch means for switching between an analog signal to be converted and an amplified signal from the gain amplifier and supplying the same to the A/D conversion means; first, the switch means selects the analog signal to be converted and performs A/D conversion; The pulse width signal output means outputs a pulse width signal corresponding to data (D1) slightly smaller than the A/D converted data to the integration means, and then the switch means outputs a pulse width signal corresponding to data (D1) slightly smaller than the A/D converted data. A signal obtained by amplifying the difference signal from the amplifier is selected and applied to the A/D conversion means, and from the data (D1) set in the pulse width signal output means and the data obtained by A/D converting the signal obtained by amplifying the difference signal. An A/D converter characterized in that it obtains digital data corresponding to an analog signal to be converted. (2) The A/D converter according to claim 1, wherein the A/D converter is configured so that the gain of the gain amplifier can be varied. (3) The A/D converter according to claim 1, wherein the integration time of the integrating means is configured to be variable.