JPH02224345A - Formation of thin film transistor - Google Patents

Abstract

PURPOSE:To make it possible to form easily a short-channel TFT at a low temperature by a method wherein a doping region including source and drain regions is selectively formed in a high-resistance unsingle crystal semiconductor layer. CONSTITUTION:Gas containing a group III or V element is activated, a laser beam is applied to a region including a source and a drain in a high-resistance unsingle crystal semiconductor layer and after the part irradiated with the laser beam to form a doping region including source and drain regions is doped with a group III or V element, a laser beam is applied to a part constituting the doping region or the doping region and the source and drain regions consisting of a metal. Moreover, after an unsingle crystal semiconductor layer or the unsingle crystal semiconductor layer and the source and drain regions consisting a metal are cut, a laser beam is applied to the high-resistance unsingle crystal semiconductor layer under this cut part to improve the mobility of the semiconductor layer of the part irradiated with the laser beam and moreover, a laser beam is again applied to a channel part of a TFT through the cut part under a plasma-containing atmosphere and with a group III or V element is doped the part irradiated with the laser beam to control a threshold voltage. Thereby, the short-channel TFT having good high-speed responsibility is obtained at low cost.

Description

DETAILED DESCRIPTION OF THE INVENTION INDUSTRIAL APPLICATION FIELD 1 The present invention relates to a thin film transistor (hereinafter also referred to as TFT) using a non-single crystal semiconductor thin film and a method for manufacturing the same, and in particular to a liquid crystal display.

The present invention relates to a thin film transistor with high-speed response that can be applied to image sensors and the like.

rPrior Art 1 Recently, thin film transistors using non-single crystal semiconductor thin films produced by chemical vapor deposition or the like have been attracting attention.

Since this thin film transistor is formed on an insulating substrate using a chemical vapor phase method as mentioned above, it can be formed at a low temperature of about 450°C at maximum, and it can be formed using inexpensive soda glass or borosilicate. Glass or the like can be used as the substrate.

This thin film transistor is a field effect type, so-called M
O3FI! It has the same function as T, but as mentioned above, it can be formed at low temperature on an inexpensive insulating substrate, and the maximum area that can be formed is limited only by the dimensions of the device that forms the thin film semiconductor. It had the advantage that transistors could be easily fabricated on large-area substrates. Therefore, it is extremely promising as a switching element for matrix-structured liquid crystal displays having a large number of pixels, one-dimensional or two-dimensional image sensors, and the like.

A typical structure of this conventionally known TPT is schematically shown in FIG.

(21) is an insulating substrate made of glass, (22)
is a thin film semiconductor made of a non-single crystal semiconductor, (23),
(24) is the source/drain region, (25), (26
) is the source/drain electrode, (27) is the gate insulating film (
28) is the gate electrode. The thin film transistor configured in this way adjusts the current flowing between the source and drain (23) and (24) by applying a voltage to the gate electrode (28).

At this time, the response speed of this thin film transistor is given by the following equation.

S=μ・V/L” Here, L is the channel length and μ is the carrier mobility.

■ is the gate voltage.

The non-single-crystal semiconductor layer used in this thin-film transistor contains a large number of crystal grain boundaries, etc., and due to these, carrier mobility is extremely small compared to a single-crystal semiconductor, which can be seen from the above equation. The problem was that the response speed of the transistor was extremely slow. In particular, when an amorphous silicon semiconductor is used, its mobility is approximately 0.
．． 1 to 1 (cII!/v-3ec), mostly T
It was so bad that it could not function as a PT.

As is clear from the above equation, it is known that the solution to such problems is to shorten the channel length and increase carrier mobility, and various improvements have been made.

In the past, various methods have been used to improve mobility. Typically, non-single crystal semiconductors are annealed to increase the grain size of single crystals or polycrystals.

In these conventional methods, an expensive heat-resistant substrate must be used because the annealing is carried out at high temperatures, and the processing time becomes longer because the semiconductor layer on the entire surface of the substrate is made into single crystal or polycrystal. A problem was occurring.

On the other hand, if the channel length is shortened, the response speed will be affected by the square of the length, so this is a very effective means.

However, when forming an element on a large-area substrate, which is a feature of TPT, using photolithography technology to reduce the distance between the source and drain (corresponding to the approximate channel length) to 10 μm or less is difficult to improve the processing accuracy. It is clearly difficult in terms of yield, production cost, etc., and TP
As a means for shortening the channel length of T, a means that does not use photolithography technology is required.

Furthermore, when forming a TPT, the source/drain regions generally contain a high concentration of impurities exhibiting N-type or P-type conductivity. There are two methods for forming this part: a method in which a low-resistance non-single crystal semiconductor layer mixed with these impurities is stacked on a high-resistance non-single-crystal semiconductor layer in which a channel is formed; A method of forming source/drain regions in a high resistance non-single crystal semiconductor layer by moving these impurity atoms from above the surface of the single crystal semiconductor layer is known and widely used.

However, in the former method, a low-resistance non-single-crystal semiconductor layer mixed with impurities is laminated on a high-resistance non-single-crystal semiconductor layer in which a channel is formed, so an interface is created between the two conductor layers. This interface often has an adverse effect on the properties of TPT, and it has been difficult to improve the condition of this interface.

On the other hand, the latter method diffuses impurities from the surface of the non-single-crystal semiconductor layer into the interior by applying heat to the substrate and the non-single-crystal semiconductor layer. It is necessary to give

In this case, it is not possible to use an inexpensive glass substrate, resulting in high costs, and when the applied temperature is lowered, the rate at which impurities are diffused is slow, requiring a lot of time for production.

In addition, in such TPT, it is used (22
) Due to the characteristics of the non-single crystal semiconductor thin film, this TPT
When using such a TFT as a switching element for a liquid crystal display with a large number of pixels or an image sensor with high precision resolution, the threshold voltage (Vth) of -a changes. It is necessary to increase the voltage (■).

Conventionally, as a countermeasure to this problem, light doping of a P-type impurity element in the case of an N-channel transistor and an N-type impurity element in the case of a P-channel transistor has been carried out, but this method is not used in the case of thin film transistors. Since the semiconductor layer used in the process is a non-single crystal semiconductor and is thin, it is extremely difficult to lightly dope only the channel region.

``Object of the invention 1 The present invention solves various problems as mentioned above.
Short channel TP with better characteristics than conventional TFTs
This allows T to be produced more easily and at lower temperatures.

``Structure of the Invention'' The present invention supplies electrical energy to gases containing at least Group (I) or Group V elements in a reduced pressure state to turn them into plasma and activate them, and in this atmosphere, generates a high-resistance non-containing material. After irradiating the region including the source and drain of the single crystal semiconductor layer with a laser beam, and adding a group II or group V element to the portion irradiated with the laser beam, a doped region including the source and drain region is formed. , after cutting the non-single crystal semiconductor layer or the non-single crystal semiconductor layer and the metal by irradiating the doped region or a portion constituting the source/drain region made of the doped region and metal with a focused laser beam; The high-resistance non-single-crystal semiconductor layer under this cut portion is irradiated with a laser beam to improve the mobility of the semiconductor layer in that portion, and the laser beam is then applied to the channel portion of the TPT through the cut portion under a plasma atmosphere again. irradiated with the laser beam, and the area irradiated with this laser light is
By doping group elements, the threshold voltage (Vth
).

In this case, the mixed gas does not contain a gas that forms a film, such as SiH4, but is composed of an inert gas such as hydrogen or helium, and a gas containing Group ■ or Group V elements.

That is, when electrical energy is applied to a gaseous mixture containing elements of group Ⅰ or group V to turn the gaseous mixture into plasma, these gases assume various states commensurate with their respective energies and move vigorously. When a substrate having a high-resistance non-single-crystal semiconductor layer is placed in such a plasma atmosphere, the substrate always physically hits the high-resistance non-single-crystal semiconductor layer. At this time, if the doped region including the source and drain regions is irradiated with laser light,
Group (1) or (2) elements in the vicinity of the region are activated to a higher energy state by this laser light. As mentioned above, this Group Ⅰ or Group Ⅰ element always physically hits the high-resistance non-single crystal semiconductor layer, so even in the activated state it behaves in the same way, and the high-resistance non-single crystal semiconductor layer The inside of the body is doped.

In addition, these group I or V elements cannot maintain a high energy state for a long time (other gas molecules,
Because energy is lost due to collisions with radicals, etc.), selective doping can be performed.

As a result of the above process, it is possible to selectively form doped regions including the source and drain in the high-resistance non-single-crystal semiconductor layer, making it possible to produce TFTs with shorter channels and high-speed response at lower prices. It is possible to provide the following.

In addition, the width corresponding to the cut portion of the doped region cut by this laser beam approximately corresponds to the channel length of this thin film transistor, and it is possible to fabricate a short channel thin film transistor with high reproducibility, which is almost the same as that during laser beam processing, and the channel area A small amount of impurity can be added to control the threshold voltage (vth), making it possible to provide a TPT with a shorter channel and high-speed response at a lower price.

Furthermore, at this time, the substrate and the high-resistance non-single-crystalline semiconductor layer are kept at a lower temperature than the substrate temperature during the fabrication of the high-resistance non-single-crystalline semiconductor layer. The temperature applied in subsequent processes can be lower than the temperature applied to the substrate and film during the process, making it possible to improve the reliability of semiconductor devices.

The present invention will be explained below with reference to Examples.

Embodiment j FIGS. 1(a) to 1(e) show one manufacturing process of an embodiment of the present invention.

First, in step (a), a substrate (
1) For example, a soda glass substrate (1) is placed in a reaction chamber of an apparatus capable of generating plasma, and approximately 35,000 layers of a ■-type high-resistance non-single-crystal semiconductor layer (2) is formed on this substrate by a known plasma CVD method. form a degree. The manufacturing conditions at this time are shown below.

Substrate temperature 240°C Reaction pressure 0. 05 TorrRfPoHer
90 W Gas SiH4 Next, in step (b), after exhausting the gas in the reaction chamber, a mixed gas of hydrogen gas and phosphine gas (pu, ) is introduced and the pressure is 0. A high frequency power of 60 W was applied using ITorr to create a plasma state. At this time, phosphine is approximately 1
They were mixed to a concentration of 5%. A high resistance non-single crystal semiconductor layer (2) on the substrate is placed in an atmosphere of this mixed gas. At this time, the substrate was not heated.

and the source of the high resistance non-single crystal semiconductor layer (2).

Excimer laser light 0n) (2
48,7+tm).

At this time, the shape of the irradiation beam of the excimer laser light was focused by an optical system, and the shape of the irradiation beam was made to match the shape of the region (5) including the source and drain. At that time, the laser beam was irradiated with an energy level of 0.05 J/cJ and 1500 pulses with a pulse width of 10'Bsec.

As a result, phosphorus is doped only in the region irradiated with this laser beam.

The depth can be adjusted by the number of laser beam irradiations and the energy, but if the amount of energy is too large, it may damage the semiconductor layer, so the doping depth can be controlled by keeping the energy low and changing the number of irradiations. This will increase the margin in the process. In this example, the depth of doping was 500.

Next, this doping region (5) is illuminated with a wavelength that is focused by an optical system different from the optical system used for doping so that a rectangular irradiation cross section with a width of 2 μm and a length of lOmIIl is formed on the irradiated surface. 24B, 7 nm excimer laser light (1
1) and the doping region (5) to the source region (3).
) and drain region (4) to obtain the state shown in FIG. 1(C). The laser beam irradiation conditions at this time are power density I
J/cm", pulse width 10 μSec. In this example, 4 pulses of this laser light were irradiated to cut the doped region (5). The number of irradiations and laser conditions vary depending on the workpiece, and are In the case of the example, a preliminary experiment was conducted to determine the conditions described above, and those conditions were used.

Next, using the same optical system used for this cutting, the high-resistance non-single crystal semiconductor layer (2) under the cut surface is irradiated with a laser beam again to move the semiconductor layer in this area. improved the degree.

The laser light conditions at this time are power density 0.5J/C11
Two pulses were irradiated with a pulse width of 10 μsec.

When a qualitative experiment was conducted in which a normal amorphous silicon semiconductor was irradiated under these conditions, a value of about 100 times the mobility before irradiation was obtained.

Next, in step (d), after exhausting the gas in the reaction chamber, a mixed gas of hydrogen gas and diborane gas (B2H2) is introduced and the pressure is 0. A high frequency power of 60 W was applied using ITorr to create a plasma state. At this time, diborane was mixed to a concentration of about 1%. A high resistance non-single crystal semiconductor layer (2) on the substrate is placed in an atmosphere of this mixed gas. At this time as well, the substrate was not heated.

Then, the excimer laser beam (15) (248,7n
m) was irradiated.

At this time, the shape of the irradiation beam of the excimer laser light was focused by an optical system, and the shape of the irradiation beam was irradiated so that its outer shape almost matched the outer shape of the region where the channel was to be formed. That is, it was possible to use the same optical system and the same laser beam as used in the cutting process in the previous step.

The laser beam conditions at that time were irradiation with an energy density of 0.07 J/c4 and 2000 pulses with a pulse width of 10 μsec.

Moreover, the depth control was the same as in the case of the source and drain.

Further, in the present invention, since the channel portion Q3) is doped with an impurity in order to control the threshold voltage (■th), it is only necessary to add a small amount of the impurity.

Therefore, by adjusting the proportion of impurity gas in the mixed gas,
It was made to be light dope.

Next, in step (e), the gas in the reaction chamber is exhausted, the gas is changed to a mixed gas of silane and ammonia, and the mixture is introduced into the reaction chamber, and a gate insulating film (6
), 200 people formed silicon nitride films.

The manufacturing conditions are shown below.

Substrate temperature 200°C Reaction pressure 0. 05 TorrRfPower
50 W gas N H3/S i H4 After this, the substrate (1) was taken out from the reaction chamber and etched into a predetermined pattern to form a gate insulating film (6).
After etching the semiconductor layer in a T-shaped external pattern, aluminum is formed on the entire upper surface by a known sputtering method, and then etched into a predetermined pattern to form a gate electrode (7) and a source electrode (8). ) and a drain electrode (9) were formed to complete the TPT as shown in the figure.

In this example, when doping with impurities, sufficient doping can be achieved even if heating is not performed, but if doping is performed with a little temperature heating, there is an advantage that the doping can be completed more quickly. The heating temperature at this time is lower than the temperature applied to the substrate and semiconductor thin film in the TPT manufacturing process.

In this way, since the space between the source and drain is not etched and processed as in the conventional method, it is possible to easily form the distance between the cut portions 02) of the source and drain of 10 μm or less, approximately 2.6 μm in the case of this example, and shorten the gap. A channel-length TPT could be manufactured with good reproducibility.

In addition, in the present invention, since the source/drain doping is performed using a laser, the temperature applied to the substrate and the semiconductor thin film in the TPT manufacturing process can be the highest temperature, and a high temperature can be applied in a later process. There is no need for this, and a more reliable TPT can be provided.

Furthermore, the present invention is not limited to the coplanar type TPT shown in this embodiment, but can also be applied to other types of TPT.

The impurity doping technique using the effect of plasma according to the present invention can be applied not only to the above-mentioned impurities, but also to other impurity elements of group (I) or group V.

In addition, in the laser cutting process, by adjusting the energy of the laser beam or changing the number of irradiations, it is possible to simultaneously improve the mobility of the semiconductor under the cut part. When irradiation is performed, it is possible to dope the channel portion in a one-step process.

"Effect j" As explained above, according to the present invention, the source and drain regions of TPT are doped with these impurity elements by irradiating laser light in an atmosphere of group III or group III elements in a plasma state. The channel forming region can be doped with these impurity elements by irradiating the channel formation region with laser light in an atmosphere of group II or group III elements in a plasma state at a lower temperature. The hold voltage (vth) can be controlled by this low-temperature doping, and higher performance TPT can be used as a switching element for liquid crystal displays, image sensors, and the like having a large number of pixels.

Furthermore, the source-drain interval can be easily shortened compared to conventional technology, and the mobility of the channel portion can also be improved, resulting in a faster response time.
We were able to provide PT.

This allows TFTs using non-single crystal semiconductors, which could not be used as switching elements in display devices, image sensors, etc., to be used as switching elements in display devices, image sensors, etc.
It is now possible to use PT.

In addition, since we used laser processing technology to shorten the channel length, there is no problem with processing accuracy even if the area is increased.
It has become very easy to form a large number of TFTs with good characteristics on a large substrate.

In addition, in areas where photolithography technology is applied, strict processing precision for mask alignment is not required, and TPT
It was possible to easily miniaturize and increase the integration of circuits.

Furthermore, by simply changing the laser light conditions, most TPs can be
Since the T manufacturing process can be performed, manufacturing costs can be kept lower.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(e) are schematic diagrams showing the manufacturing process of TPT according to an embodiment of the present invention. FIG. 2 shows a cross-sectional structure of a conventional TPT. 1...Substrate High-resistance non-single crystal semiconductor layer Source/drain doping region Gate insulating film Gate electrode Source electrode Drain electrode Laser beam cutting for doping Laser beam cutting portion Doped channel portion Laser beam for channel doping

Claims (1)

[Claims] 1. A method for manufacturing a thin film transistor, which includes the steps of forming a high resistance non-single crystal semiconductor layer on a substrate, and forming the high resistance non-single crystal semiconductor layer in a group III or V group. A group III or V
a step of adding a group element to form a doped region including a source and a drain; and a step of irradiating the doped region with a laser beam and cutting the semiconductor layer in the doped region to divide it into a source region and a drain region. A step of irradiating the high-resistance non-single crystal semiconductor layer under the cut portion with laser light again to improve the mobility of the high-resistance non-single-crystal semiconductor layer under the cut portion, and the substrate is made of a group III or V group element. irradiating the high-resistance non-single-crystal semiconductor layer with a laser beam in a mixed gas plasma atmosphere containing the above to dope a group III or group V element into the channel region of the thin film transistor. A method for manufacturing thin film transistors. 2. In the method for manufacturing a thin film transistor according to claim 1, when the semiconductor layer in the doped region is cut, the mobility of a high-resistance non-single crystal semiconductor layer under the cut portion is simultaneously improved. A method for manufacturing a thin film transistor characterized by the following. 3. The method for manufacturing a thin film transistor according to claim 1, characterized in that the step of cutting the doped region, the step of improving the mobility of the channel region, and the step of doping the channel region are performed at the same time. A method for manufacturing a thin film transistor.