JPH02223217A - Input protection circuit and output circuit for semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To prevent a power from being consumed by a voltage supplied to an input terminal when no source voltage is supplied to a power source line means by providing a switching means and a cut-off diode means. CONSTITUTION:The switching means 7 and 8 are turned off accordingly when no source voltage is supplied from the power source line means 1 because the cut-off diode means 13-17 are provided at an input protection circuit. Also, since the cut-off diode means 13-17 are provided, the voltage supplied to the input terminal is not supplied to the power source line means 1 even that it is supplied to the substrate nodes of the switching means 7 and 8. Thereby, no operation of a semiconductor integrated circuit to be protected by the voltage is performed, which prevents the power from being consumed unnecessarily.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention generally relates to input protection circuits and output circuits for semiconductor integrated circuits, and in particular to semiconductor integrated circuits that can prevent power consumption when power is not supplied. Relating to input protection circuits and output circuits for integrated circuits.

[Prior Art] FIG. 9 is a schematic diagram showing the connection of two circuits that receive power supply voltages from different power supplies. Referring to FIG. 9, circuit A is connected to a power supply via power supply terminal 1a. Circuit B is connected to another power supply via power supply terminal 1b. Output terminal 4a of circuit A is connected to input terminal 3b of circuit B via transmission line 40. Terminals 2a and 2b are each ground terminals. Circuits A and B are each provided in separate semiconductor chips, for example.

FIG. 10 is a circuit diagram showing a conventional input protection circuit.

Referring to FIG. 10, this input protection circuit includes power supply terminal 1
A PMOS transistor 5 and an NMOS transistor 9 are connected in series between the ground terminal 2 and the input terminal 3.
and a protection diode 12 connected between the input terminal 3 and the ground terminal 2. This input protection circuit, for example,
It is provided at the input section of circuit B shown in FIG.

FIG. 11 is a circuit diagram showing a conventional output circuit. 1st
1, this output circuit includes a PMOS transistor 5 connected in series between a power supply terminal 1 and a ground terminal 2.
Also includes an NMOS transistor 9, a parasitic diode 25 formed parasitic to the transistor 5, and a parasitic diode 26 formed parasitic to the transistor 9.

This output circuit is provided, for example, at the output section of circuit A shown in FIG.

FIG. 12 is a cross-sectional structural diagram of a semiconductor substrate constituting the input protection circuit shown in FIG. 10. Referring to FIG. 12, p
- On the semiconductor substrate 21, the PMOS transistor 5 and the N
MOS transistor 9 and input protection diodes 11 and 12 are formed.

FIG. 13 is a cross-sectional structural diagram of a semiconductor substrate constituting the output circuit shown in FIG. 11. Referring to FIG. 13, on a p-semiconductor substrate 21, a PMO transistor 5 and an NMO
S transistor 9 and parasitic diodes 25 and 26 are formed.

[Problems to be Solved by the Invention] For example, the output circuit shown in FIG. 11 is provided at the output section of circuit A shown in FIG. 9, and the input protection circuit shown in FIG. 10 is provided at the input section of circuit B. Assume that In this case, when the power supply voltage is supplied only to the circuit A and therefore the power supply voltage is not supplied to the circuit B, the following inconvenience occurs.

That is, since the output circuit shown in FIG. 11 is provided in circuit A, the input terminal 3b of circuit B shown in FIG. 9 is biased to the power supply voltage of circuit A via the parasitic diode 25. Since the input section of circuit B is provided with the human power protection circuit shown in FIG. 10, the voltage biased at input terminal 3b is applied to power supply terminal 1 via input protection diode 11. Therefore, circuit B is circuit A
It operates depending on the voltage of the output terminal 4a of the . the result,
The operation of circuit B increases unnecessary power consumption. Furthermore, an excessive amount of current will flow from the power supply through the transistor 5 shown in FIG.

On the contrary, when the power supply voltage is supplied only to the circuit B and therefore the power supply voltage is not supplied to the circuit A, the following disadvantages similarly occur. That is, the output terminal 4a of the circuit A is biased to the power supply voltage via the input terminal 3b of the circuit B and the input protection diode 11. The biased voltage is applied to the power supply terminal 1 via a parasitic diode 25 shown in FIG. therefore,
Circuit A will operate depending on the voltage at terminal 3b, resulting in an unnecessary increase in power consumption.

The inventions of claims (1) and (2) have been made to solve the above-mentioned problems, and provide input protection for semiconductor integrated circuits that can prevent power consumption when power supply voltage is not supplied. The purpose is to obtain circuits and output circuits.

[Means for Solving the Problem] The input protection circuit according to the invention of claim (1) includes a power line means for supplying a power supply voltage to a semiconductor integrated circuit to be protected, and a power line means to be protected. protective diode means connected between an input node of the integrated circuit to be protected; and a protection diode means connected between an input terminal for receiving an input signal and an input node of the integrated circuit to be protected, responsive to the voltage of the power line means. and a switching means that operates as a switch. The switching means has a substrate node connected to receive the voltage of the power line means as a substrate potential. The input protection circuit further includes a cutoff diode means connected between the substrate node of the switching means and the power line means for blocking current flowing from the substrate node toward the power line means.

The output circuit according to the invention of claim (2) is connected between a power line means for supplying a power supply voltage to a semiconductor integrated circuit, and an input node receiving a signal from the integrated circuit and the power line means. and switching means connected between the input node and the output terminal and operated in response to the voltage of the power supply line means.

The switching means has a substrate node connected to receive the voltage of the power line means as a substrate potential.

The output circuit further includes a cutoff diode means connected between the substrate node and the power line means for blocking current flowing from the substrate node toward the power line means.

[Function] In the human power protection circuit according to the invention of claim (1), since the cutoff diode means is provided, when the power supply voltage is not supplied from the power line means, the switching means is turned off in response. Further, since the cutoff diode means is provided, the voltage applied to the input terminal is not applied to the power line means even if it is applied to the substrate node of the switching means. Therefore, the semiconductor integrated circuit to be protected does not operate due to this voltage, and as a result, unnecessary power consumption is prevented.

In the output circuit according to the invention of claim (2), when the power supply voltage is not supplied from the power line means, the switching means is turned off in response. Further, since the cutoff diode means is provided, the voltage applied from the outside to the output terminal is not applied to the power line means even if it is applied to the substrate node of the switching means. Therefore, the semiconductor integrated circuit does not operate due to the voltage applied to the output terminal from the outside, and as a result, unnecessary power consumption is prevented.

Embodiment of the Invention FIG. 1 is a circuit diagram of an input protection circuit showing an embodiment of the invention. The differences from the conventional circuit shown in FIG. 10 are as follows. That is, the input protection circuit shown in FIG.
PMOS transistor 7 and NMOS transistor 8 connected in parallel between and 12 common connection nodes
, a PMO transistor 3) connected between the substrate potential node of the transistor 7 and the power supply terminal 1, and an inverter 10 that operates in response to the power supply voltage.

Transistors 7 and 8 constitute a transmission gate that operates in response to the power supply voltage. Parasitic diodes 13 to 17 are formed in the k transistors 1 to 8, as shown in this figure.

FIG. 2 is a cross-sectional structural diagram of a semiconductor substrate constituting the input protection circuit shown in FIG. 1. Referring to FIG. 2, in this input protection circuit, parasitic diodes 14 and 15 are formed parasitic to transistor 7, parasitic diodes 16 and 17 are formed parasitic to transistor 8, and parasitic diodes 16 and 17 are formed parasitic to transistor 6. A parasitic diode 13 is thus formed.

Next, referring again to FIG. 1, the operation of the input protection circuit will be described.

Assume that the input protection circuit shown in FIG. 1 is provided at the input section of circuit B shown in FIG. 9, and no power supply voltage is supplied. On the other hand, it is assumed that circuit A is supplied with a power supply voltage. Since no power supply voltage is applied, the transmission gate constituted by transistors 7 and 8 is turned off. As a result, the path from input terminal 3 to power supply terminal 1 via this transmission gate and input protection diode 11 is completely cut off.

At the same time, the path connected from the input terminal 3 to the power supply terminal 1 via the parasitic diode 15 of the transistor 7 is as follows.
Since the parasitic diode 13 of the transistor 6 is formed in the opposite direction, it is cut off.

Therefore, even if a voltage at the level of the power supply voltage is applied to the input terminal 3, the power supply terminal 1 will not be brought to that voltage level, thus reducing power consumption by the integrated circuit to be protected connected to the output terminal 4. It can be prevented.

On the other hand, when the power supply voltage is supplied to the power supply terminal 1, the transmission gate is turned on in response, so that the same operation as the conventional circuit is performed.

FIG. 3 is a circuit diagram of an output circuit showing an embodiment of the invention of claim (2). The differences from the conventional circuit shown in FIG. 11 are as follows. That is, the output circuit shown in FIG. 3 has output parasitic diodes 25 and 26.
PMOS transistor 7 and NMOS transistor 8 connected in parallel between the common connection node of and output terminal 4, PMOS transistor 6 connected between power supply terminal 1 and the substrate node of transistor 7, and and an inverter 10 that operates in response.

Transistors 7 and 8 constitute a transmission gate that operates in response to the power supply voltage. Parasitic diodes 13 to 17 are formed parasitic to transistors 6 to 8.

FIG. 4 is a cross-sectional structural diagram of a semiconductor substrate constituting the output circuit shown in FIG. 3. Referring to FIG. 4, parasitic diodes 14 and 15 are formed parasitic to transistor 7, parasitic diodes 16 and 17 are formed parasitic to transistor 8, and parasitic diode 1 is formed parasitic to transistor 6. Ru.

Next, referring again to FIG. 3, the operation of this output circuit will be explained.

Assume that the output circuit shown in FIG. 3 is provided at the output part of the circuit A shown in FIG. 9, and no power supply voltage is supplied. It is assumed that circuit B is supplied with a power supply voltage. Since no power supply voltage is supplied, the transmission gate constituted by transistors 7 and 8 is turned off.

Therefore, the output terminal 4 is connected to the power supply terminal 1 via this transmission gate and the output parasitic diode 25.
The route connected to is cut off. At the same time, the path connecting the output terminal 4 to the power supply terminal 1 via the parasitic diode 15 is cut off because the parasitic diode 13 of the transistor 6 is formed in the opposite direction. In this way, since the path connecting the output terminal 4 to the power supply terminal 1 is completely cut off, the semiconductor integrated circuit connected to the input terminal 3 will not operate due to the voltage applied to the output terminal 4, and therefore, Unnecessary power consumption can be prevented.

FIG. 5 is a circuit diagram of an input protection circuit showing another embodiment of the invention of claim (1). The differences from the circuit shown in FIG. 1 are as follows.

That is, the input protection circuit shown in FIG. 5 includes two additional transmission gates connected in parallel between both ends of the transmission gate constituted by transistors 7 and 8 and one electrode of transistor 6. One transmission gate is composed of a PMOS transistor 27 and an NMOS transistor 29.

Another transmission gate is constituted by a PMOS transistor 28 and an NMO transistor 30. These additional transmission gates also perform on and off operations in synchronization with the transmission gate constituted by transistors 7 and 8. Therefore, by providing the two additional transmission gates, it is possible to eliminate the voltage difference between the input and output when the transmission gate constituted by transistors 7 and 8 is turned on. That is, the additional transmission gate operates as an impedance compensation circuit between the input and output of the transmission gate constituted by transistors 7 and 8.

To explain this point in more detail, in the input protection circuit shown in FIG. Differences may occur. This increases the threshold voltage of transistor 7. To prevent this, in the input protection circuit shown in FIG. 5, two additional transmission gates are provided.
This forces the potential of the input terminal 3 and the substrate potential of the transistor 7 to become equal. Therefore, the back gate effect is eliminated, and a change in the threshold voltage of the transistor 7 can be prevented.

FIG. 6 is a circuit diagram of an output circuit showing another embodiment of the invention of claim (2). In this output circuit as well, two additional transmission gates are provided for the same purpose as the circuit shown in FIG. 5, and similar effects can be obtained.

FIG. 7 is a circuit diagram of an output circuit showing still another embodiment of the invention of claim (2). As shown in FIG. 7, the invention of claim (2) can be applied to an output circuit having a tri-state function.

FIG. 8 shows two circuits A and B supplied with power supply voltage from different power supplies, each having output terminals 4a and 4b.
FIG. 4 is a schematic diagram showing a case in which the devices are connected via a transmission line 40. As shown in FIG. 8, even when the output circuit according to the invention of claim (2) is provided for each output of circuits A and B, the same effects as in the embodiments already described can be obtained.

[Effects of the Invention] As described above, according to the invention of claim (1), since the switching means and the cutoff diode means are provided, the voltage applied to the input terminal when the power supply voltage is not supplied to the power line means is Power consumption can be prevented.

According to the invention of claim (2), since the switching means and the cutoff diode means are provided, it is possible to prevent power consumption due to the voltage applied to the output terminal when the power supply voltage is not supplied to the power supply line means.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an input protection circuit showing an embodiment of the invention as claimed in claim (1). FIG. 2 is a cross-sectional structural diagram of a semiconductor substrate constituting the input protection circuit shown in FIG. 1. FIG. 3 is a circuit diagram of an output circuit showing an embodiment of the invention of claim (2). FIG. 4 is a cross-sectional structural diagram of a semiconductor substrate constituting the output circuit shown in FIG. 3. FIG. 5 is a circuit diagram of a human power protection circuit showing another embodiment of the invention of claim (1). FIG. 6 is a circuit diagram of an output circuit showing another embodiment of claim (2). FIG. 7 is a circuit diagram of an output circuit showing still another embodiment of claim (2). FIGS. 8 and 9 are schematic diagrams showing connections between two circuits that receive power supply voltages from different power supplies. 1st
FIG. 0 is a circuit diagram showing a conventional input protection circuit. 1st
FIG. 1 is a circuit diagram showing a conventional output circuit. FIG. 12 is a cross-sectional structural diagram of a semiconductor substrate forming the input protection circuit shown in FIG. 10. FIG. 13 is a cross-sectional structural diagram of a semiconductor substrate constituting the output circuit shown in FIG. 11. In the figure, 1 is a power supply terminal, 2 is a ground terminal, 3 is an input terminal, 4 is an output terminal, 11.12 is an input protection diode,
13 to 17 are parasitic diodes. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Figure 81 Figure S Figure 8 ■ Figure q Figure 810 Figure 11

Claims (2)

[Claims] (1) An input protection circuit for protecting a semiconductor integrated circuit provided on a semiconductor substrate, including an input terminal for receiving an input signal, the input terminal being an input of the integrated circuit to be protected. a power line means connected to the node for supplying a power supply voltage to the integrated circuit; and a protection diode connected between the power line means and an input node of the integrated circuit for protecting the integrated circuit. and switching means connected between the input terminal and an input node of the integrated circuit and operating in response to the voltage of the power line means, the switching means operating in response to the voltage of the power line means. a cutoff diode having a substrate node connected to receive a substrate potential, and connected between the substrate node and the power line means to cut off a current flowing from the substrate node toward the power line means; An input protection circuit for a semiconductor integrated circuit, including means. (2) An output circuit for outputting a signal from a semiconductor integrated circuit provided on a semiconductor substrate, comprising a node for receiving a signal from the integrated circuit, and a node for supplying a power supply voltage to the integrated circuit. and parasitic diode means connected between the input node and the power line means and formed parasitic to the integrated circuit, the parasitic diode means being configured such that the current flowing therethrough is an output terminal connected with a polarity flowing toward the power line means and connected to the input node; and a switching device connected between the input node and the output terminal and operating in response to the voltage of the power line means. and the switching means has a substrate node connected to receive the voltage of the power line means as a substrate potential, and the switching means is connected between the substrate node and the power line means, and the switching means has a substrate node connected to receive the voltage of the power line means as a substrate potential. An output circuit for a semiconductor integrated circuit, comprising a cutoff diode means for cutting off current flowing from the power supply line means toward the power supply line means.