JPH02212172A - Recording apparatus - Google Patents

Abstract

PURPOSE:To perform medium contrast recording and to obtain a high grade reproduced image on the basis of various data by providing a means for inputting data indicating a pixel size, data indicating the start point of the expression of areal gradation to a pixel and data indicating the gradation of the pixel. CONSTITUTION:The size of a pixel, the growth start point of the pulse width in a pixel and the gradation code data of the pixel are inputted through the interface of a printer and, corresponding to the gradation code data, the printing of a text character or contrast medium printing is detected and, in the case of the printing of the text character, printing is performed in the smallest pixel size and, in the case of the medium contrast printing, the contrast medium printing of indicated gradation growing from an indicated pulse growth start point is performed using a pixel having an indicated size. Size alteration of a unit expressing a medium contrast becomes possible and effect such that a degree of freedom increases from an aspect constituting a screen angle is obtained and the image quality of a medium contrast image is enhanced by enlarging an expression pixel size with respect to image data containing the text character mixed in the medium contrast image while printing increased in resolving power without enlarging a pixel size is possible with respect to the text character and image quality is enhanced markedly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording device such as a laser beam printer.

[Prior Art 1] In recent years, recording devices using electrophotography, such as laser beam printers, have come into widespread use as output devices for computers. These devices had many advantages such as high image quality and low noise, and were a factor in the rapid expansion of the desktop publishing field.

At the same time, with the development of host computers and controllers that control the printers mentioned above, such as higher memory capacity, faster processing speed, lower price, and higher functionality, not only binary printing using black and white printing but also dither printing and density pattern printing have become possible. Various processes have become possible in reproducing halftone images, such as pulse width modulation of recording pixels. In particular, the method of pulse width modulation of recording pixels has begun to attract attention as a high-quality halftone expression method because the pixel size for expressing halftones can be smaller than that of the dither method or the like. A specific example of such a pulse width modulation method is the apparatus described in Japanese Patent Laid-Open No. 61-225971.

In this example, recording is performed by aligning the end of the recording pulse signal of the preceding recording pixel with the beginning of the recording pulse signal of the subsequent recording pixel in a pair of pixels adjacent in the recording scanning direction. A timing chart explaining this operation is shown in FIG.

However, the above conventional example has the following drawbacks.

First, since the pulse width growth direction of even-numbered pixels is simply reversed with respect to the pulse-width growth direction of odd-numbered pixels, the unit for expressing halftones is one pixel. Therefore, it is difficult to accommodate changes in the size of units expressing halftones, which is required to support the Bost Script language, which is beginning to attract attention in the desktop publishing field.

Second, since this is a method that involves aligning a pair of pixels, the pulse width growth method for each pixel should either grow from the right edge of the pixel to the left, or grow from the left edge of the pixel to the right. It can only be constructed by combining the two growth methods. For this reason, the degree of freedom of the screen angle when composing the halftone image required to support the PostScript language was restricted, and it was impossible to create a screen angle that corresponded to small steps. .

Third, even though a pair of pixels are combined, if the pixel density increases (for example, 600 dpi or 800 dpi or more compared to the conventional mainstream printing density of 300 dpi), as a result, the number of interruptions in the pixel recording pulse signal will increase. However, due to the characteristics of electronic printheads, there is a drawback that the image quality deteriorates, and this method is a technique that is limited to recording devices with low print density.

In order to avoid this inconvenience, for example, four pixels are combined into one large-sized pixel (for example, four pixels of 600 dpi are combined and treated as a 150 dpi pixel).

) and express the intermediate tones using this pixel, but in this case, the expression of the intermediate tones is improved, but
Since the pixel size is the same for text information such as characters, the image quality for text information deteriorates.

〔the purpose〕

The present invention has been made in view of the above points, and it is an object of the present invention to provide a recording device that can obtain high-quality reproduced images.

According to this embodiment, the pixel size, the growth start point of the pulse width in the pixel, and the gradation code information of the pixel are input through the printer interface (connected to an external controller), and the gradation is determined. Depending on the code information, it detects whether text characters or halftones are to be printed. Text characters are printed at the minimum pixel size, and halftones are printed at the specified pixel size. , which prints halftone printing of a specified gradation that grows from a specified pulse growth start point.

The above method makes it possible to change the size of the unit that expresses halftones, increases the degree of freedom in configuring the screen angle, and provides image information including text characters mixed in the halftone image. On the other hand, for halftone images, the image quality is improved by increasing the representation pixel size, but for text characters, it is possible to print at higher resolution without increasing the pixel size, which has the effect of significantly improving image quality. be.

〔Example〕

FIG. 1 shows a first embodiment according to the invention.

In the figure, l is a laser beam printer.

2 is a halftone processing circuit that receives parallel code data DAφ to DA7 .2 sent from an external controller. DBφ〜DB
8 is input in synchronization with the capture clock CLK, and a PWM signal is output based on the data.

3 is a logic circuit which inputs the PWM signal and a binary image signal VD sent from an external controller, performs predetermined logic processing, and outputs a laser drive signal.

4 is a CPU that manages various controls of the printer, and one of its functions is to receive a serial communication signal SC from an external controller, and perform the halftone processing according to a command sent from the external controller as the communication signal. circuit 2
or the logic processing of the logic circuit 3.

FIG. 2 shows a timing chart of parallel code data in the embodiment shown in FIG. In the same figure, it is a synchronization signal for main scanning of the BD scratch signal, and is a predetermined time Ta from the BD scratch signal.
Parallel image code data DAφ from later timing
~DA7 and DBφ~DB7 are sent out in synchronization with the clock signal CLK. The parallel code data to be sent out is sent out every cycle Ta.

The period Ta is a period corresponding to the print density for blink binary printing, and corresponds to 1 dot corresponding to a print density of 600 dots/inch in the sub-scanning direction and 600 dots/inch in the main scanning direction, for example. It is a cycle.

FIG. 3 shows a detailed diagram of an example of the halftone processing circuit 2. As shown in FIG.

In the figure, lO is a data selector that selects either the data string of code data DBφ to DBS sent from the external controller or the code data DB sent from the CPU 4.
Select one of the data strings φ° to DB5° by a select signal SEL controlled by the CPU 4,
In order to output data Bφ to B5 input to the data latch circuit 11 and latched by a latch pulse LT output from a timing control circuit 13 described later, code data DAφ to DA3 is sent from an external controller using a read-only memory. In response to the data Bφ to B5 output from the latch circuit 11 and the control signal Al01All that can be controlled by the CPU 4, 16-bit data Dφ to D15, which are six-wired to the addressed address, is output.

15 and 16 are 16-bit parallel input serial output shift registers, which input the 16-bit data output from the read-only memory 12 as parallel inputs to the latch pulses LT or LT' output from the timing control circuit 13. The data is input by the clock CK or CK' which is also output from the timing control circuit 13, and the data is shifted to S4 or S4', S8 or S8°,
Serial data is output from the S12 or S12', S16 or 816' terminal.

In this case, the input 16-bit parallel data Dφ
~D15 is DI5, DI4, DI3, DI2 from the S16 or S16' terminal according to the clock CK or CK'.
)...D2)DISDφ, are output in this order, and from the S12 or S12' terminal, DllSDIO1D9,...
DISDφ, is output in this order, and from the S8 or S8' terminal, DI, D6, D5, ... DI, Dφ, is output in this order, and from the S4 or 84' terminal, D3, D2) DISD
They are output in the order of φ. The shift registers 15 and 16 are alternately accessed by the timing control circuit 13, and when one latches data, the other operates to output data in response to a clock.

17 is a data selector which receives signals S4, S8.312) S16 input from the shift register 15 and signals S4°, S8°, S12° input from the shift register 16;
, S16゛ and W (="φ") data and B (="l"
) out of a total of 8 signals, one is selected by the control code signals Pφ to P3 outputted from the timing control circuit 13 and output as a PWM signal.

14 is an oscillation circuit, which has a period of 174 of the period Tb (l/
A clock signal f with a frequency of 8 or less is acceptable),
The BD double signal is phase synchronized and input to the timing control circuit 13.

The timing control circuit 13 receives a clock signal CLKSBD signal from an external controller, a clock signal f, and a CPU
Control signal CI from 4 and C2) Code data DAφ~
DA3, latch data B4 to B5 and DB6 signals are input, and based on these signals, the latch signal LT of the latch circuit 11, the latch signal LT and clock signal CK of the shift register 15, and the latch signal LT' of the shift register 16 are output.
and outputs a clock signal CK' and select data codes Pφ to P3 of the data selector 17.

FIG. 4 shows the code correspondence of code data B4 to B5.

The code indicates the unit size of the pixel to be pulse width modulated.

B4=0. If B5=0, the first pixel early (sub-scanning 6
00 dots/inch, main scanning pixels equivalent to 600 dots/inch, B4=1. When B5=O, it indicates the second pixel early position (pixels equivalent to 600 dots/inch in sub-scanning and 300 dots/inch in main scanning), and when B4=0 and B5=1, it indicates the third pixel early position (pixels equivalent to 600 dots/inch in sub-scanning and 300 dots/inch in main scanning). Sub-scanning 600 dots/inch,
Pixels equivalent to 200 dots/inch in the main scan)
= 1, B5 = 1, the 4th pixel early (sub-scanning 600
dots/inch (pixels equivalent to 150 dots/inch in the main scan).

FIG. 5 is a diagram showing the pixels in the first to fourth pixel units divided equally, and each divided unit is assigned an address number.

FIG. 6 shows the code correspondence of code data Bφ to B3.

The code indicates the address (corresponding to FIG. 5) of the start point of pulse width growth of the pixel to be pulse width modulated. For example, Bφ=
In the case of φ, B1=ISB2=φ, B3=φ, it is shown that the pulse width grows in accordance with the density in each pixel shown in FIG. 5, centering on the pixel at address 3.

FIG. 7 shows growth patterns of pulse widths corresponding to the growth starting point corresponding to the first pixel unit. The numbers attached to the pixels in the figure indicate the order in which the pulse width grows depending on the density.

Similarly, FIGS. 8 to 10 show growth patterns of pulse widths corresponding to growth starting points corresponding to the second to fourth pixel units.

As an example, FIG. 11 shows pulse width patterns according to density levels corresponding to the growth start point address=1.8.12 in the third pixel unit.

FIGS. 12 to 14 show the arrangement of pixel units (thick lines indicate pixel units) when halftone printing is performed by combining the above-mentioned pixel units.

FIG. 12 shows a combination array of only the fourth pixel unit.

In FIG. 13, the l-th line is a combination of only the first pixel unit,
This is an example in which the pixel units are changed for each main scanning line, such as the second line is a combination of only the third pixel units.

FIG. 14 is an example in which the pixel unit is changed for each pixel.

FIGS. 15 and 16 show the rightmost end (=main-scan trailing end) of the printed image on the paper with respect to the pixel-by-pixel arrangement of FIG. 14.

In Fig. 15, 1 for the specified position in the main scanning direction.
There are bumps in each pixel. This is to control so that when one pixel unit is not completed at a specified position, printing is completed after that pixel unit is completed.

On the other hand, in FIG. 16, printing is controlled to be interrupted at the specified position even if the pixel unit is not completed at the specified position.

In the above case, the specified position is determined by counting a predetermined number of clocks in the main scanning direction.

In FIG. 3, DB6 is a signal that instructs whether or not to permit output of the latch pulse LT of the latch 11 of the timing control circuit 13, and when DB6=φ, the latch pulse L
Prohibit output of T, and if DB=1, latch pulse LT
Allow the output of

Therefore, as shown in FIG. 14, when it is necessary to change pixel units and pulse growth starting points successively, it is sufficient to leave DB6-1 as is, or for each main scanning line as shown in FIG. When changing the pixel unit or the pulse growth starting point, it is sufficient to set DB6=1 only for the first pixel in the main scan, and add DB=φ for the next and subsequent pixels.

In addition, if there is no need to change the pixel unit or pulse growth start point within one page as shown in FIG.
And it is sufficient. In this case, the pixel unit and pulse growth start point are separately received as a command from the external controller via serial communication, and in response to this, the CPU 4 causes the latch 11 to latch the data of DBφ° to DB5' using the select signal SEL. You may also use a method of printing after printing.

The CPU 4 can selectively switch among the four data tables by changing the data storage area address of the read-only memory 12 using the AIO signal and the All signal. This makes it possible to select the most suitable table according to the printing characteristics of the printer.

FIG. 17 shows how the screen angle can be freely changed in the combination of second pixel units. As shown in the figure, this can be done by sequentially changing the pulse growth starting point in the sub-scanning direction.

FIG. 18 shows an example in which the density level of each pixel for the code data Aφ to A3 is made to correspond to the density level for the third pixel unit shown in FIG.

In the same figure, when Aφ to A3 are all “0” (:
Data = “φ”) is the smallest pixel unit (first pixel unit)
Prints white. Further, when Aφ to A3 are all "1" (data field "F"), it is similarly regarded as the smallest pixel unit (first pixel unit) and black is printed.

In this case, Aφ to A3 are controlled by the timing control circuit 13.
It is determined whether all are "°φ" or "bi".

As a method of controlling the timing control circuit 13, either of the following two methods may be used.

The first method is that if all of Aφ to A3 are "φ" or "pi", that pixel is printed in the first pixel unit regardless of the data of B4 and B5, and the B4 input at the next timing is
, B5, based on the pixel unit, the growth starting point, and the density code, the designated pixel is expressed so as to constitute the designated pixel unit, including the first pixel unit.

Examples of this case are shown in FIGS. 19 and 20.

Figure 19 shows the case where the fourth pixel unit is specified as the pixel unit, and shows a map of code data per 600 dots/inch as one frame. The density code of the frame that is a note is “φ”
A frame marked with 'F'' indicates that the density code is 'F''. The printed image corresponding to this is shown in FIG. In other words, without causing a shift in the fourth pixel unit, the first pixel unit is changed to white or code “F” for the code “φ”.
” can be printed in black.

This means that in the case of halftone printing such as a picture, the pixel unit is made large in size, and in the case of text printing such as characters, the pixel unit is made small in size, which is very effective in improving image quality.

In the second method, all of Aφ to A3 are “φ” or “l” as described above, and after printing in the first pixel unit, the pixel unit and growth starting point specified by the next data are This is also a method for printing density codes as new pixels starting from the first pixel unit.

In either of the above two methods, the density code specified as a specified pixel unit is not “φ” but “F”.
Only the first code outputted within a pixel as a code from "l" to "E" that is not "" is valid, and subsequent codes from "1" to "E" within the same pixel are ignored.

Of course, for the code "φ" or "F" within the same pixel, printing is performed in units of the first pixel.

In the above explanation, the minimum pixel unit is 600 pixels in the sub-scanning direction.
Dots/inch, 600 dots/inch in the main scanning direction has been explained, but the invention is not limited to this. For example, the main scanning direction may be treated as 80 dots/inch, 480 dots/inch, 400 dots/inch, or 300 dots/inch. Also good.

In addition, in the above explanation, the minimum pixel unit is 4
Although the explanation has been given as an example of division, it is not limited to this, and by increasing the number of divisions such as 8 divisions, 16 divisions, etc.
The growth starting point and concentration can be controlled more precisely. In this case, the concentration codes DAφ to DA3 and the growth starting point code DBφ
It is possible to increase the number of bits of ~DB3 and pixel unit specification codes DB4~DBS.

The designation of pixel units is not limited to four, but any number may be selectable as long as the pixel units are an integral multiple of the pixel division unit size.

FIG. 21 shows an example of the logic circuit 3.

In the figure, 18 is an OR circuit, 19 is an exclusive OR circuit,
20 is an AND circuit, 21 is a NAND circuit, 22 to 25 are AND circuits, 26 is an OR circuit, and 27 is a multiplexer.

The input PWM signal and binary image signal VD are 18 to 2
After being input to the logic gate 1, Ql from the CPU 4,
The Q2 signal drives the multiplexer 27 to
By outputting one of φ, 5ISS2)B3, only the signal that has passed through any one of the logic gates is extracted and output as a laser drive signal.

This enables high-quality printing by outputting halftones such as pictures using PWM signals, outputting characters and other texts using binary image signals, and printing using both logical signals. .

The CPU'4 receives a logic instruction from an external controller via serial communication, and selects the logic in accordance with the instruction.

FIG. 22 shows another embodiment.

This embodiment shows a method of halving the number of code signal lines in the first embodiment shown in the first figure. In the same figure, 5
and 6 are data latch circuits, 7 is a JK flip-flop circuit, and 8 and 9 are AND circuits. A timing diagram for the same figure is shown in FIG.

In contrast to the clock CLK in FIG. 1, the 22nd clock CL
K' has twice the frequency.

Every time the clock CLK' is input, the output of the flip-flop circuit 7 is inverted, and the codes Dφ to D7 input at the first timing C are latched in the latch 6 as DBφ to DB7, and the codes Dφ to D7 input at the first timing C are latched to the latch 6 as the next clock input. At timing D, the codes Dφ to D7 are latched by the latch 5 as DAφ to DA7, and DAφ to DAT and DBφ to DB7 are simultaneously input to the halftone processing circuit 2.

The subsequent operations are the same as those described in FIG. 1 above.

This has the effect of reducing the number of code input signal lines by half.

〔effect〕

As described above, according to the present invention, it is possible to construct a recording device that is particularly compatible with the PostScript language and capable of high-quality printing.

[Brief explanation of the drawing]

1 to 21 are diagrams showing a first embodiment of the present invention. FIGS. 22 and 23 are diagrams showing a second embodiment of the present invention. FIG. 24 is a diagram illustrating a conventional example. 1 is a printer, 2 is a halftone processing circuit, 3 is a logic circuit, and 4 is a CPU. l 234 2nd push wheel position 1st push wheel position Fig. 3 Pixel unit growth starting point address 1 Growth starting point address 禦 8 Growth starting point address -12 Male 73 Fig. 17 View Fig. 23

Claims (2)

[Claims] (1) It has means for inputting information specifying the pixel size, information specifying the start point of area gradation expression for the pixel, and information specifying the gradation of the pixel, and based on the information A recording device characterized in that it performs halftone recording. (2) In claim (1), the gradation information has means for detecting that it is a specific value, and if it is a specific value, it is recorded as binary information of a specific pixel size. A recording device characterized by: