JPH02210330A - Liquid crystal electro-optical device - Google Patents

Abstract

PURPOSE:To provide other insulation gate type semiconductor device and other inverter and resistance on the same substrate by providing one electrode of a liquid crystal display device on an insulation gate type field effect semiconductor device. CONSTITUTION:On an insulation substrate 1, a first semiconductor (S1)2, an insulation or semi-insulation film 3 of thickness for allowing a tunnel current to flow, a second semiconductor (S2)4, and a third semiconductor (S3)5 having the same conductive type as that of a first semiconductor are laminated. Thereafter, S3 and S2 are eliminated, and also, S1 is formed to an arbitrary prescribed shape, and moreover, thereafter, an insulation film 6 is formed on the whole surface of S1, S2 and S3. Also, an electrode hole 8 and an electrode hole 7 are formed to S1(12) and S3(15), respectively and a metal or a semiconductor layer connected a gate electrode is laminated again. Subsequently, by etching this film, a gate electrode 17 is made, and simultaneously, wiring is executed closely on the surface of the substrate or the insulator 6 to a field effect semiconductor device (IGF), a capacitor and a resistance of the other part through the electrode holes from S1 and S3. In such a way, plural pieces of IGFs, resistances and capacitors can be made on the substrate, especially, the insulation substrate 1.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a liquid crystal electro-optical device in which a vertical channel type stacked insulated gate type semiconductor device is provided on a substrate.

Furthermore, the present invention relates to a liquid crystal electro-optical device provided with a composite semiconductor device having a capacitor connected to the source or drain of a stacked insulated gate field effect semiconductor device on a substrate.

The present invention is characterized in that such a composite semiconductor device is provided on a substrate in a matrix structure, and a liquid crystal display type display device is provided.

When the present invention provides a surface type solid state display device, a liquid crystal display device is known in which electrodes are provided in parallel glass plates and liquid crystal is injected between the electrodes. However, in this case, the limit for the number of picture elements in this display section is 20 to 200, and if it is more than that, the number of terminals taken out from the display section will be equal to the number of picture elements, so it is not practical at all. I couldn't do it.

For this reason, this display section is made up of a plurality of picture elements, arranged in a matrix, and in order to control any picture element and turn it on or off, a field-effect semiconductor device (
(called ICF). A control signal is then given to this ICF to turn on or off the corresponding picture element.

This liquid crystal display section can be represented by a capacitor (hereinafter referred to as C) as its equivalent circuit. For this reason, IGF and C
FIG. 1 shows, for example, a 2×2 matrix configuration (40).

In Figure 1, the matrix (40) is one ICF.
(10) and one C(31) constitute one picture element. Connect this to the bit line <51) and (51') in the row, and connect the other gate to the column (41).
, (41″).

Then, for example, (51) and (41) are set to "1", and (
51'), (41'') is set to ``O'', only the address (1, 1) is selected and turned on, and the liquid crystal display shown in the equality constraint is selectively turned on as C(31) electrically. can do.

The present invention aims at providing another insulated gate type semiconductor device (50), another inverter (60), and a resistor (70) on the same substrate in order to configure a decoder and a driver on the same substrate.

In this way, by combining the present invention based on its design specifications, it was possible to create a solid-state display device for flat-screen televisions that can replace cathode ray tubes.

Furthermore, a display device for a calculator only needs to have 10" to 10" picture elements, and for a TV, 10' to 105 picture elements, for example 25 x 10', should be provided on the same substrate, and around it. It can be seen that the necessary decoder and driver can be made using an IGF, an inverter, and a resistor that are formed at the same time.

Laminated type I necessary for making the system according to the present invention
This invention relates to a CF and a picture element in which a liquid crystal display section is connected to the CF.

FIG. 2 shows a cross-sectional view of the stacked IGF of the present invention and its manufacturing process.

In the drawings, a first semiconductor (having a P' or N' conductivity type) is placed on an insulating substrate, such as a glass or alumina substrate.
2) (hereinafter simply referred to as Sl) an insulating or semi-insulating film having a thickness that allows tunneling current to flow; (3) a second intrinsic or N or P type semiconductor; (4) (hereinafter simply referred to as S2), the first semiconductor and A third semiconductor (5) (hereinafter simply referred to as S3) having the same conductivity type was provided in a stacked manner.

This semiconductor is fabricated on a substrate using a silane glow discharge method at a temperature of room temperature to 500°C, and uses a silicon semiconductor with an amorphous or semi-amorphous structure. ing. The present invention focuses on semi-amorphous semiconductors (hereinafter referred to as SAs). Regarding this SAS, patents related to the inventor's inventions include, for example, Japanese Patent Application No. 55-143885 (55, 10, 15 application) (semi-amorphous semiconductor), Japanese Patent Application No. 55-1227
86 (55, 9, 4 application) (semiconductor device), patent application filed in 1977
A detailed example thereof is shown in 5-026388 (55,3,3 application) (semi-amorphous semiconductor).

Furthermore, in FIG. 2, S3 was selectively removed by photolithography, and S2 was further removed using this 83 as a mask. In order to see the end point of this photoetching, an insulating or semi-insulating film (hereinafter simply referred to as an insulating film) (
13) was made of silicon nitride.

Furthermore, the thickness was 5 to 30 people thick and was achieved by exposing the first semiconductor to an ammonia atmosphere irradiated with plasma. Next, after chemically removing this insulating film (13), FIG. 2(B) was obtained.

In order to make the insulating film formed later on S3 even thicker, a silicon oxide film may be formed in advance to a thickness of 0.3 to 1 μm by LPCVD (low pressure vapor phase method). Further, it was effective to improve the conductivity of S3 by adding 0.2 to 0.5 μ of MO2W on this 33 and 0.3 to 1 μ of SiO□ thereon.

In addition, in FIG. 2(B), the side surface may be formed perpendicularly to the surface of the substrate (1), but it is preferable to perform Taber etching on the trapezoid to remove the step cut at the step part of the gate electrode to be further laminated. was effective.

Furthermore, as shown in FIG. 2(C), the Sl was formed into an arbitrary predetermined shape by photolithography. For this reason, in the drawing, the surface of the substrate was exposed in step (11).

Furthermore, after this, an insulating film (6) was formed on the entire surface of these Sl, S2, and S3. This insulating film has a frequency of 13.56MHz~2
．． Activated by electromagnetic energy at a frequency of 45 GHz to create an atmosphere of oxygen or a mixed gas of oxygen and hydrogen.
It was formed by immersing it at 00°C and oxidizing it.

Furthermore, a multilayer structure may be formed by forming silicon nitride or phosphorus glass by the LPCVD method.

Then, a gate insulator (16) is formed around the 32 (14) side.
), and the surfaces of Sl and S3 could be formed as isolation films.

Further, as shown in (D), an electrode hole (8) is formed for S 1 (12) and an electrode hole (7) is formed for S 33 (15) by the third photolithography technique, and metal or The semiconductor layers were laminated again.

Next, this film is selectively etched using a fourth photolithography technique to form gate electrodes (17) with gate insulators (16) and gate insulators (16) in two directions (16°).
At the same time, wires were closely connected from 31 (12) and S 3 (15) to other IGFs, capacitors, and resistors through the electrode holes on the substrate surface or the insulator (6).

When AA' of the vertical sectional view of FIG. 2(D) is viewed from the lateral direction, it can be shown as FIG. 2(E). The numbers correspond to each other.

The semiconductor of the present invention mainly uses SAS, hydrogen is used to neutralize the dangling bonds in the semiconductor, and the substrate, semiconductor, and electrode leads are made of different materials to reduce stress caused by thermal expansion of them. Therefore, all processing is 300~6
00°C or less, preferably 300°C or less.

Further, the gate electrode (17) may have a multilayer wiring structure in which a semiconductor of the same conductivity type as 81 and S3 and a metal such as Mo are double-layered.

Thus, the source or drain is S 2 (14) with 31 (12) and the channel forming region (9L (9')).
, a drain or a source is formed by 33 (15), and a gate insulator (16) is formed on the side surface of the channel formation region.
(16°) It was possible to create a multilayer type ■GF tanbe with a gate electrode (17) provided on its outer surface.

In this invention, it is determined by the thickness of the channel length S 2 (14), and here it is set to 0.05 to 0.5 μ. This is because the mobility of SAS is 175 to 1/1 that of single crystal.
00, the purpose is to shorten the channel length and promote the characteristics as an ICF.

SAS has an electron bulk mobility of 100 to 500 cm"V
/S and 173 to 1/10, while that of holes is 5 to 100 cm"V/S and 115 to 1/100. However, amorphous silicon has an electron of 0.1 = 10
cm"ν/S, the hole is 10 to 103 times longer than 0.01 cm"V/S or less, it is extremely important to use SAS having a microcrystal structure in the semiconductor device of the present invention. That's true.

Furthermore, in the ICF of the present invention, the electron mobility is more than 3 times that of a single crystal and 5 to 100 times that of a hole, so it is extremely preferable to use an N-channel type.

Therefore, in S2, an intrinsic semiconductor whose surface portion is not doped with impurities is an N-type, so it was used as a P-type.

FIG. 3 shows a vertical sectional view of another IGF of the present invention and its manufacturing process.

In FIG. 3 (8), a SAS silicon film 31 (2) was formed on the substrate (1). Furthermore, selective etching is performed using photolithography technology to form the substrate (1).
A part (11) of was exposed.

Next, this SAS was transformed into a single crystal or polycrystalline structure using optical (laser) annealing, thermal annealing, or a combination of these to crystallize the SAS. The heating temperature was set to 700° C. or lower to prevent thermal stress on the substrate material.

This S 1 (2) basically only needs to have a different etching rate from S2 and S3. For this reason, P- or N-type oxygen or nitrogen is added to Sl, Sto, -X (0,5<
x<2), S 1sNs-X (1<x<4), and may be an intrinsic or semi-insulating semiconductor.

As shown in Figure 3 (B), 82 (4) is then placed on this top surface.
was intrinsic, N- or P type, and 33 (5) of the same conductivity type as Sl was laminated as P or N type and formed in the same reactor.

Furthermore, as shown in FIG. 3(C), this S 2 (4),
53 (5) in approximately the same shape by selectively removing other parts, and forming S 2 (14) and S 3 (15) into S 1
(12) Provided on top.

After that, the upper surfaces of Sl, S2, and S3 are oxidized to form an insulating film (
6). At this time, the area around the S 2 (14) side was provided as a gate insulating film (16), and the other part was provided as an isolating silane film.

Next, using the third photolithography technique, a semiconductor or conductor film was provided on the entire upper surface of the electrode holes or contact portions (7) and (8). This film is selectively removed using a fourth photolithography technique, and S1
(12) is provided with a continuous electrode lead (22) to other parts, S 3 (15) is provided with a similar electrode and lead via contact (7), and a channel around the side of S 2 (14) is provided. Gate electrodes (17) are formed on the gate electrodes (16), (16') on the side surfaces of the formation regions (9), (9'').
) was configured.

In this way the source or drain is connected to S 1 (12
) to make the channel forming region (9), (9”) 32
(14), drain or source is 33 (1
5). The gate is a gate insulator (16
), (16') and a gate electrode (17). In this way, when the gate electrode is set to "1" and the source or drain is set to "1", a current flows through the channel forming region to maintain the on state, and one or both of them are set to "O".
m, it was possible to create an off state.

"1" means a positive current of 0.5 to IOV in an N-channel type IGF, and 0" means a current of O2 or below the threshold voltage.

For a P-channel type ICF, it is sufficient to change the polarity of its electrodes. These logic systems are the same in FIGS. 1 and 2, as well as in FIG. 3 below or in the embodiments of the present invention.

Also, the resistance (70) in Figure 1 is shown in Figures 2 (D) and (E).
In FIG. 3(D), it is determined by the resistivity of the bulk component of 32, regardless of the voltage applied to the gate. That is, it is sufficient to stack 31, S2, and S3 without providing a gate electrode. Also, this resistance value is determined by the resistivity of S2 and its thickness.
The area to be fitted on the board can be determined according to the design specifications.

In the inverter (60) in Fig. 1, the driver (61
) are shown in Figures 2 and 3 (B), and their load (6
4) was an enhancement type or depletion type ICF in which one of S 3 (15) and S 1 (12) was connected to a gate electrode (17).

Furthermore, the output of this inverter (60) consists of (62), which can be combined by laminating two ICFs spaced apart on this substrate, and the input part can be provided corresponding to the gate electrode (17). good.

FIG. 4(A) shows a vertical sectional view of another embodiment of the present invention. That is, 31 (12), 52 (1) on the substrate (1)
4), S3 (15) and IG whose gate part is made up of a gate insulator (16) and a gate electrode (17)
The other part of F (10) and S 1 (12) and connected to the electrical system has one electrode (22) of a capacitor,
This other portion also constitutes one electrode (32) of the liquid crystal display. That is, Sl serves as one electrode of two capacitors. One of the capacitors has a large storage capacity and is used to extend the display time of the liquid crystal display.

In other words, even if a specific ICF is in the ON state for 10 to 100 ns in Figure 1, the LCD panel and the capacitor are connected in parallel, so the liquid crystal display remains on for 1 to 1000 ms. We were able to provide optical properties. For this reason, if the storage capacitor is large, the display on a flat panel corresponding to a TV's cathode ray tube, for example, will be vivid, and the number of picture elements will be 104 to 105, even if they are scanned digitally. It becomes possible to continue displaying 0″ and ’ in other picture elements.The effectiveness of this storage capacity is determined when the number of picture elements is 1.
This is effective in preventing the viewer from feeling tired when the number is 0 or more.

Also, this storage capacitor is made of gate insulator (16)
By using the same material as the badge, it was possible to create the same badge style without the need for any new processes. However, in order to increase this capacitance in a small area, silicon nitride, tantalum oxide, or other ferroelectric material may be used instead of silicon oxide.

Another electrode (32) electrically connected to S 1 (12) in the present invention is provided through an electrode hole (25). Polyimide or PT on these IGFlls
A glabellar insulator such as Q may be provided to a thickness of 1 to 3 microns, and it may be selectively provided by photolithography. This electrode (32) determines the size of one picture element. Calculators etc. have a 0°1 to 5IIIllφ or square shape. However, in the scanning type system as shown in Fig. 1, 50
It was set to 0 x 500. The liquid crystal display section (31) has one electrode on which a semiconductor device electrode is provided on the substrate, and a glass plate (28) having a transparent electrode (27) made of ITO or the like on the other side.
For example, a nematic type liquid crystal (26) was injected into the space to provide a gap of 20 μm.

The display may also be displayed in color. Furthermore, for example, these picture elements may be superimposed three times. Then, the three elements of red, green, and blue may be arranged alternately.

In contrast to FIG. 4(A) in which a storage capacitor and a liquid crystal capacitor shown in an equivalent circuit are connected in parallel, FIG. 4(B) is in series.

That is, on one electrode (22) electrically connected to S 1 (12), a dielectric film (23), the other electrode (24),
Further, one electrode (32) of a second liquid crystal capacitor (31) connected to this electrode (24) is connected via an opening (25), and a transparent electrode is provided to counteract this electrode (32). Electrodes (27) are provided across the dielectric of the liquid crystal (26).

As is clear from FIGS. 4(A) and 4(B), the present invention provides a substrate (
1) It is characterized in that a plurality of IGF capacitors, resistors, or a liquid crystal display flat panel is provided as a sandwich structure at the same time.

Furthermore, as is clear from the drawing (in response to light irradiation from above, in order to prevent light from irradiating IGF (10) and leaking when it is in the "0" state, it is covered from above, Another feature is that one electrode (32) of the picture element is provided.

In addition, unlike conventional methods, the ICF is completely isolated from other picture elements and provided in a stacked manner on an insulating substrate, which is an extremely significant feature.In particular, this entire process is carried out at temperatures below 600°C, especially below 300°C. The fact that this panel can be manufactured at a temperature of 1000 yen has the great advantage that it is less susceptible to thermal distortion even if it has a large area.

In addition, the semiconductor used in the present invention mainly has a non-single crystal structure, and in particular, the semiconductor used in the present invention has a structure called SAS, which is an intermediate structure between amorphous and single crystal, and is stable against thermal energy up to 600°C. Other characteristics of

In particular, SAS is a non-single-crystal semiconductor with a lattice strain of 10 to 100 large microcrystal structures, and even if induction energy of 500 KHz to 3 GHz is used for its manufacture, a temperature of up to 300''C is sufficient; The diffusion length of electrons and holes is 100 to 10' in amorphous silicon.
It has physical properties that are twice as large. Due to the structure in which such non-single crystal semiconductors are stacked on a substrate, it is possible to provide an IGF, and in addition, since current flows in the vertical direction, a microchannel type IGF with a channel length of 0.1 to 1μ can be fabricated with high precision photolithography. An extremely significant feature is that it can be manufactured without using lithography technology.

Furthermore, in the present invention, the characteristics of the IGF are determined by its threshold voltage (Vll) in consideration of the characteristics of the SAS.
For example, instead of doping by ion implantation, S
Another feature is that it is controlled by the amount of impurities added to 2 and the high frequency power applied.

Sonotame voltage resistance 20~30■, Vr14=-4~4V
+Q.

I was able to control it within a 2v range. Furthermore, since the frequency characteristics are microchannels with a channel length of 0.1 to 1μ, the frequency characteristics are 115 to 115
0 could be obtained even though a non-single crystal semiconductor was used.

Also, although it is a reverse leak, the Sl
By inserting silicon nitride to a thickness of 10 to 40 mm between and 32, the leakage of this N''-P junction or P''-N junction was less than LOmA even when IOV was applied in the opposite direction. This was comparable to the reverse leakage of a single crystal.

Also, if 10 to 30 mol% of oxygen is added to 31, for example,
In the structure shown in FIG. 3, leakage in the opposite direction was similarly small, and the leakage was 1/10 to 1/10 times less than in the case without additives. Naturally, this low leakage is extremely effective when implementing the matrix structure of FIG.

Furthermore, this reverse leak is caused by the laminated type 81, S2, S
When 3 was made of only amorphous silicon semiconductor, the voltage was over 1 mA when reverse bias was applied to IOV, but when this was applied to SAS, the voltage decreased to 5 to 50 nA.

It is BS in P or N type semiconductor of Sl, S3
The P impurity is coordinated in a substitutional manner, and its ionization rate is 4N or higher, the same as in the single crystal, and its activation energy is also 0.2 to 0.3 eV, compared to the 0.2 to 0.3 eV in the amorphous case.
The reason is that it has become small to 0.005 to 0.001 eV.

For this reason, highly coordinated impurities did not diffuse out during lamination, resulting in a clean bond.

That is, the present invention is a stacked ICF, uses a non-single crystal semiconductor therein, in particular uses SAS, and also adds nitrogen oxide to Sl at the same time to clarify the junction between Sl and 82. The main characteristics are that the reverse breakdown voltage is increased by increasing the energy band width, or that an SIS junction is used with an insulating or semi-insulating film interposed.

Furthermore, because of such a stacked IGF, it has become possible to fabricate a plurality of ICFs, resistors, and capacitors on a substrate, especially an insulating substrate, without using high-precision photolithography technology as in the past. This made it possible to develop it into a liquid crystal display.

In the present invention, silicon was used as the semiconductor, and silicon oxide or silicon nitride was used as the insulator. However, germanium, InP, BP, GaAs, etc. may also be used as the semiconductor. It goes without saying that a single crystal semiconductor may be used instead of a non-single crystal semiconductor, and a polycrystalline semiconductor with a large crystal grain size may be used instead of SAS.

[Brief explanation of the drawing]

FIG. 1 shows an equivalent circuit having a matrix structure in which picture elements are an insulated gate type semiconductor device, an inverter resistor, a capacitor, or an insulated gate type semiconductor device and a capacitor used in a liquid crystal electro-optical device according to the present invention. FIGS. 2 and 3 are vertical sectional views showing the steps of manufacturing a stacked insulated gate type semiconductor device used in a liquid crystal electro-optical device according to the present invention. FIG. 4 is a vertical sectional view of a composite semiconductor showing a flat display in which the stacked insulated gate semiconductor device of the present invention and a capacitor or liquid crystal are integrated.

Claims (1)

[Claims] 1. A structure in which a liquid crystal display device and a charge storage capacitor are connected in parallel to an insulated gate field effect semiconductor device, wherein the liquid crystal display device is connected in parallel to the insulated gate field effect semiconductor device. A liquid crystal electro-optical device characterized in that one electrode of a display device is provided. 2. A liquid crystal electro-optical device according to claim 1, wherein one electrode of the liquid crystal display device is provided so that no light is irradiated to the insulated gate field effect semiconductor device.