JPH02188080A - Ad-da converting circuit - Google Patents

Abstract

PURPOSE:To display resolution sufficiently at all times even when the amplitude of an input analog signal varies by varying the reference value of an AD converter according to the amplitude variation of the input analog signal and making an input full. scale follow up the variation in input amplitude, and varying the reference value of a DA converter reversely and reconverting a signal into an original input video signal. CONSTITUTION:A composite video signal (a) from a de-emphasis circuit 5 is supplied to a peak holding circuit 13, whose output VREF determines the input range (input full-scale) of the AD converter 7 and the output range (output full-scale) of the DA converter 9. Thus, a digital signal corresponding to the quantization level of the AD converter 7 which varies corresponding to an input brightness level is written in a memory 7 and then reconverted into the analog signal by the DA convertor 9. Consequently, the analog signal which is converted to the original analog level, i.e., a video signal component can be obtained from the DA converter 9 automatically.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an AD-DA conversion circuit that converts an analog video signal of a still image into a digital signal, and then converts it back into an analog signal and outputs the analog signal.

[Prior Art] Conventionally, in this type of AD-DA converter circuit, when converting an analog signal into a digital signal, the input analog signal is used for the expected dynamic range (undistorted input range) of the AD converter. It is uniquely set so that the maximum value of and the road distance are the same.

Furthermore, when converting a digital signal to an analog signal again, the expected maximum output analog signal is similarly set uniquely to be the full scale of the DA converter.

[Problems to be Solved by the Invention] However, in such conventional AD-DA conversion circuits, when the input analog signal is close to the full range of the AD converter, the resolution of the AD converter is not effective. However, as the input analog signal becomes smaller, the AD
There was a problem in that the resolution of the converter could no longer be used effectively, making it difficult to reproduce minute changes in analog signals.

The present invention has been made in view of these conventional problems, and provides an AD-D that can always make full use of the resolution of the AD converter and DA converter even if the amplitude of the input analog signal changes.
The purpose of this invention is to provide an A conversion circuit.

[Means for Solving the Problems] First, the present invention provides an AD converter that quantizes an analog video signal of a still image into a digital signal, and a DA converter that converts the digital signal from the AD converter back into an analog signal. The target is an AD-DA conversion circuit equipped with a device.

Regarding such an AD-DA conversion circuit, the present invention provides a first method in which the reference voltage of the AD converter is changed according to the amplitude fluctuation of the input analog signal to make the input full scale follow the change in the input Ji width. a control means, controlling the output full scale so as to change the reference voltage of the DA converter in the opposite direction to the change of the reference voltage by the first control means and return the output video signal to the original input video signal; A second control means is provided.

The present invention also includes a first amplifying means for amplifying the input analog signal to match the input full scale of the AD converter by gain control according to amplitude fluctuations of the input analog signal; A second amplifying means is provided for amplifying the analog signal from the DA converter by controlling the gain in a direction opposite to that of the second amplifying means.

[Function] In the AD-DA conversion circuit of the present invention having such a configuration, when the input analog signal becomes small,
A reference voltage for changing the full scale of the AD converter is controlled according to the input analog signal, or a signal with a substantially constant amplitude is input to the AD converter using a type of AGC control.

On the other hand, when returning a signal digitally converted by an AD converter to the original analog signal by a DA converter, either the reference voltage that changes the full scale of the DA converter is reversely controlled to return it to the original amplitude, or Alternatively, the amplitude is returned to the original amplitude by reverse AGC control.

As a result, the resolution of the AD converter and DA converter can be effectively utilized, and even minute changes in analog signals can be faithfully reproduced.

[Embodiment] FIG. 1 is a block diagram showing an embodiment of the present invention using a video floppy playback device as an example.

In FIG. 1, a still image signal recorded on a video floppy 1 includes a playback head 2, a preamplifier 3, a demodulation circuit 4,
It passes through the de-emphasis circuit 5 and is reproduced as a composite same video signal a. The composite video signal a from the de-emphasis circuit 5 has its synchronization component removed by a synchronization signal removal circuit 6, and only the video signal component is input to the N-bit AD converter 7 at the next stage.

The AD converter 7 operates with a conversion clock that is synchronized with time fluctuations during playback, which is generated by a PLL circuit (not shown), etc., and the conversion clock for the AD converter 7 is simultaneously applied to the next stage memory 8 (this is a memory It is also used as a clock for loading various types of memory (line memory, field memory, frame memory, etc.) depending on the capacity.

Reading from the memory 8 is performed using a stable or locked oscillation using a crystal or the like (not shown), and the read digital signal is input to an N-bit DA converter 9. The timing of inputting this signal to the DA converter 9 is the same as the stable clock read out from the memory 8.

By passing the video signal component from which the synchronization component has been removed through the AD-DA conversion circuit consisting of the AD converter 7, memory 8, and DA converter 9, the video signal component from which the jitter has been removed is sent from the DA converter 9. It can be output. The video signal component from the DA converter 9 is given to a synchronization addition circuit 10, where it is added with a synchronization signal generated from a synchronization generation IC that operates with a crystal oscillator (not shown), etc., and is finally applied to a CRT or the like. Plays and outputs composite video signals for connection.

On the other hand, the composite video signal a from the de-emphasis circuit 5 is given to the sync separation circuit 11, and the sync separation circuit 11 separates the sync signal from the composite video signal a, and based on the separated sync signal, the sync removal circuit 6 and It generates various timing signals necessary for the CPU circuit 12.

The CPU circuit 12 generates timing signals necessary for the AD converter 7, memory 8, and DA converter 9 in accordance with the timing signal from the synchronous separation circuit 11.

Furthermore, the composite video signal a from the de-emphasis circuit 5 is applied to a peak hold circuit 13, which detects and holds the maximum brightness level on the screen to obtain an output voltage VREE. The input range (input full scale) of the output voltage VREF from this peak hold circuit 13 to the AD converter 7 and the DA
Determine the output range (output full scale) of converter 9.

That is, the peak level of the luminance signal in the composite video signal @a shown in FIG. 2 (A>) or the video signal component from which the synchronization component has been removed shown in FIG. As a result, the resolution (VREF/2') of the N-bit AD converter 7 varies depending on the brightness level.

The digital signal corresponding to the quantization level of the AD converter 7, which changes in accordance with the input luminance level, is written to the memory 8 and then converted to an analog signal again by the DA converter 9, or When converting to an analog signal, the full scale of the DA converter 9 is changed at the same time by the output voltage VREF of the peak hold circuit 13, and as a result, the signal is automatically converted to the first analog level from the DA converter 9. An analog signal, that is, a video signal component can be obtained.

FIG. 3 is a block diagram showing another embodiment of the present invention, and in the embodiment of FIG.
The voltage to the converter 9 was varied according to the brightness level (peak level), but in the embodiment shown in FIG.
In addition, an amplifier 15 with a variable gain is also provided at the output stage of the DA converter 9, and the same function as the embodiment shown in FIG. 1 is realized by controlling the gain of the amplifiers 14 and 15.

That is, in FIG. 3, the variable amplifier 14 always maintains A in accordance with the output voltage VREF of the peak hold circuit 13 (not shown).
The gain is controlled so that the input signal can be captured over the full dynamic range of the D converter 7. On the other hand, regarding the variable amplifier 15, the signal that has been expanded or compressed by the gain control of the amplifier 14 is gain controlled in the opposite direction to the gain control of the amplifier 14 based on the output voltage VREF of the peak hold circuit 13, and the initial amplitude is adjusted. It controls the restoration.

FIG. 4 is a block diagram showing another embodiment of the present invention, and this embodiment is characterized in that the present invention is applied to the transmission section of a video floppy player.

In FIG. 4, a reproduction signal from a video floppy 1 passes through a reproduction head 2, a preamplifier 3, a demodulation circuit 4, a de-emphasis circuit 5, and a synchronization removal circuit 6, and only the video signal component is sent to the next γ correction circuit 16. Since video signals are generally reproduced on a CRT, the γ characteristics of the CRT are compensated in advance. The function of the γ correction circuit 16 is to correct this γ characteristic for use in a transmission receiver.

The signal compressed on the black side by the γ correction circuit 16 is input to the AD converter 7 whose reference voltage is the peak value of the video signal after γ correction by the peak hold circuit 13, and then taken into the memory 8, and then input to the DA converter. At step 9, the signal is converted back to an analog signal and output to the telephone line.

Here, the DA converter 9 is not a DA converter with a video band shown in FIGS.
The point that the initial signal level is restored based on VREF is the same as in FIGS. 1 and 3.

FIG. 5 is a block diagram showing another embodiment for determining the reference voltage VREF of the AD converter and DA converter.

That is, in the embodiment described above, the reference voltage VREF was determined by the peak hold circuit, but in the embodiment shown in FIG. High acid components in the signal are removed to some extent, and then the level within one field is sampled multiple times by the AD converter 19 and taken into the CPU (J20). The average level (VAvF) of the signal is determined and used as the reference voltage VREF, or the average level (VAVE) is multiplied by a predetermined constant viK and the sum (K-V
AVE) as the reference voltage VREF.

The above embodiment is an AD-DA that digitally converts a still image analog video signal and then converts it back into an analog signal.
Although a conversion circuit has been taken as an example, the present invention is not limited to still image analog video signals, and can be applied as is to AD-DA conversion circuits that target any appropriate analog signal.

[Effects of the Invention] As explained above, according to the present invention, the AD converter and the D
Since the resolution of the A converter can be fully and effectively utilized, even minute changes in analog signals can be faithfully reproduced.

Particularly in analog video signal conversion processing, when conventional reference voltages are fixedly set, for example when playing an overall dark screen, the resolution is insufficient for minute signal changes. However, in the present invention, the resolution is optimal for automatic fishing, and the reproduced image can be faithfully reproduced.

[Brief explanation of the drawing]

Fig. 1 is a circuit block diagram showing one embodiment of the present invention; Fig. 2 is a signal waveform diagram of Fig. 1; Fig. 3 is a circuit block diagram showing another embodiment of the invention: Fig. 4 5 is a circuit block diagram to which the present invention is applied for still image transmission; FIG. 5 is a circuit block diagram showing another embodiment of reference voltage determination in the present invention. 1: Video floppy 2: Playback head 3: Demodulator 5: De-emphasis circuit 6; Synchronization removal circuit 7: AD converter 8: Memory 9: DA converter 10: Synchronization addition circuit 11: Synchronization separation circuit 12: CPU circuit peak hold circuit γ correction circuit low pass filter AD converter CPU

Claims (2)

[Claims] (1) AD equipped with an AD converter that quantizes a still image analog video signal, etc. into a digital signal, and a DA converter that converts the digital signal from the AD converter into an analog signal.
- in the DA conversion circuit, a first control means for causing the input full scale to follow the input amplitude by changing a reference voltage of the AD converter according to amplitude fluctuations of the input analog signal; and the first control means; A second control means is provided for controlling the output full scale so as to change the reference voltage of the DA converter in the opposite direction to the change in the reference voltage by changing the reference voltage to return the output analog signal to the amplitude of the original input analog signal. An AD-DA conversion circuit characterized by the following. (2) A equipped with an AD converter that quantizes a still image analog video signal, etc. into a digital signal, and a DA converter that converts the digital signal from the AD converter into an analog signal.
In the D-DA converter, a first amplifying means for amplifying the input analog signal to match the input full scale of the AD converter by gain control according to amplitude fluctuations of the input analog signal; 1. An AD-DA conversion circuit comprising: second amplification means for amplifying the analog signal converted by the DA converter by controlling the gain of the first amplification means and controlling the gain in a direction opposite to that of the first amplification means.