JPH02177633A - Sound encoder - Google Patents

Abstract

PURPOSE:To obtain a sound encoder, which is immune to the error of a transmission line by providing a means to decide a type in a synthesization side without using a special bit for designating one of the plural types. CONSTITUTION:When a frame is composed of A, the whole or one part from the second bit to the 160th bit in the frame is uncorrelated to the part from the 161st bit to the 320th bit. On the other hand, when the frame is composed of B, the whole or one part from the second bit to the 160th bit in the frame is completely correlated to the part from the 161st bit to the 320th bit (in case that there is no error of the transmission line) or is strongly correlated (in case that there is the error of the transmission line). Thus, frame constitution can be easily detected according to the presence and absence of this correlation. Thus, the rate of the redundant bit can be made variable suitably for the various condition of the different degree of a code error.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a speech encoding device.

[Conventional technology]

One of the goals of a speech encoding device is to provide coded speech of the highest quality on the premise of using a given digital transmission path. Generally, digital transmission paths tolerate code errors. Therefore, it is necessary for the speech encoding device to provide encoded speech of the highest quality even under a code error environment.

BACKGROUND ART In recent years, communication networking has been progressing, and networks that include mobile communication and wired communication are being widely constructed. In general, mobile communication has a high code error rate, while wired communication has a low code error rate.

Therefore, the percentage of redundant bits should be high in mobile communications, and the percentage of redundant bits should be low in wired communications. In the case of a network that includes mobile communication and wired communication, the transmission paths between any three parties may be all wired, or there may be cases where at least mobile communication sections are mixed. Generally, it is easier to construct a network by fixing the total number of audio encoded bits and redundant bits.

Conventionally, by defining a frame in which the total number of audio encoded bits and redundant bits is fixed, and having a unique bit indicating the percentage of redundant bits in this frame,
It was adapted to various situations with different degrees of code errors. That is, several types of frame patterns having different proportions of redundant bits within one frame period are prepared, a label is attached to each of these several types, and this label is designated by a unique bit. This makes it possible to reduce the proportion of redundant bits when all the transmission paths between any three parties are wired, and to increase the proportion of redundant bits when at least mobile communication sections are mixed.

[Problem to be solved by the invention]

However, the conventional method has the drawback that if the bit specifying the label is incorrect, the audio cannot be decoded.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and to provide a speech encoding device that can vary the ratio of redundant bits to adapt to various situations with different degrees of code errors.

[Means to solve the problem]

The speech encoding device of the present invention includes means for adding redundant bits on the analysis side, means for detecting the structure of a frame including the redundant bits on the synthesis side, and a structure of the frame detected by the detecting means. and means for determining the basic encoding speed from the basic encoding speed.

〔Example〕

Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. 1st
In the figure, a speech encoding device 100 is the device of the present invention. The speech encoding device 100A is the same as the speech encoding device 100, and is illustrated at a position opposite to the speech encoding device 100 to facilitate explanation of the speech encoding device 100.

The speech encoding device 100 includes eight speech analysis means 1. Redundant bit adding means 2. Basic encoding speed determining means 3゜Basic encoding speed determining means 4. Frame configuration detection means 5. It is configured to include speech synthesis means 6. A binary speed designation signal is supplied to the basic encoding speed determining means 3 via a speed designation signal input terminal 31. When the speed designation signal is "l", it means a coding speed of 16 kb/s, and when it is "0", it means a coding speed of 8
means kb/s. For convenience of explanation, the function of signal line 46 will be ignored. The basic encoding speed determining means 3 determines the speech encoding speed on the analysis side based on the speed designation signal, and outputs the result to the speech analyzing means 1 and the redundant bit adding means 2 via signal lines 36 and 37. The audio analysis means 1 analyzes and encodes the audio signal supplied via the audio input terminal 11, and processes the audio signal at a basic frame period of 20 m5ec.

When the speed designation signal specifies "1", that is, 16 kb/s, the audio analysis means 1 converts the audio signal for 20 m5ec into data of 319 bits, and converts it into data of 319 bits, "00'", that is, 8 kb/s.
If you specify , it will be encoded into 159 bits data,
It is output to the redundant bit adding means 2. The redundant bit adding means 2 adds 319 bits when the speed designation signal is “l++”.
Add frame bit, 1 bit to the data, total 3
This data is outputted to the transmission line via the data output terminal 21 as 20-bit data. In addition, in the case of '0', 160 bits of redundant bits and 1 bit of frame bit are added to 159 bits of data, resulting in a total of 320 bits.
This data is similarly output to the transmission path as bits data.

Figure 2 (A) shows the frame configuration when the speed designation signal is Pa1', and Figure 2 (B) shows the frame configuration when the speed designation signal is Pa0''. If encoded data and redundant bits are treated as encoded data in a broad sense,
FIGS. 2(A) and 2(B) show the same frame structure.

The data output to the transmission path via the data output terminal 21 is supplied to the data input terminal 51A of the speech encoding device 100A. The audio signal supplied through the audio input terminal 11A is similarly converted into data having the structure shown in FIG. The frame configuration detection means 5 detects the frame configuration using the following method. That is, if the frame is configured as shown in FIG. 2(A), the second
All or part of the 160th bit and the 161st bit
There is no correlation between the bit and the 320th bit. On the other hand, if the frame is configured as shown in FIG. 2(n), all or part of the 2nd to 160th bits in the frame,
The 161st to 320th bits have a perfect correlation (if there is no transmission path error) or a strong correlation (if there is a transmission path error). Therefore, the frame structure can be easily detected based on the presence or absence of this correlation. Furthermore, when the frame structure is as shown in FIG. Output to. The frame structure detecting means 5 also outputs the detection result of the frame structure as binary data to the basic encoding speed determining means 4.

The basic encoding speed determining means 4 determines the basic encoding speed based on the frame structure and outputs the result to the speech synthesizing means 6 and the basic encoding speed determining means 3. The speech synthesis means 6 synthesizes speech from the encoded data shown in FIG.

The basic encoding speed determining means 3 determines the encoding speed on the analysis side from the speed designation signal and the signal supplied via the signal line 46, and when the designations of the two signals are different, the most To effectively handle a signal specifying a low encoding rate.

Now, consider a case where the audio encoding device 100 is connected to a wired system and the audio encoding device 100A is connected to a wireless system. A signal "1" indicating that the frame configuration is as shown in FIG. 2(A) is supplied to the terminal 31, and a signal "0" indicating that the frame configuration is as shown in FIG. 2(B) is supplied to the terminal 31A. be done. The audio encoding device 100 and 10OA start mutual communication.

Immediately after starting, the apparatus 100 outputs data having the configuration shown in FIG. 2(A), and inputs data having the configuration shown in FIG. 2(B). From the frame immediately after that, the device 100 is shown in FIG.
) Outputs data with the configuration shown in ().

Next, an example of the redundant bit shown in FIG. 2(B) will be explained.

Of the 159 bits of encoded data, 40 bits that are particularly affected by transmission path errors are selected, and these 40 bits are transmitted four more times using redundant bits. That is, for these 40 bits, the same bit is transmitted only five times.

When the error rate of the transmission path is p, the probability p1 that all of these 5 bits match is (1-p)'. Assuming that the maximum value of p is 0.1, the probability p that all 5 bits match is approximately 0.59. On the other hand, in the case of the configuration shown in FIG. 2(A), if pl is calculated, it is approximately 0.031. Therefore, considering the population of 40 bits, even if the error rate of the transmission path is Ool, the structure of the frame can be easily determined.

Next, the frame structure detection means 5 will be explained in detail using the drawings. FIG. 3 is a block diagram for explaining the frame structure detecting means 5. As shown in FIG. The frame structure detection means 5 includes the frame synchronization means 101. Calculation control means 102. It is configured to include storage means 103. Data received via the data input terminal 51 is supplied to the frame synchronization means 101 and the calculation control means 102. The frame synchronization means 101 detects the position of a frame from the data string having the structure shown in FIG.
Output to. The calculation control means 102 is initialized with frame position data. After the calculation control means 102 is initialized,
The received data is taken in and stored in the storage means 10.
At the same time, the address data is output to the storage means 103. The storage means 103 stores the data transferred to addresses specified by the address data, for example, addresses "1" to "320".

The calculation control means 102 is "121""161""20"
The data at addresses 1", 241, and 281 are read from the storage means 103, and it is determined whether these 5 bits all match. If they all match, the data is set to "1".
to address "2121", and if not all - 0"
write to the same address. Furthermore, the calculation control means 102
A majority decision is made on the bits and the result is written to address "1121".

The calculation control means 102 then calculates "122", "162", and "202".
”, “242”, “282” address data is input, and in the same way, all matches and majority judgment results are “2122”
Write to the address “1122”.Then “160” “2”
00″ “240” 280″ Input the data of address “320” and check the result of all matches and majority judgment as “2160”
, repeat the process until writing to address "1160".

Next, the calculation control means 102 counts the total number n of determination results tln written in addresses 2121'' to 2160''.
is 5 or less, the data of the configuration shown in FIG. 2(A) is
If n is 6 or more, it is determined that data having the configuration shown in FIG. 2(B) has been received, and the determination result is output to the basic encoding speed determination means 4.

Furthermore, the calculation control means 102 has the data structure shown in FIG.
), if it is determined that “2” to “
The data at address 320'' is output to the speech synthesis means 6.Also, if it is determined that the data structure is as shown in FIG. 2(B),
Addresses 11211 to “120” of storage means 103, and 1
The data at addresses 121” to ’1160” are sent to the voice synthesis means 6.
Output to.

〔Effect of the invention〕

As described above, the present invention provides a special bit for specifying one of the types in a speech encoding device that uses several types of frame patterns with different proportions of redundant bits within one frame period. By having means for determining this type on the synthesis side without using it, it is possible to realize a speech encoding device that is robust against transmission path errors.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a frame configuration diagram for explaining the present invention, and FIG. 3 is a block diagram showing details of frame groove formation detecting means. ■... Voice analysis means, 2... Redundant bit adding means, 3... Basic encoding speed determining means,
4...Basic encoding speed determination means, 5...
・Frame structure detection means, 6...Speech synthesis means. Figure 2 Figure 3

Claims (1)

[Claims] In a speech encoding device that encodes speech every desired frame period on the analysis side and decodes it on the synthesis side, the analysis side has means for adding redundant bits, and the synthesis side has means for adding redundant bits. A speech encoding device comprising: means for detecting the structure of a frame included; and means for determining a basic encoding speed from the structure of the frame detected by the detecting means.