JPH02177477A - Reading/writing in mos semiconductor storage device - Google Patents

Abstract

PURPOSE:To obtain a method of performing a relatively flat structure by a simple manufacture by injecting and collecting holes generated by tunneling between bands in an oxide film on the surface of a high concentration diffused layer under electrodes to write/read information by using an effect of limiting a leakage current from the high concentration diffused layer to a substrate. CONSTITUTION:A MOS semiconductor storage device having a high concentration diffused layer 15 formed in a semiconductor substrate 11, an oxide film on the surface, a MOS capacity 14 for storage made of an electrode 17 thereon, a selecting MOS transistor 13 integral with one diffused layer 18b with the diffused layer 15, and wirings 23 connected to the other diffused layer 18a of the MOS transistor 13 for transferring data is prepared. A voltage is applied between the electrode 17 of the MOS capacity 14 for storage and the high concentration diffused layer 15, and holes generated by tunneling between bands on the surface of the high concentration diffused layer 15 are injected and collected in the oxide film 16 to be written to apply a lower voltage than the voltage at the time of writing between the electrode 17 and the high concentration diffused layer 15 to discriminate a leakage current value between the high concentration diffused layer 15 and the substrate 11 of the tunneling current between the bands at that time to be read out.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a read/write method for an electrically writable MO5 type semiconductor memory device.

(Prior Art) Conventionally, electrically writable MOS type semiconductor memory devices have been described in the literature [Modern MOS Technology Process Systems].
Devices and Design (MODERN MOS)
T [ICHNOLOGY PROCESSES, D
HVICES! DIlSIGN) PP 213-2
15, information was stored by accumulating electrons in the floating gate and changing the threshold of the transistor.

(Problems to be Solved by the Invention) However, in such a method, a 2N polysilicon structure is required, and the manufacturing method of the device becomes complicated.
There were problems such as a large step being formed on the surface of the device, which was disadvantageous for subsequent wiring formation.

The present invention provides a read/write method for a MOS type semiconductor memory device that eliminates the complexity of the manufacturing method described above and the problem of the formation of large steps, and achieves a relatively flat structure with a simple manufacturing method. The purpose is to

(Means for Solving the Problems) A reading/writing method for a MOS type semiconductor memory device according to the present invention provides a storage MOS 91 consisting of a high concentration diffusion layer formed on a semiconductor substrate, an oxide film on the surface thereof, and an electrode thereon. , prepare a MOS type semiconductor memory device including a selection MOS transistor whose one diffusion layer is integrated with the high concentration diffusion layer of the MOS capacitor, and a data transfer wiring connected to the other diffusion layer of the selection MOS transistor. Then, a voltage is applied between the electrode of the storage MOS capacitor and the high-concentration diffusion layer, and holes generated by band-to-band tunneling on the surface of the high-concentration diffusion layer are injected and captured into the oxide film to perform writing. A voltage lower than the voltage is applied between the electrode and the heavily doped diffusion layer, and the value of the leakage current between the heavily doped diffused layer and the substrate, which is the band-to-band tunnel current at this time, is determined and read out.

(Function) Figure 2 shows an N-channel type MOS transistor. In this MOS transistor, the concentration of the p-type silicon substrate l is IQl 5 to 101? The concentration of the n-type drain region 2 is 1OII to toto/cj.

Further, the film thickness of the gate oxide film (S10□ film) 3 is 100~
It is as thin as 300 m, and the overlap 1w between the gate electrode 4 and the drain region 2 is 0.1 to 0.44 m.

In a MOS transistor such as
When is a negative voltage, a large hand bend occurs where the drain region 2 and gate electrode 4 overlap, and electrons flow to the drain region 2 due to band-to-band tunneling of electrons. Further, the tunneled electrons generate holes, and the holes flow to the substrate 1, so that a leakage current is generated between the drain region 2 and the base 11. This leakage current is limited by the voltage difference between the drain region 2 and the gate bridge 4.

Next, when the negative voltage of the gate electrode 4 is increased, the holes generated above the drain head 2 are easily injected into the gate oxide film 3 over the barrier at the gate oxide film 3/semiconductor interface. The holes injected into the gate oxide film 3 are
Caught in a trap in 193. Then, the electric field above the drain head mount 2 is relaxed by the captured holes.
When the gate electrode 4 is at a negative voltage, the gate voltage-drain current characteristic changes from the solid line to the dotted line in FIG. 3. Therefore, after applying a large negative voltage to the gate electrode 4 or not, by determining the leakage current between the drain region 2 and the substrate 1 when the gate electrode 4 is applied with a negative voltage, the gate electrode 4 can be applied with a large negative voltage. In other words, it can be determined whether holes generated by interband tunneling above the drain region 2 are injected and captured into the gate oxide film 3. In other words, it can be determined whether information has been written. Note that the gate electrode 4
Instead of increasing the negative voltage of the drain region 2, the positive voltage of the drain region 2 may be increased.

This invention performs electrical writing and reading by utilizing the above phenomenon. In this invention, a semiconductor 1-conductor substrate has a memory MOS capacitor and a selection MOS capacitor. IOS transistors and data transfer wiring are formed. Now, if the gate oxide film thickness of the memory MOS capacitor is 200 to 300 people, the electrode of the memory MOS capacitor is set to about -IV, a voltage of about +15V is applied to the data transfer wiring, and the selection is made. When the memory MOS transistor is turned on, the memory MO
A voltage of about 16 V is applied between the S capacitor electrode and the high concentration diffusion eyebrow. This voltage bends the band on the surface of the high concentration diffusion layer, and holes generated by interband tunneling are injected into the oxide film of the storage MOS capacitor and captured by the cards.

In other words, information has been written.

Next, when the data transfer wiring is set to about 3 to 5 V and the selection MOS transistor is turned on, a current flows to the substrate via the wiring, the selection MOS transistor, and the high concentration diffusion layer of the storage MO5 capacitor. If °ζ information is written, a small current flows, and if it is not written, a large current flows. Therefore, information can be read by determining this current value.

(Embodiment) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention. In this figure, reference numeral 11 denotes a P-type silicon substrate, whose surface is divided into an active region and a field region by a field oxide film 12 for element isolation selectively formed.
In the active region, memory cells are formed in pairs on the left and right sides in this figure. The memory cell is a selection MOS
It consists of a transistor 13 and a storage MOS capacitor 14. The storage MOS capacitor [114 is the N° formed in the substrate 11.
Diffusion layer 15 and its surface (also the surface of substrate 11)
It consists of a thin oxide layer 116 and a polysilicon electrode 17 extending thereon.

The selection MOS transistor 13 includes a pair of N2 diffusion layers 18a and 18b as a source and drain, and the oxide film 1.
The N° diffusion layer 18b is formed integrally with the N° diffusion layer 15 of the storage MOS capacitor 114. There is. Further, the entire surface of the substrate 11 is covered with an interlayer insulating film 21, and a contact hole 22 is formed in this inter-glabellar insulating film 21, and an aluminum arrangement (bit line) 23 for data transfer is passed through this contact hole 22.
is connected to the other N° diffusion layer tea of the selection MOS transistor 13. Then, the ground potential, about +15 V of the electric current ifgE1, and about +5 V of the electric power 1fIE217) are selectively applied to the aluminum wiring 23 by the changeover switch 24, and furthermore, between the power supply E2 and the fixed terminal of the changeover switch 14, A resistor 25 is inserted, and both ends thereof are connected to the human power of the sense amplifier 26. on the other hand,
The electric bridge 17 of the memory MOS capacitor M14 is always connected to the power source E3.
A voltage of about -1V is applied. Further, the P-type silicon groups +Ii and 11 are connected to the ground potential. Note that the changeover switch 24, resistor 25, and sense amplifier 26 are
It can be formed on the P-type silicon base Fi11 using semiconductor technology. The entire surface of this P-type silicon substrate 11 is covered with protective insulation I
f! It is covered with 27.

The operation of the device configured in this way will be explained.

A voltage of about -1V is always applied from the power supply E3 to the electric bridge 17 of the storage MOS capacitor 14. In this state, during writing, the writing memory cell selection MOS) transistor 1
A voltage is applied to the gate electrode 20 (word line) of No. 3, the selection MoS transistor 13 is turned on, and the selector switch 247 selects a voltage of about +15V of the power supply El to the data transfer aluminum wiring 23 (bit line). and apply it.

By doing so, N of the storage MOS capacity 1i14.

A voltage of about 16 V is applied between the diffusion layer 15 and the electrode 17. This voltage bends the band on the surface of the N° diffusion layer 15, and holes generated by band-to-band tunneling are injected into the oxide film 16 of the storage MOSS amount 14 and captured by traps.

In other words, information has been written.

At this time, in unselected memory cells, the selection MOS
) The transistor 13 is off, and the memory MOS capacity is 1.
Since no voltage is applied between the N2 diffusion layer 15 of No. 4 and the electric bridge 17, no holes are generated and no information is written.

Next, in the case of reading, a voltage of about 3 to 5 cm from the power source E2 is applied to the data transfer aluminum wiring 23 by the changeover switch 24, and the selection MOS transistor 13 is turned on. Then, a current flows through the aluminum wiring 23 - selection MOS transistor 13 - storage MOSO 3 capacitor N diffusion layer 15 to the base Fi, 11, but if information is written as described above, the current will be small (~ 1 xlO-”A//
If the current profile of s) is not written, a large value (~1
A current of x 10-'A/μ) flows. Information is read by extracting this current difference as a voltage difference using a resistor 25 and making a determination using a sense amplifier 26.

(Effects of the Invention) As explained in detail above, according to the present invention, by injecting and capturing the genuine tag generated by interband tunneling on the surface of the high concentration diffusion layer under the electrode into the oxide film, the high concentration diffusion layer Since information is written and read using the effect of limiting leakage current from the substrate to the substrate, the device can be manufactured using a single layer of polysilicon, as is clear from the embodiment shown in Fig. 1, and the manufacturing process can be simplified. It is possible to reduce the height difference and the height difference.

If the level difference can be reduced, it is expected that the subsequent formation of aluminum wiring will become easier.

[Brief explanation of the drawing]

FIG. 1 shows the readout and
A configuration diagram showing an example of a writing method, FIG. 2 is a cross-sectional view of an N-channel type MOS transistor, and FIG. 3 is a MOS transistor gate voltage-drain Tl12i! L
It is a characteristic diagram. 11...P-type silicon substrate, L3...Selection MOS
Transistor, 14...Memory MOS capacitor, 15...
・N° diffusion layer, 16... Oxide film, 17... Polysilicon electrode, 18a, 18b... N' diffusion layer, 19...
- Gate oxide film, 20... Gate electric bridge, 23... Aluminum wiring for data transfer, 25... Resistor, 26... Sense amplifier, El, E2. E3...Power supply. Figure 1 is a configuration diagram of an embodiment of the present invention.

Claims (1)

[Claims] (a) A storage MOS capacitor consisting of a highly concentrated diffusion layer formed in a semiconductor substrate, an oxide film on its surface, and an electrode thereon;
A MOS type semiconductor memory device including a selection MOS transistor whose one diffusion layer is integrated with the high concentration diffusion layer of the MOS capacitor, and a data transfer wiring connected to the other diffusion layer of the selection MOS transistor is prepared. (b) writing by applying a voltage between the electrode of the storage MOS capacitor and the high concentration diffusion layer, and injecting and capturing holes generated by band-to-band tunneling on the surface of the high concentration diffusion layer into the oxide film; , (c) Applying a voltage lower than the voltage during this writing between the electrode and the high concentration diffusion layer, and determining and reading out the leakage current value between the high concentration diffusion layer and the substrate, which is the interband tunnel current at this time. Readout of MOS type semiconductor memory device consisting of process
How to write.