JPH02170554A - Semiconductor device and its manufacturing method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a method for manufacturing the same, and particularly relates to a semiconductor device having an air bridge wiring structure and a method for manufacturing the same.

[Prior art]

In recent years, as semiconductor integrated circuits have become more highly integrated, electrical wiring has become more multilayered.

In order to improve the operating characteristics of the integrated circuit, a so-called air bridge wiring structure is adopted, which creates a gap between the upper layer electrical wiring and the lower layer electrical wiring to reduce the capacitance between the upper and lower layer electrical wiring. This is becoming more and more common. In such an air bridge wiring structure, since the upper layer electrical wiring section is an overhead wiring, it is easily broken by force from above during dicing or inspection. Therefore, in order to protect such weak upper layer electrical wiring, a protective film is formed to cover the upper layer electrical wiring.

[Problem to be solved by the invention]

FIG. 4 shows a cross section of the above conventional air bridge wiring structure in a direction perpendicular to the longitudinal direction of the upper layer electrical wiring.

As shown in FIG. 4(a), since the side surface 2 of the upper layer wiring 1 is parallel to the direction W perpendicular to the substrate surface, the protective film 3 is not attached to this side surface 2, and the upper layer wiring 1 is Unless it is completely buried in the protective film 3, it will not be sufficiently protected by the protective film 3 and will be susceptible to mechanical damage, resulting in poor manufacturing yield in processes such as dicing. Therefore, in order to embed the upper layer wiring 1 in the protective film 3, the thickness of the protective film must be increased, but if it is made too thick, the protective film will wrap around into the void below the upper layer wiring. The characteristics of the air bridge structure are impaired (see FIG. 4(b)). On the other hand, to prevent wraparound, the height of the gap can be made low, but if it is made too low, the lower part of the upper layer wiring will be too close to the lower board or wiring, which will impair the characteristics of the air bridge structure. . Therefore, with the conventional air bridge wiring structure, it is difficult to sufficiently protect the upper layer wiring.

Therefore, the present invention aims to solve the above problems and provide a semiconductor device having an air bridge wiring structure in which the characteristics of the air bridge structure are not impaired and the upper layer wiring can be sufficiently protected by a protective layer, and a method for manufacturing the same. purpose.

[Means to solve the problem]

In order to achieve the above object, a semiconductor device of the present invention is a semiconductor device having an air bridge wiring structure, and includes an electrical wiring section having a void at the bottom, and the height of the void section and the width of the electrical interconnection section are It is characterized by a ratio of 4 or more.

Furthermore, in the semiconductor device, the side surface of the electrical wiring section has an inclination angle of 30 degrees to 45 degrees with respect to a direction perpendicular to the upper surface of the substrate.

Furthermore, the semiconductor manufacturing method of the present invention is a method for manufacturing a semiconductor device having an air bridge wiring structure, and includes a layer forming step of forming a resist layer for the air bridge structure void part with a film thickness of X, and a layer forming step in the layer forming step. An upper wiring layer forming step of forming an electrical wiring layer to be an upper wiring layer on the formed resist layer, and patterning the electrical wiring layer formed in the upper wiring layer forming step so that its minimum width is 4X or more. After that, there is a wiring forming step in which the upper layer wiring is formed so that the side surface of the electrical wiring to be formed has an inclination angle of 30 to 45 degrees with respect to the direction perpendicular to the upper surface of the substrate, and a resist layer formed in the layer forming step is The method is characterized in that it includes a removing step and a step of forming a protective film having a thickness of X or more so as to cover the upper layer wiring formed in the wiring forming step.

[Effect]

In the semiconductor device of the present invention, configured as described above, in order to prevent the protective film from wrapping around the void, the minimum wiring width is set to be four times or more the height of the void, thereby preventing deterioration of the characteristics of the overhead wiring. are doing. Furthermore, the side surfaces of the upper layer wiring in the air bridge wiring structure are tilted at 30 to 45 degrees with respect to the direction perpendicular to the top surface of the substrate, making it possible to attach a protective film to the side surfaces, making it easier to protect the upper layer wiring with the protective film. .

〔Example〕

Embodiments according to the present invention will be described below with reference to the drawings.

Elements with the same reference numerals have the same functions, so duplicate explanations will be omitted.

FIG. 1 shows a transverse cross section of an upper layer interconnection of an embodiment of an air bridge interconnection structure of a semiconductor device according to the present invention.

In FIG. 1, the integrated circuit, lower wiring, etc. of the semiconductor device are not directly related to the present invention and can be used in a conventional semiconductor device having an air bridge structure, so a detailed explanation will be omitted. Therefore, FIG. 1 shows only the relationship between the upper layer wiring of the air bridge wiring structure and the substrate, and FIG. 1 shows a cross section of the upper layer wiring in a plane perpendicular to the longitudinal direction of the upper layer wiring. Only the cross section is shown. Therefore, things that should be visible on the rear side of the cross-section are omitted.

As shown in FIG. 1, in the air bridge structure of the semiconductor device of the present invention, a predetermined gap 1 is formed from the top surface of the semiconductor substrate 10.
Upper layer wiring 13 is provided via 2. This upper layer wiring 13 has a two-layer structure of titanium Φ gold, for example, and has one layer each.
00OA.

It is constructed with a thickness of 2000OA. A protective film 14 is formed on the upper layer wiring 13 and the semiconductor substrate 10, and the protective film 14a formed on the upper layer wiring 13 and the protective film 14b formed on the semiconductor substrate 10 are connected to each other. There is. This protective film 14 is, for example, a SiN film. Here, the cross-sectional shape of the upper layer wiring 13 is approximately trapezoidal as shown in FIG.
is θ(3
0'≦θ≦45"). If the angle of θ is outside of this range, for example, if it is less than 30", the upper layer wiring 13
A protective film is not deposited on the side surfaces 13a and 13b of the wiring, and if the wiring width is 45@ or more, the cross-sectional area of the upper layer wiring 13 becomes too small with the same wiring width, and the resistance value of the upper layer wiring becomes too high. Therefore, if the wiring width is increased, high integration cannot be achieved. Therefore, it is preferable to keep the angle within this range. Further, the thickness of the protective film 14 is set to be approximately the height X of the cavity 12 or more. With this configuration, the protective film 14 is also deposited on the side surfaces 13a and 13b of the upper layer wiring 13, and the deposited protective film 13c is a protective film formed on the lower semiconductor substrate 10. 14b to completely surround the upper layer wiring 13,
It will be protected.

Further, when the height of the cavity 12 is defined as X, the lower width Y of the upper layer wiring 12 is configured to be 4X or more. With this configuration, the protective film 14 is prevented from wrapping into the cavity 12 below the upper layer wiring 13 and filling the cavity 12, so that the characteristics of the air bridge wiring structure are not impaired. .

A method of manufacturing a semiconductor device having the air bridge wiring structure of the above embodiment will be described below with reference to FIGS. 2 and 3.

FIG. 2 shows an example of a process for manufacturing an upper layer wiring of a semiconductor device having an air bridge wiring structure according to the present invention.

As shown in FIG. 2, this manufacturing method includes a resist coating step 20, an upper wiring layer forming step 21, a second resist coating step 22, an upper wiring patterning step 23,
The process includes an etching process 24, a first resist removal process 25, and a protective film forming process 26.

Each of the above steps will be explained in detail below.

First, a resist coating step 20 is performed, and a resist layer 101 of 0.6
Formed with a thickness (X) of μm.

This resist layer is then formed into a predetermined pattern, leaving a portion that will become the void of the air bridge wiring structure. This state is shown in FIG. 3(a).

Next, an upper wiring layer forming step 21 is performed, and a metal layer 102 that will become an upper wiring layer is formed on the resist layer 101 formed in the above-mentioned first resist coating step 20. This metal layer 102
For example, titanium 1000A (metal layer 102a), gold 2
It has a two-layer structure composed of 0000A (metal layer 102b). This state is shown in FIG. 3(b).

Next, a second resist coating step 22 is performed, in which a photoresist 103 is coated on the upper wiring layer 102 formed previously,
Further, an upper layer wiring patterning step 23 is performed, and this photoresist 103 is patterned to form a photoresist mask 103a for forming upper layer wiring. This state is shown in FIG. 3(c).

Next, the semiconductor substrate 100 is tilted α (45@≦α≦60′) and etched by ion milling. The state of this etching is shown in FIG. 3(d). In this figure, the semiconductor substrate 100 is not tilted, but the ion irradiation direction of ion milling is tilted. Note that etching is performed by ion milling while rotating the semiconductor substrate 100 in this state. FIG. 3(e) shows the state in which etching has been completed. The width Y of the upper layer wiring 102C formed here is
It is necessary that the thickness is four times or more the thickness X of the resist layer 101 formed in the first resist coating step 20.

Next, a first resist removal step 25 is performed to completely remove the resist layer 101 formed in the first resist coating step 20. A possible method for this removal is to immerse the semiconductor substrate 100 in a solution such as acetone that dissolves the resist. FIG. 3(f) shows a state in which the resist layer 101 is removed in this resist removal step 25.

Next, a protective film forming step 26 is performed. In this protective film forming step 26, an SiN protective film 10 is formed by electron cyclotron resonance plasma chemical vapor deposition (ECR-P-CVD).
4 to a thickness of 0.6 μm. The thickness of this protective film 104 is approximately the same as the thickness of the resist layer 101 formed in the previous resist coating step 20, and can sufficiently cover the upper layer wiring 102a. The state of protective film formation in this step 26 is shown in FIGS. 3(g) and 3(h). As shown in these figures, a protective film 104 is also formed on the inclined side surface of the upper layer wiring 102a.

In this way, since the upper layer wiring 102a is completely surrounded by the protective film 104, the manufacturing yield in the post-process such as dicing the semiconductor substrate can be greatly increased.

〔Effect of the invention〕

In the semiconductor device of the present invention, as described above, the upper layer wiring is completely protected by the protective film, so it is resistant to mechanical damage from the outside.

Further, when manufacturing such a semiconductor device, the upper layer wiring is completely protected in post-processes such as dicing, so that a high manufacturing yield can be maintained.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of one embodiment of a semiconductor device having an air bridge wiring structure according to the present invention, FIG. 2 is a diagram showing the manufacturing process of the semiconductor device shown in FIG. 1, and FIG. A cross-sectional view showing the state of the semiconductor device at each step shown in the drawings and FIG. 4 is a cross-sectional view of a semiconductor device having a conventional air bridge wiring structure. 10.100... Semiconductor substrate, 14.104... Protective film, 13.1028... Upper layer wiring, 102°103
..., resist layer, 13a, 13b... inclined side surface. Patent Applicant: Sumitomo Electric Industries, Ltd. Representative Patent Attorney Yokoyoshi Hase
Fumi Terashima Rōkaicho 1st row 71 drawings Making process drawings Manual craftsmanship lower 1 or Su Island, (2/3) Fig. (2) To-work R-bo state (+/3) Fig. Sericulture work Uri-me Akira Su, (3/3) Figure (3)

Claims (1)

[Scope of Claims] 1. A semiconductor device having an air bridge wiring structure, which includes an electrical wiring section having a void below, and a ratio of the height of the void section to the width of the electrical interconnection section is 4 or more. Device. 2. The semiconductor device according to claim 1, wherein the side surface of the electrical wiring portion has an inclination angle of 30 degrees to 45 degrees with respect to a direction perpendicular to the upper surface of the substrate. 3. A method for manufacturing a semiconductor device having an air bridge wiring structure, including a layer forming step of forming a resist layer for the air bridge structure gap with a film thickness of X, and forming an upper layer wiring on the resist layer formed in the layer forming step. an upper wiring layer forming step for forming an electrical wiring layer as a layer, and patterning the electrical wiring layer formed in the upper wiring layer forming step so that its minimum width is 4X or more, and then forming the electrical wiring to be formed. a wiring forming step of forming the upper layer wiring so that the side surface thereof has an inclination angle of 30 to 45 degrees with respect to the direction perpendicular to the top surface of the substrate; a removing step of removing the resist layer formed in the layer forming step; and the wiring forming step. A method for manufacturing a semiconductor device including a step of forming a protective film having a thickness of X or more so as to cover an upper layer wiring formed in the step.