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JPH02133035A - Protective circuit for inverter - Google Patents

Protective circuit for inverter

Info

Publication number
JPH02133035A
JPH02133035A JP63283255A JP28325588A JPH02133035A JP H02133035 A JPH02133035 A JP H02133035A JP 63283255 A JP63283255 A JP 63283255A JP 28325588 A JP28325588 A JP 28325588A JP H02133035 A JPH02133035 A JP H02133035A
Authority
JP
Japan
Prior art keywords
circuit
inverter
phase
terminal
commercial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63283255A
Other languages
Japanese (ja)
Inventor
Shunichi Sakata
俊一 坂田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP63283255A priority Critical patent/JPH02133035A/en
Publication of JPH02133035A publication Critical patent/JPH02133035A/en
Pending legal-status Critical Current

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  • Protection Of Static Devices (AREA)
  • Inverter Devices (AREA)

Abstract

PURPOSE:To protect the damage of an inverter circuit by detecting and storing the input of a commercial three-phase AC power to the output terminal of an inverter device and preventing the operation of an inverter control circuit even when a starting signal is input to the control circuit. CONSTITUTION:When a commercial three-phase AC power is applied to the output terminal of an inverter device, the power circuit 8 of a control circuit 9 conducting ON-OFF control at a specified timing is operated, and the control circuit 9 is operated. Consequently, a voltage signal is stored in a storage cell 12 such as a flip-flop. The output signal of the storage circuit 12 is connected to the reset signal terminal of the control circuit 9, and the operation of the control circuit 9 can be prevented when the commercial three-phase AC power is applied to the output terminal of the inverter device, thus obviating the damage of the inverter circuit.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は,インバータ装置の保護回路に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a protection circuit for an inverter device.

〔従来の技術〕[Conventional technology]

第3図は従来のインバータ装置の主回路の構成図であり
.図において. +3)IIi商用3相交流電圧を整流
し,直流に整流するコンバータ回路。(4)は前記コン
バータ回路によって整流された直流電圧を平滑にする為
の電解コンデンサ。(5)は前記電解コンデンサに流入
する突入電流によって前記コンバータ回路が破損するこ
とを防ぐ為の抵抗。+1)は前記突入電流制限抵抗を時
限後に短絡する為の電磁接触器。(7)は直流電圧から
複数のスイッチング手段を所定のタイミングでオン・オ
フ制御する事によって,所定電圧,所定周波数の交流電
圧に交換する為に複数のトランジスタによって構成され
るインバータ回路。(9)は前記インバータ回路を制御
する為の制御回路。(8)は前記直流電圧を入力するこ
とによシ所定の電圧を出力し,前記制御回路に電源を供
給する電源回路,(6)は前記インバータ回路の出力側
U,V,Wに商用3相交流電源が印加された時に前記電
解コンデンサ(4)に流れる突入電流によって(7)の
インバータ回路を破損する事を防ぐ突入電流制限抵抗。
Figure 3 is a block diagram of the main circuit of a conventional inverter device. In the figure. +3) IIi A converter circuit that rectifies commercial three-phase AC voltage and converts it into DC. (4) is an electrolytic capacitor for smoothing the DC voltage rectified by the converter circuit. (5) is a resistor for preventing the converter circuit from being damaged by rush current flowing into the electrolytic capacitor. +1) is an electromagnetic contactor for short-circuiting the inrush current limiting resistor after a time limit. (7) is an inverter circuit composed of a plurality of transistors for converting a DC voltage into an AC voltage of a predetermined voltage and a predetermined frequency by controlling on/off of a plurality of switching means at predetermined timings. (9) is a control circuit for controlling the inverter circuit. (8) is a power supply circuit that outputs a predetermined voltage by inputting the DC voltage and supplies power to the control circuit; (6) is a power supply circuit that supplies power to the output sides U, V, and W of the inverter circuit; An inrush current limiting resistor that prevents the inverter circuit (7) from being damaged by the inrush current flowing through the electrolytic capacitor (4) when a phase alternating current power source is applied.

(2)は前記コンバータ回路(3)の入力側に商用3相
交流電源印加された時に(2a)の接点を吸引し前記突
入電流制限抵抗(6》を短絡する電磁接触器である。
(2) is an electromagnetic contactor that attracts the contact point (2a) and short-circuits the inrush current limiting resistor (6) when a commercial three-phase AC power source is applied to the input side of the converter circuit (3).

次に本回路の動作について説明する。Next, the operation of this circuit will be explained.

まず,正常な状態で商用3相交流電源が.RS,TMC
[続サレた時. [磁接触器(1) . +21 75
Z 動hするまでの時間,コンバータ回路(3)によっ
て変換された直流電流は,突入電流制限抵抗(4)を介
して電解コンデンサ(5)を充電する。時限後電磁接触
器(1)が動作し突入電流制限抵抗(5)の両端に並列
に接続されている接点(1a)が吸引し,突入電流制限
抵抗{5}を短絡する。同様に電磁接触器(2)が動作
し突入電流制限抵抗(6)の両端に並列に接続されてい
る接点(2a)が吸引し突入電流制限抵抗(6)を短絡
させる。また.前記電解コンデンサ(4)によって平滑
された直流電圧は.電源回路(8)によって所定の電圧
に変換され,制御回路(9)を動作させ.前記制御回路
(9)の信号により.インバータ回路(7)の複数のト
ランジスタをオン・オフさせる事によって出力端子U,
 V.Wより前記直流電圧を所定の電圧と周波数の交流
電圧を出力し,インバータ装置は正常に動作する。
First, under normal conditions, the commercial 3-phase AC power supply is connected. RS, TMC
[When the sequel was sold.] [Magnetic contactor (1). +21 75
During the time period until Z starts moving, the DC current converted by the converter circuit (3) charges the electrolytic capacitor (5) via the inrush current limiting resistor (4). After the time limit, the electromagnetic contactor (1) operates and the contacts (1a) connected in parallel to both ends of the inrush current limiting resistor (5) are attracted, shorting the inrush current limiting resistor {5}. Similarly, the electromagnetic contactor (2) operates, and the contacts (2a) connected in parallel to both ends of the inrush current limiting resistor (6) attract and short-circuit the inrush current limiting resistor (6). Also. The DC voltage smoothed by the electrolytic capacitor (4) is . It is converted to a predetermined voltage by the power supply circuit (8) and operates the control circuit (9). By the signal of the control circuit (9). By turning on and off multiple transistors of the inverter circuit (7), the output terminal U,
V. W outputs the DC voltage as an AC voltage of a predetermined voltage and frequency, and the inverter device operates normally.

次にインバータ装置の出力端子U,V.Wに商用3相交
流電源が印加された場合について説明する。
Next, the output terminals U and V of the inverter device. A case where a commercial three-phase AC power source is applied to W will be explained.

1例として第2図に示すように.インバータ回路(7)
に含まれるダイオード(DUP)および突入電流制限抵
抗(6)を介してインバータ回路(7)に含まれるダイ
オード(DUP−DWN)によって変換された直流電流
が平滑コンデンサ(4)に充電される為インバータ回路
(7》が破損されることはない。
As an example, as shown in Figure 2. Inverter circuit (7)
The DC current converted by the diode (DUP-DWN) included in the inverter circuit (7) is charged to the smoothing capacitor (4) through the diode (DUP) included in the inverter circuit (DUP) and the inrush current limiting resistor (6). The circuit (7) will not be damaged.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のインバータ装置は以上のように構成されているの
で,インバータ装置はそれ自身の制御電源をインバータ
回路の前記電解コンデンサの出力による直流電圧から所
定の電圧を作シ出している為に.前述のようにインバー
タ装置の出力端子U.V,Wに接続された場合に.前述
のようにインパータ回路《7》は破損しないが.電解コ
ンデンサ(4)が正常に充電される為に電源回路(8)
は正常に動作し.制御回路(9)に電源を供給する。そ
の為制御回路(7)に起動信号が入力された場合インバ
ータ回路(7)のトランジスタが導通状態となる為.商
用3相電源がインバータ回路(7)の内部で短絡し.こ
の結果インバータ回路が破損し電源トリップを発生させ
る欠点があった。
Since the conventional inverter device is configured as described above, the inverter device generates a predetermined voltage as its own control power source from the DC voltage generated by the output of the electrolytic capacitor of the inverter circuit. As mentioned above, the output terminal U. of the inverter device. When connected to V and W. As mentioned above, the inverter circuit 《7》 is not damaged. In order for the electrolytic capacitor (4) to be charged normally, the power supply circuit (8)
is working properly. Power is supplied to the control circuit (9). Therefore, when a start signal is input to the control circuit (7), the transistors of the inverter circuit (7) become conductive. The commercial three-phase power supply was short-circuited inside the inverter circuit (7). As a result, the inverter circuit is damaged and a power supply trip occurs.

この発明は.上記のような問題点を解消する為になされ
たもので,インバータ装置の出力端子U.V,Wに商用
3相交流電源が入力されかつ前述のインバータ制御回路
に起動信号が入力されてもインバータ回路内で商用3相
交流電源が短絡し,インバータ回路が破損する事を保護
できるインバータ保獲装置を提供することを目的とする
This invention... This was done to solve the above problems, and the output terminal U of the inverter device. Even if a commercial three-phase AC power supply is input to V and W and a start signal is input to the inverter control circuit described above, the inverter protection system protects the inverter circuit from being short-circuited and damaged. The purpose is to provide a fishing device.

〔課題を解決するだめの手段〕[Failure to solve the problem]

この発明に係るインバータ保護装置は.インバータ装置
の出力端子U,V,Wに商用3相交流電源を印加した時
.また同時にインバータ制御回路に起動信号が入力され
た時.インバータ装置の出力端子Uy,W に商用3相
交流電源が入力された事を検出し記憶する記憶手段と.
記憶手段が記憶されている場合において.制御回路に起
動信号が入力されても,複数のスイッチング手段を所定
のタイミングでオン・オフ制御するインバータ制御回路
を動作させない動作禁止手段を備えているものである。
The inverter protection device according to this invention is. When a commercial three-phase AC power source is applied to the output terminals U, V, and W of the inverter device. Also, when a start signal is input to the inverter control circuit at the same time. A storage means for detecting and storing the fact that a commercial three-phase AC power supply is input to the output terminals Uy and W of the inverter device.
In the case where the storage means is stored. The inverter control circuit is provided with an operation inhibiting means that does not operate the inverter control circuit that controls on/off of a plurality of switching means at predetermined timings even if a start signal is input to the control circuit.

〔作用〕[Effect]

この発明における.インバータ装置の出力端子U,V,
Wに商用3相交流電源が入力された場合,誤配を検出し
.さらに複数のスイッチング手段を所定のタイミングで
オン・オフ制御するイン/( −夕制御回路に起動信号
が入力されても,インバータ回路が動作し.インパータ
回路内で商用3相交流電源が短絡しインバータ回路を破
損することを防止する。
In this invention. Inverter device output terminals U, V,
If a commercial 3-phase AC power supply is input to W, an incorrect connection will be detected. Furthermore, the inverter circuit operates even if a start signal is input to the inverter control circuit, which controls on/off multiple switching means at predetermined timings. Prevent damage to the circuit.

〔実施例〕〔Example〕

以下.この発明の一実施例を図について説明する。第1
図において11はインバータ装置の出力側ty,v.w
端子に商用3相交流電圧が入力された場合突入電流制限
抵抗(6)に電流が流れた事を検知する光絶縁素子, 
(111は光絶縁素子に流れる電流を制限する抵抗, 
112は前記光絶縁素子よりインノく一タ装置の出力側
U.v.W端子に商用3相交流電圧が入力された時点の
信号を一時的に記憶するフリツプフロツプ等の記憶回路
である。他の構成は第5図に示す従来回路図と同様な構
成・よりなされている。
below. An embodiment of the present invention will be described with reference to the drawings. 1st
In the figure, 11 is the output side ty, v. of the inverter device. lol
An optical isolation element that detects current flowing through the inrush current limiting resistor (6) when a commercial three-phase AC voltage is input to the terminal.
(111 is a resistor that limits the current flowing to the optical insulation element,
112 is the output side U. v. This is a storage circuit such as a flip-flop that temporarily stores a signal at the time when a commercial three-phase AC voltage is input to the W terminal. The other configurations are similar to the conventional circuit diagram shown in FIG.

次に動作について説明を行う。Next, the operation will be explained.

まず,正常な状態で商用3相交流電源がコンバータ回路
(3)の入力側R, S, T端子に印加された場合は
,従来の動作と同様な動作を行う。
First, when a commercial three-phase AC power source is applied to the R, S, and T terminals on the input side of the converter circuit (3) under normal conditions, the converter performs the same operation as the conventional one.

次に.インバータ装置の出力端子U.V, Wに商用3
相交流電源が印加された場合.第1図においてインパー
タ回路(7)に含まれているダイオード(DUP), 
 突入電流制限抵抗《6》.電解コンデンサC4).イ
ンバータ回路(7)に含まれるダイオード(DVN) 
 を介して電流が流れ電解コンデンサ(4)に直流電圧
が充電されることによって複数のスイッチング手段を所
定のタイミングでオン・オフ制御する制御回路(9)の
電源回路(8)が動作し.前記制御回路が動作する。そ
れらと同時に突入電流制限抵抗(6)の両端に電圧が発
生し.この発生電圧によって光絶縁素子αGに抵抗Uを
介して電流が流れ.この結果.光絶縁素子αGの2次側
に電圧信号を得ることが可能になる。前記光絶縁素子+
Il1の2次側に出力された電圧信号は,フリツプフロ
ツプ等の記憶素子a3に記憶される。前記記憶回路α2
の出力信号は,複数のスイッチング手段を所定のタイミ
ングでオン・オフ制御する制御回路(9)のリセット信
号端子に接続されており.インバータ装置の出力端子U
.v.Wに商用3相交流電源が印加された時点において
.前記の制御回路(9)が動作を防止することが可能と
な9.インバータ回路の破損を防止することが可能とな
る。前述の脱明け,DUPとDVNを用い説明を行った
が.インバータ回路(7)に含まれるダイオード(DU
P−DWN)の6個の内同1アーム以外のダイオード全
ての組み合わせにおいて.上説の保護機能は達成できる
next. Output terminal U of the inverter device. Commercial 3 for V and W
When phase AC power is applied. In Fig. 1, the diode (DUP) included in the inverter circuit (7),
Inrush current limiting resistance《6》. Electrolytic capacitor C4). Diode (DVN) included in the inverter circuit (7)
When a current flows through the electrolytic capacitor (4) and the DC voltage is charged, the power supply circuit (8) of the control circuit (9) which controls on/off the plurality of switching means at a predetermined timing is operated. The control circuit operates. At the same time, a voltage is generated across the inrush current limiting resistor (6). This generated voltage causes a current to flow through the photoinsulating element αG via the resistor U. As a result. It becomes possible to obtain a voltage signal on the secondary side of the optical insulation element αG. The optical insulation element +
The voltage signal output to the secondary side of Il1 is stored in a storage element a3 such as a flip-flop. The memory circuit α2
The output signal is connected to a reset signal terminal of a control circuit (9) that controls on/off of a plurality of switching means at predetermined timings. Output terminal U of inverter device
.. v. At the time when commercial three-phase AC power is applied to W. 9. The control circuit (9) can prevent the operation. It becomes possible to prevent damage to the inverter circuit. I explained the above-mentioned escape using DUP and DVN. Diode (DU) included in the inverter circuit (7)
P-DWN) for all combinations of diodes except for one arm among the six. The protection function described above can be achieved.

第1図において, (l[lの光絶縁素子は.パルスト
ランスで代用することも可能である。
In FIG. 1, the optical insulation element of (l [l) can be replaced with a pulse transformer.

〔発明の効果〕〔Effect of the invention〕

以上のように,この発明によれば.インバータ装置の出
力端子U.v.Wに商用3相交流電源を入力しても,誤
配線を検出し.インパータ制御回路が動作して.インバ
ータ回路内で短絡し.インバータ回路の破損を防止する
効果がある。
As described above, according to this invention. Output terminal U of the inverter device. v. Even if a commercial 3-phase AC power source is input to W, incorrect wiring is detected. The inverter control circuit is operating. Short circuit in the inverter circuit. This has the effect of preventing damage to the inverter circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は,本発明に係るインバータの保護回路を用いた
インパータ装置のブロック図.第2図は従来インバータ
装置で出力端子U,V,Wより商用3相交流電源を印加
した時の電流の流れを示した図.第3図は従来のインバ
ータ装置のブロック図である。 図において(1)と(2)は電磁接触器,(3)はコン
バータ回路,(4)は電解コンデンサ.(5)と(6)
は突入電流制限抵抗.(7)はインバータ回路.(8)
は電源回路,(9)は制御回路.αGは光絶縁素子.a
υは抵抗.α2は記憶回路である。 なお,各図中同一符号は同一又は相当部分を示すもので
ある。
FIG. 1 is a block diagram of an inverter device using an inverter protection circuit according to the present invention. Figure 2 shows the current flow when a commercial three-phase AC power source is applied from the output terminals U, V, and W in a conventional inverter. FIG. 3 is a block diagram of a conventional inverter device. In the figure, (1) and (2) are electromagnetic contactors, (3) is a converter circuit, and (4) is an electrolytic capacitor. (5) and (6)
is the inrush current limiting resistance. (7) is an inverter circuit. (8)
is the power supply circuit, and (9) is the control circuit. αG is a photo-insulating element. a
υ is resistance. α2 is a memory circuit. Note that the same reference numerals in each figure indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims]  商用3相交流電源を直流に変換するコンバータ回路と
、前記コンバータ回路の出力である直流電圧を平滑する
電解コンデンサと、前記直流電圧を複数のスイッチング
手段を所定のタイミングでオン・オフ制御することによ
り、直流電圧を所定周波数の交流電圧に変換する為の複
数のトランジスタから構成されるインバータ回路からな
るインバータ装置において、前記電解コンデンサの正極
端子と前記インバータ回路の正極端子の間に第1の抵抗
を挿入し、さらに第1の抵抗の両端に前記コンバータ回
路に3相交流電源が印加されたと同時に吸引する電磁接
触器の接点が並列に挿入され、さらに前記インバータ回
路の正極に第2の抵抗の一方の端子が接続され第2の抵
抗のもう一方の端子にフォトカプラのアノード端子が接
続され、前記フォトカプラのカソード端子が前記平滑コ
ンデンサの正極に接続され、前記フォトカプラの出力信
号を記憶する記憶回路に接続され、さらにこの記憶回路
の出力信号がインバータ装置のリセット信号回路に接続
される回路構成から成り、前記インバータ装置の前記イ
ンバータ回路の出力端子に商用3相交流電源が印加され
た時点で、前記インバータ回路の破損から保護し、前記
フォトカプラの出力された信号により、前記インバータ
装置の出力端子に商用3相電源が印加された事を記憶で
き、前記インバータ装置を破損から保護することを特徴
とするインバータ回路。
A converter circuit that converts a commercial three-phase AC power supply into DC, an electrolytic capacitor that smoothes the DC voltage output from the converter circuit, and a plurality of switching means for controlling the DC voltage on and off at predetermined timing. , in an inverter device comprising an inverter circuit composed of a plurality of transistors for converting a DC voltage into an AC voltage of a predetermined frequency, a first resistor is provided between the positive terminal of the electrolytic capacitor and the positive terminal of the inverter circuit. contacts of an electromagnetic contactor are inserted in parallel to both ends of the first resistor to attract the same moment when three-phase AC power is applied to the converter circuit, and one of the second resistors is further inserted to the positive terminal of the inverter circuit. a terminal of the second resistor is connected, an anode terminal of a photocoupler is connected to the other terminal of the second resistor, a cathode terminal of the photocoupler is connected to a positive electrode of the smoothing capacitor, and a memory stores an output signal of the photocoupler. circuit, and the output signal of this memory circuit is further connected to a reset signal circuit of an inverter device, and when a commercial three-phase AC power source is applied to the output terminal of the inverter circuit of the inverter device, , the inverter circuit is protected from damage, and the signal output from the photocoupler is used to remember that a commercial three-phase power supply is applied to the output terminal of the inverter device, thereby protecting the inverter device from damage. Characteristic inverter circuit.
JP63283255A 1988-11-09 1988-11-09 Protective circuit for inverter Pending JPH02133035A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63283255A JPH02133035A (en) 1988-11-09 1988-11-09 Protective circuit for inverter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63283255A JPH02133035A (en) 1988-11-09 1988-11-09 Protective circuit for inverter

Publications (1)

Publication Number Publication Date
JPH02133035A true JPH02133035A (en) 1990-05-22

Family

ID=17663086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63283255A Pending JPH02133035A (en) 1988-11-09 1988-11-09 Protective circuit for inverter

Country Status (1)

Country Link
JP (1) JPH02133035A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006352960A (en) * 2005-06-14 2006-12-28 Fuji Electric Holdings Co Ltd Method of detecting abnormality of ac-ac converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006352960A (en) * 2005-06-14 2006-12-28 Fuji Electric Holdings Co Ltd Method of detecting abnormality of ac-ac converter

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