JPH02122555A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02122555A JPH02122555A JP63277029A JP27702988A JPH02122555A JP H02122555 A JPH02122555 A JP H02122555A JP 63277029 A JP63277029 A JP 63277029A JP 27702988 A JP27702988 A JP 27702988A JP H02122555 A JPH02122555 A JP H02122555A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lead frame
- substrate
- masking
- exposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000011347 resin Substances 0.000 claims abstract description 46
- 229920005989 resin Polymers 0.000 claims abstract description 46
- 230000000873 masking effect Effects 0.000 claims abstract description 23
- 239000003566 sealing material Substances 0.000 claims abstract description 5
- 238000007789 sealing Methods 0.000 claims description 12
- 239000000758 substrate Substances 0.000 abstract description 15
- 238000000034 method Methods 0.000 abstract description 7
- 238000002347 injection Methods 0.000 abstract description 2
- 239000007924 injection Substances 0.000 abstract description 2
- 238000000465 moulding Methods 0.000 description 4
- 238000001816 cooling Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000012260 resinous material Substances 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、封止材料からリードフレームの一部が露出し
たタイプの半導体装置を製造する方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device of a type in which a portion of a lead frame is exposed from a sealing material.
半導体装置は、はぼ四角形のパッケージの四辺からリー
ドが導出されたＱＵＡＤタイプ、二辺からリードが導出
されたＤＩＰタイプ、−辺からリードが導出されたＳＩ
Ｐタイプの三種類に大別することかできる。Semiconductor devices are of the QUAD type, in which leads are derived from the four sides of a rectangular package, the DIP type, in which leads are derived from two sides, and the SI type, in which leads are derived from the - side.
It can be roughly divided into three types: P type.
これら半導体装置は、特にＳＩＰタイプのパワートラン
ジスタにみられるように、放熱効果を向上させるために
、半導体素子を搭載した裏面側を封止材料から露出させ
ている。この露出部をもつ半導体装置をモールド金型に
よって樹脂封止する場合、モールド金型のキャビティ内
において、封止材料がリードフレームの露出されるべき
面側に回り込んで、リードフレームの表面上に薄い樹脂
パリが形成され易い。この樹脂パリは、半導体装置を機
器に組み込んだときに冷却体との接触状態を不良にし、
半導体素子で発生した熱を系外に放出させる放熱経路を
形成することを困難にする。In these semiconductor devices, the back side on which the semiconductor element is mounted is exposed from the sealing material in order to improve the heat dissipation effect, especially as seen in SIP type power transistors. When a semiconductor device having an exposed portion is encapsulated with a resin using a mold, the encapsulating material wraps around the surface of the lead frame to be exposed in the cavity of the mold, and is coated on the surface of the lead frame. Thin resin flakes are likely to form. This resinous material causes poor contact with the cooling body when the semiconductor device is incorporated into equipment.
This makes it difficult to form a heat dissipation path for dissipating heat generated in the semiconductor element to the outside of the system.
従来の生産ラインでは、樹脂封止の際に発生した樹脂パ
リは、たとえばウォータジェット等の設備を使用した後
工程において、リードフレームの露出されるべき表面部
分から除去されている。しかし、この除去作業は、専用
の設備を必要とし、生産性を低下させる。その結果、製
品の価格を上昇させることになる。In conventional production lines, resin particles generated during resin sealing are removed from the exposed surface portion of the lead frame in a post-process using equipment such as a water jet. However, this removal work requires specialized equipment and reduces productivity. As a result, the price of the product will increase.
そこで、樹脂パリ自体の発生を防止するため、リードフ
レームの露出されるべき面側の端部に凹部を設け、回り
込んできた樹脂をこの凹部内に溜め、リードフレーム全
面に樹脂が広がることを抑える方法が採用されている。Therefore, in order to prevent the resin from forming itself, a recess is provided at the end of the lead frame on the side that should be exposed, and the resin that has come around is collected in this recess to prevent the resin from spreading over the entire surface of the lead frame. Methods are being used to suppress it.
また、本出願人も、特願昭６２−２７５０８９号におい
て、樹脂が回り込む侵入路を完全に無くすため、モール
ド金型のキャビティ底面に開口部を設け、この開口部内
を負圧にすることによって、リードフレームを吸着する
方法を提案している。The present applicant also proposed in Japanese Patent Application No. 62-275089 that by providing an opening at the bottom of the cavity of the mold and creating a negative pressure inside this opening, in order to completely eliminate the intrusion path through which the resin could enter. We are proposing a method for adsorbing lead frames.
しかし、露出されるべき面側の端部に凹部を設けたリー
ドフレームを使用して樹脂封止を行った場合、リードフ
レームの裏面に樹脂が付着して樹脂パリが発生すること
を完全に防止することができない。However, when resin sealing is performed using a lead frame with a recess on the end of the side that should be exposed, it is completely possible to prevent resin from adhering to the back side of the lead frame and causing resin flakes. Can not do it.
他方、前述の特願昭６２−２７５０８９号で提案した方
法では、キャビティ底面にリードフレームが密着してい
るので、その間に樹脂が侵入することがない。しかし、
これはリードフレームの正確な位置決めを前提としてお
り、位置決め不良が発生した場合には、負圧となった開
口部内に樹脂が吸引され、樹脂パリを生じさせる。また
、キャビティ底面に開口部を設けた特別なモールド金型
が必要となる。On the other hand, in the method proposed in the above-mentioned Japanese Patent Application No. 62-275089, since the lead frame is in close contact with the bottom surface of the cavity, resin does not enter between them. but,
This is based on the premise of accurate positioning of the lead frame, and if a positioning error occurs, resin is sucked into the opening where negative pressure is created, causing resin breakage. Additionally, a special mold with an opening at the bottom of the cavity is required.
そこで、本発明は、リードフレームの露出されるべき表
面部分に予めマスキングを行った後で樹脂封止すること
により、従来のモールド金型を使用して樹脂パリの発生
を確実に防止し、良好な状態でリードフレームの表面が
露出している半導体装置を製造することを目的とする。Therefore, the present invention reliably prevents the occurrence of resin flash using a conventional molding die by masking the exposed surface portion of the lead frame in advance and then sealing it with resin. The purpose of the present invention is to manufacture a semiconductor device in which the surface of a lead frame is exposed in a state where the surface of the lead frame is exposed.
本発明は、その目的を達成するために、半導体チップを
搭載したリードフレームの片面側の少なくとも一部を封
止材料から露出させた状態に樹脂封止した半導体装置を
製造する際、前記リードフレームの露出させるべき面の
所定領域にマスキングを行った後、樹脂封止を行い、そ
の後前記マスキングを剥離することを特徴とする。In order to achieve the object, the present invention provides a method for manufacturing a semiconductor device in which a lead frame on which a semiconductor chip is mounted is sealed with a resin with at least a part of one side thereof exposed from the sealing material. The method is characterized in that after masking a predetermined region of the surface to be exposed, resin sealing is performed, and then the masking is peeled off.
以下、図面を参照しながら、実施例により本発明の特徴
を具体的に説明する。Hereinafter, the features of the present invention will be specifically explained using examples with reference to the drawings.
樹脂封止されるリードフレーム１は、第２図に示すよう
にスタンピング、エツチング等によって所定の形状に成
形される。そして、リードフレーム１の基板部２に半導
体素子３を搭載して、半導体素子３とリード４との間を
ボンディングワイヤ５で接続する。The lead frame 1 to be sealed with resin is molded into a predetermined shape by stamping, etching, etc., as shown in FIG. Then, the semiconductor element 3 is mounted on the substrate part 2 of the lead frame 1, and the semiconductor element 3 and the leads 4 are connected with bonding wires 5.
半導体素子３が搭載された基板部２の裏面に、マスキン
グを施す。このマスキングには、モールド時の発熱によ
っても収縮１寸法変化、自然剥離等を起こすことがない
材料が使用される。また、樹脂封止後の剥離性が良好で
あれば、充分にその機能を果たすことができる。たとえ
ば、リード数の多いリードフレームのインナーリード固
定用として通常用いられているポリイミド製のテープを
使用することが好ましい。Masking is applied to the back surface of the substrate section 2 on which the semiconductor element 3 is mounted. For this masking, a material is used that does not undergo contraction, dimensional change, natural peeling, etc. even when heat is generated during molding. Moreover, if the peelability after resin sealing is good, the function can be fully fulfilled. For example, it is preferable to use a polyimide tape that is commonly used for fixing inner leads of lead frames with a large number of leads.
マスキングされたリードフレーム１は、次いで第１図に
示すように、上型６及び下型７からなるモールド金型の
キャビティに収容される。このとき、基板部２に貼り付
けられているマスキングテープ８がキャビティ底面９に
密着するように、リードフレーム１をモールド金型内に
配置する。また、基板部２に設けた孔部にガイドビン１
３を挿入し、リードフレーム１の位置を固定する。そし
て、ランナ一部１０から注入口１１を経て樹脂を注入し
、基板部２．半導体素子３．リード４先端部及びボンデ
ィングワイヤ５を一体的に樹脂封止する。モールディン
グが終了した後、樹脂封止された半導体装置は、エジェ
クタービン１２によってモールド金型から取り出される
。The masked lead frame 1 is then housed in a cavity of a mold consisting of an upper mold 6 and a lower mold 7, as shown in FIG. At this time, the lead frame 1 is placed in the mold so that the masking tape 8 affixed to the substrate portion 2 is in close contact with the bottom surface 9 of the cavity. In addition, the guide bin 1 is inserted into the hole provided in the base plate 2.
3 and fix the position of lead frame 1. Then, resin is injected from the runner part 10 through the injection port 11, and the resin is injected into the substrate part 2. Semiconductor element 3. The tips of the leads 4 and the bonding wires 5 are integrally sealed with resin. After the molding is completed, the resin-sealed semiconductor device is ejected from the mold by the ejector turbine 12.
モールド金型から取り出された半導体装置は、第３図に
示すように基板部２の裏面にマスキングテープ８が貼着
されている。このマスキングテープ８は、モールディン
グ時にキャビティ底面９に密着しているため、基板部２
の裏面にモールド樹脂が回り込むことが抑えられ、樹脂
パリの発生なく樹脂封止が行われる。なお、マスキング
テープ８の両端部に、封止樹脂１４が若干回り込んで樹
脂バリ１５となる場合がある。しかし、この部分の樹脂
８１月５は、基板部２からマスキングテープ８を剥離す
るとき、マスキングテープ８と共に除去される。その結
果、基板部２裏面は、樹脂パリ１５のない平坦な金属表
面となる。The semiconductor device taken out from the mold has a masking tape 8 attached to the back surface of the substrate section 2, as shown in FIG. Since this masking tape 8 is in close contact with the cavity bottom surface 9 during molding, the substrate portion 2
This prevents the mold resin from going around to the back surface of the mold, and resin sealing is performed without causing resin flakes. Note that the sealing resin 14 may slightly wrap around both ends of the masking tape 8 to form resin burrs 15 . However, this portion of the resin 81 5 is removed together with the masking tape 8 when the masking tape 8 is peeled off from the substrate portion 2 . As a result, the back surface of the substrate portion 2 becomes a flat metal surface without resin pads 15.
このようにして製造された半導体装置を電子機器に組み
込むとき、基板部２裏面と冷却体との接触状態が良好と
なる。そのため、半導体素子３で発生した熱は基板部２
を介して冷却体に効率良く伝わり、半導体素子３の昇温
か防止され、信頼性の高い半導体装置となる。When the semiconductor device manufactured in this way is incorporated into an electronic device, the contact state between the back surface of the substrate portion 2 and the cooling body is good. Therefore, the heat generated in the semiconductor element 3 is transferred to the substrate portion 2.
The heat is efficiently transmitted to the cooling body through the heat sink, preventing the temperature of the semiconductor element 3 from rising, resulting in a highly reliable semiconductor device.
以上に説明したように、本発明においては、樹脂封止を
必要としない部分にマスキングを行った状態で樹脂封止
をしている。そのため、樹脂パリは、マスキング材料の
表面にのみ発生し、樹脂封止後にマスキングを剥離する
とき、マスキングと共にリードフレーム表面部から除去
される。このようにして、極めて良好なリードフレーム
表面が露出され、ウォータジェット等の樹脂パリ除去作
業を省略することができる。また、モールド金型も従来
の金型をそのまま使用することができるため、特別な設
備負担もない。As explained above, in the present invention, resin sealing is performed after masking the parts that do not require resin sealing. Therefore, resin particles are generated only on the surface of the masking material, and when the masking is peeled off after resin sealing, it is removed from the surface of the lead frame along with the masking. In this way, a very good lead frame surface is exposed, and resin debris removal work such as water jetting can be omitted. Further, since the conventional mold can be used as is, there is no need for special equipment.
第１図はマスキングテープを貼り付けたリードフレーム
を樹脂封止している状態を示し、第２図は半導体素子を
搭載したリードフレームを示し、第３図は樹脂封止後の
半導体装置を示す。
１：リードフレーム ２：基板部
３：半導体素子 ４：リード
５：ボンディングワイヤ ６：モールド金型の上型７：
モールド金型の下型 ８：マスキングテーブ９：キャピ
テイ底面 ｌＯ：ランナ一部１１：注入口
１２：エジェクタービン１３ニガイドピン
１４：封止樹脂１５：樹脂パリ
特許出願人 株式会社三井ハイチック代 理
人 小 堀 益 （ほか２名）第
■
図
第
図Figure 1 shows a lead frame with masking tape attached and sealed with resin, Figure 2 shows a lead frame with a semiconductor element mounted on it, and Figure 3 shows a semiconductor device after being sealed with resin. . 1: Lead frame 2: Substrate part 3: Semiconductor element 4: Lead 5: Bonding wire 6: Upper die 7 of mold die:
Lower mold of mold 8: Masking table 9: Capite bottom 1O: Part of runner 11: Inlet
12: Eject turbine 13 guide pin
14: Sealing resin 15: Resin Paris Patent applicant Mitsui Hytic Co., Ltd. Representative
Masu Kobori (and 2 others) Figure ■ Figure
Claims (1)
少なくとも一部を封止材料から露出させた状態に樹脂封
止した半導体装置を製造する際、前記リードフレームの
露出させるべき面の所定領域にマスキングを行った後、
樹脂封止を行い、その後前記マスキングを剥離すること
を特徴とする半導体装置の製造方法。1. When manufacturing a semiconductor device that is resin-sealed with at least a portion of one side of a lead frame carrying a semiconductor chip exposed from the sealing material, masking a predetermined area of the surface of the lead frame that is to be exposed. After doing
A method of manufacturing a semiconductor device, comprising performing resin sealing and then peeling off the masking.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63277029A JPH02122555A (en) | 1988-10-31 | 1988-10-31 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63277029A JPH02122555A (en) | 1988-10-31 | 1988-10-31 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02122555A true JPH02122555A (en) | 1990-05-10 |
Family
ID=17577782
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63277029A Pending JPH02122555A (en) | 1988-10-31 | 1988-10-31 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02122555A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0646955A2 (en) * | 1993-09-30 | 1995-04-05 | Siemens Aktiengesellschaft | Apparatus for encapsulating a semiconductor element mounted on a heat sink with plastic |
| WO1998035382A1 (en) * | 1997-02-10 | 1998-08-13 | Matsushita Electronics Corporation | Resin sealed semiconductor device and method for manufacturing the same |
| US6126885A (en) * | 1997-06-27 | 2000-10-03 | Matsushita Electronics Corporation | Method for manufacturing resin-molded semiconductor device |
| US6648928B2 (en) * | 1998-04-03 | 2003-11-18 | Medtronic, Inc. | Method of making an implantable medical device having a flat electrolytic capacitor with miniaturized epoxy connector droplet |
| JP2009021630A (en) * | 2008-09-24 | 2009-01-29 | Sanyo Electric Co Ltd | Method of manufacturing semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5694636A (en) * | 1979-12-27 | 1981-07-31 | Hitachi Ltd | Manufacture of semiconductor device sealed by resin |
| JPS60180129A (en) * | 1984-02-27 | 1985-09-13 | Tetsuya Hojo | Manufacture of semiconductor package |
-
1988
- 1988-10-31 JP JP63277029A patent/JPH02122555A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5694636A (en) * | 1979-12-27 | 1981-07-31 | Hitachi Ltd | Manufacture of semiconductor device sealed by resin |
| JPS60180129A (en) * | 1984-02-27 | 1985-09-13 | Tetsuya Hojo | Manufacture of semiconductor package |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0646955A2 (en) * | 1993-09-30 | 1995-04-05 | Siemens Aktiengesellschaft | Apparatus for encapsulating a semiconductor element mounted on a heat sink with plastic |
| EP0646955A3 (en) * | 1993-09-30 | 1996-03-13 | Siemens Ag | Device for wrapping with plastics a semiconductor element fixed on a heat sink. |
| WO1998035382A1 (en) * | 1997-02-10 | 1998-08-13 | Matsushita Electronics Corporation | Resin sealed semiconductor device and method for manufacturing the same |
| US6291274B1 (en) | 1997-02-10 | 2001-09-18 | Matsushita Electric Industrial Co., Ltd. | Resin molded semiconductor device and method for manufacturing the same |
| US6126885A (en) * | 1997-06-27 | 2000-10-03 | Matsushita Electronics Corporation | Method for manufacturing resin-molded semiconductor device |
| US6258314B1 (en) | 1997-06-27 | 2001-07-10 | Matsushita Electronics Corporation | Method for manufacturing resin-molded semiconductor device |
| US6648928B2 (en) * | 1998-04-03 | 2003-11-18 | Medtronic, Inc. | Method of making an implantable medical device having a flat electrolytic capacitor with miniaturized epoxy connector droplet |
| JP2009021630A (en) * | 2008-09-24 | 2009-01-29 | Sanyo Electric Co Ltd | Method of manufacturing semiconductor device |
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