JPH02113622A - Mosfet transistor driving circuit - Google Patents
Mosfet transistor driving circuitInfo
- Publication number
- JPH02113622A JPH02113622A JP63265545A JP26554588A JPH02113622A JP H02113622 A JPH02113622 A JP H02113622A JP 63265545 A JP63265545 A JP 63265545A JP 26554588 A JP26554588 A JP 26554588A JP H02113622 A JPH02113622 A JP H02113622A
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- mosfet transistor
- mosfet
- output side
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
Landscapes
- Electronic Switches (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はＭＯＳＦＥＴ トランジスタ駆動回路に関し、
特にＯＦＦ時の高速化を図ったＭＯＳＦＥＴ Ｉ−ラン
ジスタ駆動回路に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a MOSFET transistor drive circuit,
In particular, the present invention relates to a MOSFET I-transistor drive circuit that aims to increase speed when turned off.
従来のＭＯＳＦＥＴ トランジスタ駆動回路における肋
５ＦＥＴ トランジスタＱ１のＯＦＦ時における高速化
の手段として、第２図に示すようにゲート抵抗Ｒ１の両
端にダイオードＤ１を並列接続し、ＭＯ３ＦＦ、Ｔ Ｉ
−ランジスタの入力容量による充電電荷が放電し易いよ
うに低インピーダンス回路を構成していた。Conventional MOSFET In a transistor drive circuit, as a means of increasing the speed when the transistor Q1 is turned off, a diode D1 is connected in parallel to both ends of the gate resistor R1, and MO3FF, T I
- A low impedance circuit was constructed so that the charge caused by the input capacitance of the transistor could be easily discharged.
しかしながら、上述した従来のＭＯＳＦＥＴ トランジ
スタ駆動回路はパルス発生回路１の出力部のいわゆる吸
い込み電流に限度があり、充分な放電電流を流すことが
できずにトランジスタ駆動回路の高速化を図ることが困
難な場合がある。However, the conventional MOSFET transistor drive circuit described above has a limit on the so-called sink current of the output section of the pulse generation circuit 1, and it is difficult to increase the speed of the transistor drive circuit because a sufficient discharge current cannot flow. There are cases.
本発明の目的は前記課題を解決したＭＯＳＦＥＴ トラ
ンジスタ駆動回路を提供することにある。An object of the present invention is to provide a MOSFET transistor drive circuit that solves the above problems.
前記目的を達成するため、本発明は繰り返しパルスを発
生するパルス発生回路の出力により抵抗を介してＭＯＳ
ＦＥＴ トランジスタをＯＮ、ＯＦＦさぜるＭＯＳＦＥ
ＴＩ−ランジスタ駆動回路において、前記ＭＯＳＦＥＴ
トランジスタのゲート・ソース間に１−ランジスタの
エミッタ・コレクタを並列接続し、かつ前記トランジス
タのベースを前記パルス発生回路の出力側に接続したも
のである。In order to achieve the above-mentioned object, the present invention uses the output of a pulse generation circuit that repeatedly generates pulses to
FET MOSFE that turns the transistor ON and OFF
In the TI-transistor drive circuit, the MOSFET
The emitter and collector of a transistor are connected in parallel between the gate and source of the transistor, and the base of the transistor is connected to the output side of the pulse generating circuit.
以下、本発明の一実施例を図により説明する。 Hereinafter, one embodiment of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing an embodiment of the present invention.
図において、１は繰り返しパルスを発生するパルス発生
回路、Ｒ１はゲート抵抗、ＱｌはＭＯＳＦＥＴ トラン
ジスタである。In the figure, 1 is a pulse generation circuit that repeatedly generates pulses, R1 is a gate resistor, and Ql is a MOSFET transistor.
本発明は前記ＭＯＳＦＥＴ トランジスタＱ１のゲート
・ソース間にｐｎｐ型１−ランジスタＱ２のエミッタ・
コレクタを並列接続し、かつベース端子を前記パルス発
生回路］の出力側ａに接続したものである。The present invention provides a pnp type 1 transistor between the gate and source of the MOSFET transistor Q1 and the emitter of the transistor Q2.
The collectors are connected in parallel, and the base terminal is connected to the output side a of the pulse generating circuit.
次に、第１図の動作について説明する。Next, the operation shown in FIG. 1 will be explained.
ＭＯＳＦＥＴ トランジスタＱ１のＯＮ時にその入力容
量Ｃ１に蓄えられた電荷による充電電圧ｖ２は、パルス
発生回路１の出力側ａが零になると、グー１〜抵抗Ｒ１
を介して放電し、電圧降下ｖ１を生じさせる。この電圧
がトランジスタＱ２のエミッタ・ベース電圧（ＶＢＥ）
より大きくなると、ベース電流■Ｂが流れ始める。これ
に伴い、コレクタ電流■ｃが流れ、放電回路を形成する
。When the MOSFET transistor Q1 is turned on, the charging voltage v2 due to the charge stored in the input capacitance C1 will be increased from the resistor R1 to the resistor R1 when the output side a of the pulse generating circuit 1 becomes zero.
, causing a voltage drop v1. This voltage is the emitter-base voltage (VBE) of transistor Q2.
When it becomes larger, base current ■B starts to flow. Along with this, a collector current (c) flows, forming a discharge circuit.
以−ト説明したように本発明は、パルス発生回路とゲー
ト抵抗とＭＯＳＦＥＴ トランジスタよりなるＭＯ３Ｉ
；”ＥＴＩ−ランジスタ駆動回路において、ＭＯＳＦＥ
Ｔ トランジスタのゲート・ソース間にトランジスタの
エミッタ・コレクタを並列接続し、ベース端子をパルス
発生回路の出力に接続することにより、ＭＯＳＦＥＴト
ランジスタの入力容量に蓄えられた電荷を、肋５ＦＩＥ
Ｔ トランジスタのＯＦＦ時において急速に放電するこ
とが可能であり、ＭＯＳＦＥＴ トランジスタのＯＦＦ
時における高速化を実現できる効果がある。As explained above, the present invention provides an MO3I circuit consisting of a pulse generation circuit, a gate resistor, and a MOSFET transistor.
;”ETI-In transistor drive circuit, MOSFE
By connecting the emitter and collector of the transistor in parallel between the gate and source of the T transistor, and connecting the base terminal to the output of the pulse generation circuit, the charge stored in the input capacitance of the MOSFET transistor can be transferred to the
It is possible to discharge rapidly when the T transistor is OFF, and when the MOSFET transistor is OFF.
This has the effect of speeding up time.
第１図は本発明の−・実施例を示す回路図、第２図は従
来例を示す回路図である。
トパルス発生回路 Ｒ１・・ゲート抵抗Ｑ１・・Ｍ
ＯＳＦＥＴ Ｉ−ランジスタ Ｑ２−１〜ランジスタｃ
ｊ−ＭＯＳＦＥＴ トランジスタの人力容量間・・ダイ
オードFIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional example. Pulse generation circuit R1...Gate resistance Q1...M
OSFET I-Ran resistor Q2-1~Ran resistor c
j-MOSFET Between human power capacitance of transistor...diode
Claims (1)
により抵抗を介してＭＯＳＦＥＴトランジスタをＯＮ、
ＯＦＦさせるＭＯＳＦＥＴトランジスタ駆動回路におい
て、前記ＭＯＳＦＥＴトランジスタのゲート・ソース間
にトランジスタのエミッタ・コレクタを並列接続し、か
つ前記トランジスタのベースを前記パルス発生回路の出
力側に接続したことを特徴とするＭＯＳＦＥＴトランジ
スタ駆動回路。(1) The MOSFET transistor is turned on via a resistor by the output of a pulse generation circuit that repeatedly generates pulses,
A MOSFET transistor drive circuit for turning off a MOSFET transistor, characterized in that the emitter and collector of the transistor are connected in parallel between the gate and source of the MOSFET transistor, and the base of the transistor is connected to the output side of the pulse generation circuit. drive circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63265545A JPH02113622A (en) | 1988-10-21 | 1988-10-21 | Mosfet transistor driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63265545A JPH02113622A (en) | 1988-10-21 | 1988-10-21 | Mosfet transistor driving circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02113622A true JPH02113622A (en) | 1990-04-25 |
Family
ID=17418607
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63265545A Pending JPH02113622A (en) | 1988-10-21 | 1988-10-21 | Mosfet transistor driving circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02113622A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997045946A1 (en) * | 1996-05-28 | 1997-12-04 | Hitachi, Ltd. | Switching power source circuit |
| US6804096B2 (en) | 2001-07-27 | 2004-10-12 | Denso Corporation | Load driving circuit capable of raised accuracy detection of disconnection and short circuit of the load |
| JP2005026732A (en) * | 2003-06-30 | 2005-01-27 | Sony Corp | Drive circuit for field-effect transistor |
| DE102011001691A1 (en) * | 2011-04-13 | 2012-10-18 | Vossloh-Schwabe Deutschland Gmbh | Circuit device for inverter circuit, has drive circuit having driver circuitry and eliminating circuitry that are connected with each other, and controlled current path that is connected between gate electrode and reference potential |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS586440B2 (en) * | 1975-09-02 | 1983-02-04 | 松下電器産業株式会社 | Onkiyoukikiyoushindoban |
| JPS6323829B2 (en) * | 1980-06-10 | 1988-05-18 | Toyo Boseki |
-
1988
- 1988-10-21 JP JP63265545A patent/JPH02113622A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS586440B2 (en) * | 1975-09-02 | 1983-02-04 | 松下電器産業株式会社 | Onkiyoukikiyoushindoban |
| JPS6323829B2 (en) * | 1980-06-10 | 1988-05-18 | Toyo Boseki |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997045946A1 (en) * | 1996-05-28 | 1997-12-04 | Hitachi, Ltd. | Switching power source circuit |
| US6804096B2 (en) | 2001-07-27 | 2004-10-12 | Denso Corporation | Load driving circuit capable of raised accuracy detection of disconnection and short circuit of the load |
| JP2005026732A (en) * | 2003-06-30 | 2005-01-27 | Sony Corp | Drive circuit for field-effect transistor |
| DE102011001691A1 (en) * | 2011-04-13 | 2012-10-18 | Vossloh-Schwabe Deutschland Gmbh | Circuit device for inverter circuit, has drive circuit having driver circuitry and eliminating circuitry that are connected with each other, and controlled current path that is connected between gate electrode and reference potential |
| DE102011001691B4 (en) * | 2011-04-13 | 2013-02-07 | Vossloh-Schwabe Deutschland Gmbh | Transistor switch arrangement with improved turn-off characteristic |
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