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JPH0160567U - - Google Patents

Info

Publication number
JPH0160567U
JPH0160567U JP1987156410U JP15641087U JPH0160567U JP H0160567 U JPH0160567 U JP H0160567U JP 1987156410 U JP1987156410 U JP 1987156410U JP 15641087 U JP15641087 U JP 15641087U JP H0160567 U JPH0160567 U JP H0160567U
Authority
JP
Japan
Prior art keywords
optical semiconductor
heat sink
semi
insulating heat
fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987156410U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987156410U priority Critical patent/JPH0160567U/ja
Publication of JPH0160567U publication Critical patent/JPH0160567U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案による光半導体装置の第１の実
施例の斜視図、第２図はその上面図、第３図は第
２の実施例の上面図、第４図は第３の実施例の上
面図、第５図は従来の半導体レーザの斜視図、第
６図はその上面図、第７図は本考案の半絶縁性ヒ
ートシンクの一例を示す斜視図である。 １……半導体レーザペレツト、２……ヒートシ
ンク、３……錫、４……金電極、５……銅ブロツ
ク、６……金線、７……リード、８……リード、
９……金線、１０……ホトダイオード、１１……
金線、１２……ボンデイング部、２０……光出射
点、２１……中心線。 FIG. 1 is a perspective view of a first embodiment of the optical semiconductor device according to the present invention, FIG. 2 is a top view thereof, FIG. 3 is a top view of the second embodiment, and FIG. 4 is a third embodiment. 5 is a perspective view of a conventional semiconductor laser, FIG. 6 is a top view thereof, and FIG. 7 is a perspective view showing an example of a semi-insulating heat sink of the present invention. 1... Semiconductor laser pellet, 2... Heat sink, 3... Tin, 4... Gold electrode, 5... Copper block, 6... Gold wire, 7... Lead, 8... Lead,
9...Gold wire, 10...Photodiode, 11...
Gold wire, 12... bonding part, 20... light emission point, 21... center line.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ステムに固着した良導体ブロツク上に表面を導
電性処理された半絶縁性ヒートシンクを固着し、
前記半絶縁性ヒートシンクに光半導体ペレツトを
固着した構成を少なくとも備えている光半導体装
置において、光半導体ペレツトの光ビーム出射点
又は受光面中心を通る中心線に対して、前記半絶
縁性ヒートシンクが非対称になつていることを特
徴とする光半導体装置。 A semi-insulating heat sink with a conductive surface is fixed on a highly conductive block fixed to the stem.
In the optical semiconductor device including at least a configuration in which an optical semiconductor pellet is fixed to the semi-insulating heat sink, the semi-insulating heat sink is asymmetrical with respect to a center line passing through the light beam emission point or the center of the light receiving surface of the optical semiconductor pellet. An optical semiconductor device characterized by:
JP1987156410U 1987-10-12 1987-10-12 Pending JPH0160567U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987156410U JPH0160567U (en) 1987-10-12 1987-10-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987156410U JPH0160567U (en) 1987-10-12 1987-10-12

Publications (1)

Publication Number Publication Date
JPH0160567U true JPH0160567U (en) 1989-04-17

Family

ID=31434924

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987156410U Pending JPH0160567U (en) 1987-10-12 1987-10-12

Country Status (1)

Country Link
JP (1) JPH0160567U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59151484A (en) * 1983-02-18 1984-08-29 Agency Of Ind Science & Technol Semiconductor laser device
JPS6424870A (en) * 1987-07-02 1989-01-26 Ici Plc Bottom coat paint composition and its production

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59151484A (en) * 1983-02-18 1984-08-29 Agency Of Ind Science & Technol Semiconductor laser device
JPS6424870A (en) * 1987-07-02 1989-01-26 Ici Plc Bottom coat paint composition and its production

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