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JPH0142068B2 - - Google Patents

Info

Publication number
JPH0142068B2
JPH0142068B2 JP56041911A JP4191181A JPH0142068B2 JP H0142068 B2 JPH0142068 B2 JP H0142068B2 JP 56041911 A JP56041911 A JP 56041911A JP 4191181 A JP4191181 A JP 4191181A JP H0142068 B2 JPH0142068 B2 JP H0142068B2
Authority
JP
Japan
Prior art keywords
signal
recording
data
channel mode
channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56041911A
Other languages
Japanese (ja)
Other versions
JPS57158007A (en
Inventor
Masanori Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ENU EFU KAIRO SETSUKEI BUROTSUKU KK
Original Assignee
ENU EFU KAIRO SETSUKEI BUROTSUKU KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ENU EFU KAIRO SETSUKEI BUROTSUKU KK filed Critical ENU EFU KAIRO SETSUKEI BUROTSUKU KK
Priority to JP4191181A priority Critical patent/JPS57158007A/en
Publication of JPS57158007A publication Critical patent/JPS57158007A/en
Publication of JPH0142068B2 publication Critical patent/JPH0142068B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10527Audio or video recording; Data buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Description

【発明の詳細な説明】 この発明はデータ信号にチヤンネル数を表わす
チヤンネルモード信号を付加したPCM記録再生
装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a PCM recording and reproducing apparatus in which a channel mode signal indicating the number of channels is added to a data signal.

多チヤンネルのPCM記録再生においてはアナ
ログ計測などにより得られたデータ信号をマルチ
プレクサを経てA―D変換器に加えて順次デジタ
ルコード化し、シリアルに磁気テープなどの記録
媒体に記録している。従つて、再生時にはこのシ
リアルデータは記録時と同一チヤンネル数の出力
として記録時と完全な対応を持つて再生する必要
がある。
In multi-channel PCM recording and playback, data signals obtained through analog measurement are sent through a multiplexer to an A-D converter, where they are sequentially converted into digital codes and serially recorded on a recording medium such as a magnetic tape. Therefore, during reproduction, this serial data must be reproduced with the same number of channels as during recording, with complete correspondence to that during recording.

このため、従来では例えば第1図に示すように
4チヤンネルのデータ信号DATAを例にとつた
場合最初のサンプルSMP1の直前にチヤンネルモ
ード信号CHMODEを付加しておき、これを再生
時読み出してデマルチプレクサを設定することが
行なわれている。
For this reason, conventionally, for example, when taking a four-channel data signal DATA as shown in Figure 1, a channel mode signal CHMODE is added just before the first sample SMP 1 , and this is read out during playback and used as a data signal. Setting up a multiplexer is being done.

ところが、この方法では一連のデータ信号の直
前の1個所のみにチヤンネルモード信号が付加さ
れるだけなので再生時チヤンネルモード信号の読
み出しが不調に終るとデマルチプレクサの設定が
不正確になり、全てのデータ信号の再生が不安定
なものになる欠点があつた。また、データ信号の
記録中にチヤンネル数を切換えるときはその都度
改めてデータ信号の直前にチヤンネルモード信号
を付加するようになるのでこのための操作の手間
が面倒な欠点もあつた。
However, with this method, the channel mode signal is added only at one point immediately before a series of data signals, so if the channel mode signal reading fails during playback, the demultiplexer settings will be incorrect and all data will be lost. The problem was that the signal playback became unstable. Furthermore, when changing the number of channels during recording of data signals, a channel mode signal must be added just before the data signal each time, which has the disadvantage that the operation is cumbersome.

この発明は上記欠点を除去するためなされたも
ので、所定チヤンネルのデータ信号からなるサン
プル間隔と一定の関係をもつ時間間隔毎にチヤン
ネルモード信号を記録することにより記録時と正
確な対応をもつた安定した再生データ信号が得ら
れるPCM記録再生装置を提供することを目的と
する。
This invention was made to eliminate the above-mentioned drawbacks, and by recording channel mode signals at time intervals that have a certain relationship with the sample interval of data signals of a predetermined channel, it is possible to have accurate correspondence with the time of recording. It is an object of the present invention to provide a PCM recording and reproducing device that can obtain stable reproduced data signals.

以下、この発明の一実施例を図面に従い説明す
る。第2図において1はPCM記録部を示すもの
で、このものはマルチプレクサ2、並列直列変換
器3、DA変換器4おび記録装置5を有してい
る。このような記録部1では所定チヤンネルのデ
ータ信号DATAとともにチヤンネル数を表わす
チヤンネルモード信号CHMODEがマルチプレク
サ2に与えられるとデジタルコード化された記録
信号系列に変換されたのち並列直列変換器3、
DA変換器4を介して記録装置5に与えられ記録
媒体例えば磁気テープに記録される。この場合の
記録信号系列は所定チヤンネル数のデータ信号か
らなるサンプルの間隔と一定の関係をもつ時間間
隔毎に同期信号とともにチヤンネルモード信号を
付加するようにしている。つまり第3図aに示す
ように8チヤンネルのデータ信号DATAからな
るサンプルSMPの場合各サンプルSMP時毎に同
期信号Sとともにチヤンネルモード信号
CHMODEが付加されるとすると、4チヤンネル
のデータ信号DATAからなるサンプルSMPの場
合は第3図bに示すように2サンプルSMP時毎
に同期信号Sとともにチヤンネルモード信号
CHMODEが付加されるようになる。
An embodiment of the present invention will be described below with reference to the drawings. In FIG. 2, reference numeral 1 indicates a PCM recording section, which includes a multiplexer 2, a parallel-to-serial converter 3, a DA converter 4, and a recording device 5. In such a recording section 1, when the channel mode signal CHMODE representing the number of channels is applied to the multiplexer 2 together with the data signal DATA of a predetermined channel, the signal is converted into a digitally coded recording signal sequence, and then the parallel-to-serial converter 3,
The signal is supplied to a recording device 5 via a DA converter 4 and recorded on a recording medium such as a magnetic tape. In this case, the recording signal sequence is such that a channel mode signal is added together with a synchronization signal at time intervals that have a constant relationship with the sample interval of data signals of a predetermined number of channels. In other words, as shown in Figure 3a, in the case of a sample SMP consisting of 8 channels of data signals DATA, a channel mode signal is sent along with a synchronization signal S at each sample SMP time.
If CHMODE is added, in the case of a sample SMP consisting of 4 channels of data signals DATA, the channel mode signal is sent along with the synchronization signal S every 2 samples SMP as shown in Figure 3b.
CHMODE will be added.

一方、6はPCM再生部を示すもので、このも
のは記録装置5より記録データが与えられるアン
プ7、データ信号分離回路8、同期信号分離回路
9、PLL10、同期制御回路11、直列並列変
換器12、データ信号DATAを一時記憶する記
憶装置13、チヤンネル信号CHMODEを一時記
憶する記憶装置14およびデマルチプレクサ15
を有している。この再生部6では記録装置5の磁
気テープより記録データが読み出されるとアンプ
7を介してデータ信号分離回路8および同期信号
分離回路9に夫々与えられる。するとデータ信号
分離回路8よりチヤンネルモード信号CHMODE
を含むデータ信号DATAが分離され直列並列変
換器12に与えられ、また同期信号分離回路9よ
り同期信号Sが分離され同期制御回路11に直接
およびPLL10を介して与えられる。
On the other hand, 6 indicates a PCM reproducing section, which includes an amplifier 7 to which recorded data is supplied from the recording device 5, a data signal separation circuit 8, a synchronization signal separation circuit 9, a PLL 10, a synchronization control circuit 11, and a serial/parallel converter. 12, a storage device 13 that temporarily stores the data signal DATA, a storage device 14 that temporarily stores the channel signal CHMODE, and a demultiplexer 15
have. In this reproducing section 6, when recorded data is read from the magnetic tape of the recording device 5, it is applied via an amplifier 7 to a data signal separation circuit 8 and a synchronization signal separation circuit 9, respectively. Then, the data signal separation circuit 8 outputs the channel mode signal CHMODE.
The data signal DATA including the synchronization signal S is separated and applied to the serial/parallel converter 12, and the synchronization signal S is separated from the synchronization signal separation circuit 9 and applied to the synchronization control circuit 11 directly and via the PLL 10.

この状態で、PLL10および同期制御回路1
1の出力により直列並列回路12の出力中のデー
タ信号DATAおよびチヤンネルモード信号
CHMODEは別々に一時記憶装置13,14に記
憶される。
In this state, PLL10 and synchronous control circuit 1
1 outputs the data signal DATA and channel mode signal being output from the series parallel circuit 12.
CHMODE is stored separately in temporary storage devices 13 and 14.

そして、このように記憶装置13に一時記憶さ
れたデータ信号DATAはその後チヤンネルモー
ド信号CHMODEとともにデイマルチプレクサ1
5に与えられる。これによりこのときのチヤンネ
ルモード信号CHMODEの設定に応じてデータ信
号DATAが再生される。
The data signal DATA temporarily stored in the storage device 13 in this way is then sent to the day multiplexer 1 along with the channel mode signal CHMODE.
given to 5. As a result, the data signal DATA is reproduced according to the setting of the channel mode signal CHMODE at this time.

従つて、このような構成によれば所定チヤンネ
ル数のデータ信号からなるサンプルの間隔と一定
の関係をもつた時間間隔毎にチヤンネルモード信
号が付加されるのでこのようなチヤンネルモード
信号は極めて頻繁に繰返して得られることにな
る。このことは従来の一連のデータ信号の直前の
1個所のみにチヤンネルモード信号を付加するも
のに比べ仮にある時点のチヤンネルモード信号の
読み出しが不調に終つてもすぐに次のチヤンネル
モード信号を読み出すことでこれを補うことがで
きるので、デマルチプレクサを常に正確に設定で
き記録時と正確な対応をもつた再生データ信号を
安定して得られることになる。また、チヤンネル
モード信号は所定の時間間隔毎に繰返して付加さ
れているので、仮にデータ信号の記録途中でチヤ
ンネル数を変更するときにもチヤンネル切換を行
なうだけで対応でき、従来のようにチヤンネル数
を切換えるときはその都度改めてデータ信号の直
前にチヤンネルモード信号を挿入するのに比べこ
のための操作を極めて簡単化することもできる。
Therefore, with such a configuration, channel mode signals are added at every time interval that has a certain relationship with the sample interval of data signals of a predetermined number of channels, so such channel mode signals are added very frequently. It will be obtained repeatedly. This means that even if the reading of the channel mode signal at a certain point ends in failure, the next channel mode signal can be read out immediately compared to the conventional method in which the channel mode signal is added only at one point immediately before a series of data signals. Since this can be compensated for, the demultiplexer can always be set accurately and a reproduced data signal that accurately corresponds to that at the time of recording can be stably obtained. In addition, since the channel mode signal is repeatedly added at predetermined time intervals, even if the number of channels needs to be changed in the middle of data signal recording, it can be handled by simply switching channels. Compared to inserting a channel mode signal just before the data signal each time the channel mode signal is switched, the operation for this can be extremely simplified.

なお、この発明は上記実施例にのみ限定されず
要旨を変更しない範囲で適宜変形して実施でき
る。
It should be noted that the present invention is not limited to the above-mentioned embodiments, but can be implemented with appropriate modifications without changing the gist.

以上述べたようにこの発明によれば所定チヤン
ネル数のデータ信号からなるサンプルの間隔と一
定の関係をもつ時間間隔毎にチヤンネルモード信
号を付加することにより記録時と正確な対応をも
つた安定した再生データ信号が得られるPCM記
録再生装置を提供できる。
As described above, according to the present invention, by adding a channel mode signal at each time interval that has a certain relationship with the sample interval consisting of data signals of a predetermined number of channels, a stable signal that accurately corresponds to that at the time of recording is generated. It is possible to provide a PCM recording and reproducing device that can obtain a reproduced data signal.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来用いられる記録信号系列のフオー
マツトを示す図、第2図はこの発明の一実施例を
示すブロツク図、第3図a,bは同実施例に用い
られる記録信号系列のフオーマツトの一例を示す
図である。 1…PCM記録部、2…マルチプレクサ、3…
並列直列変換器、4…DA変換器、5…記録装
置、6…PCM再生部、7…アンプ、8…データ
信号分離回路、9…同期信号分離回路、10…
PLL、11…同期制御回路、12…直列並列回
路、13,14…記憶装置、15…デマルチプレ
クサ。
FIG. 1 is a diagram showing the format of a conventionally used recording signal series, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIGS. 3a and 3b are diagrams showing the format of a recording signal series used in the same embodiment. It is a figure showing an example. 1...PCM recording unit, 2...multiplexer, 3...
Parallel-serial converter, 4... DA converter, 5... Recording device, 6... PCM playback unit, 7... Amplifier, 8... Data signal separation circuit, 9... Synchronization signal separation circuit, 10...
PLL, 11...Synchronization control circuit, 12...Series parallel circuit, 13, 14...Storage device, 15...Demultiplexer.

Claims (1)

【特許請求の範囲】[Claims] 1 所定チヤンネル数のデータ信号と共にチヤン
ネル数を表わすチヤンネルモード信号が与えられ
且つ所定チヤンネル数のデータ信号からなるサン
プル間隔と一定関係をもつ時間間隔毎に上記チヤ
ンネルモード信号を付加してなるデジタルコード
化された記録信号系列を発生する手段と、この手
段より発生する記録信号系列を記録する手段と、
この手段よりデータ信号およびチヤンネルモード
信号を読み出す手段と、この手段にて読み出され
たチヤンネルモード信号にもとずいてデータ信号
を再生する手段とを具備したことを特徴とする
PCM記録再生装置。
1 Digital coding in which a channel mode signal representing the number of channels is given together with a data signal of a predetermined number of channels, and the channel mode signal is added at every time interval that has a constant relationship with the sample interval consisting of the data signal of a predetermined number of channels. means for generating a recording signal sequence generated by the means; and means for recording the recording signal sequence generated by the means;
The present invention is characterized by comprising means for reading data signals and channel mode signals from this means, and means for reproducing data signals based on the channel mode signals read by this means.
PCM recording and playback device.
JP4191181A 1981-03-23 1981-03-23 Pcm recording and reproducing device Granted JPS57158007A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4191181A JPS57158007A (en) 1981-03-23 1981-03-23 Pcm recording and reproducing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4191181A JPS57158007A (en) 1981-03-23 1981-03-23 Pcm recording and reproducing device

Publications (2)

Publication Number Publication Date
JPS57158007A JPS57158007A (en) 1982-09-29
JPH0142068B2 true JPH0142068B2 (en) 1989-09-08

Family

ID=12621447

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4191181A Granted JPS57158007A (en) 1981-03-23 1981-03-23 Pcm recording and reproducing device

Country Status (1)

Country Link
JP (1) JPS57158007A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995008823A1 (en) * 1993-09-21 1995-03-30 Sony Corporation Method and device for transmitting data, data decoder, and data recording medium
WO1995016990A1 (en) * 1993-12-18 1995-06-22 Sony Corporation Data reproducing device and data recording medium

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103544980B (en) * 2012-07-09 2016-12-21 安凯(广州)微电子技术有限公司 A kind of recording channel data acquisition circuit and multimedia chip
CN103559907B (en) * 2013-10-25 2016-06-08 广州华多网络科技有限公司 The way of recording, device and terminal

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5727411A (en) * 1980-07-26 1982-02-13 Sony Corp Multichannel recording method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1995008823A1 (en) * 1993-09-21 1995-03-30 Sony Corporation Method and device for transmitting data, data decoder, and data recording medium
WO1995016990A1 (en) * 1993-12-18 1995-06-22 Sony Corporation Data reproducing device and data recording medium
US6308004B2 (en) 1993-12-18 2001-10-23 Sony Corp System for storing and reproducing multiplexed data
US6504994B2 (en) 1993-12-18 2003-01-07 Sony Corporation Data reproduction apparatus and data storage medium

Also Published As

Publication number Publication date
JPS57158007A (en) 1982-09-29

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