JPH0141219Y2 - - Google Patents
Info
- Publication number
- JPH0141219Y2 JPH0141219Y2 JP20161384U JP20161384U JPH0141219Y2 JP H0141219 Y2 JPH0141219 Y2 JP H0141219Y2 JP 20161384 U JP20161384 U JP 20161384U JP 20161384 U JP20161384 U JP 20161384U JP H0141219 Y2 JPH0141219 Y2 JP H0141219Y2
- Authority
- JP
- Japan
- Prior art keywords
- trigonometric function
- signal
- phase shifter
- divider
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
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- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Description
【考案の詳細な説明】
産業上の利用分野
本考案はデジタルAM復調回路に係り、AM信
号を高速度に復調処理し得る回路に関する。[Detailed Description of the Invention] Industrial Application Field The present invention relates to a digital AM demodulation circuit, and more particularly to a circuit that can demodulate an AM signal at high speed.
従来の技術
第2図は従来のAM復調回路の一例の回路図を
示す。同図において、端子1a,1bに入来した
振幅被変調映像信号はダイオード2にて整流さ
れ、低域フイルタ3にてキヤリア成分を除去さ
れ、包絡線検波された復調信号として端子4a,
4bより取出される。Prior Art FIG. 2 shows a circuit diagram of an example of a conventional AM demodulation circuit. In the same figure, the amplitude modulated video signal inputted to terminals 1a and 1b is rectified by a diode 2, the carrier component is removed by a low-pass filter 3, and the demodulated signal is sent to terminals 4a and 1b as an envelope-detected demodulated signal.
4b.
考案が解決しようとする問題点
上記従来回路は低域フイルタ3を用いているた
め、高速のAGC用の復調回路として使用できな
い問題点があつた。一方、デジタル化された振幅
被変調映像信号を処理する場合も、デジタル処理
可能な整流器及びデジタル処理可能な低域フイル
タを用いるが、この場合も低域フイルタを用いる
ので高速のAGC用の復調回路として使用できな
い問題点があつた。Problems to be Solved by the Invention Since the conventional circuit described above uses the low-pass filter 3, there is a problem that it cannot be used as a demodulation circuit for high-speed AGC. On the other hand, when processing a digitized amplitude modulated video signal, a digitally processable rectifier and a digitally processable low-pass filter are used, but since the low-pass filter is also used in this case, a demodulation circuit for high-speed AGC is used. There was a problem that made it unusable.
本考案は、低域フイルタ等を用いず、AM信号
を高速度に復調処理し得るデジタルAM復調回路
を提供することを目的とする。 An object of the present invention is to provide a digital AM demodulation circuit that can demodulate AM signals at high speed without using a low-pass filter or the like.
問題点を解決するための手段
第1図中、90゜移相器6は入力AM信号の位相
を90゜移相する移相手段、除算器7は90゜移相器6
の出力信号と入力AM信号との除算を行なう第1
の除算手段、tan-1逆三角関数演算器8は、除算
器7の出力信号に逆三角関数演算を行なう逆三角
関数演算器手段、sin三角関数演算器9は、tan-1
逆三角関数演算器8の出力信号に三角関数演算を
行なう三角関数演算器手段、除算器10はsin、
三角関数演算器9の出力信号と上記入力AM信号
との除算を行なう除算手段の各一実施例である。Means for solving the problem In Fig. 1, the 90° phase shifter 6 is a phase shifting means for shifting the phase of the input AM signal by 90°, and the divider 7 is a 90° phase shifter 6.
The first one performs division of the output signal of and the input AM signal.
The inverse trigonometric function calculator 8 is an inverse trigonometric function calculator means for performing an inverse trigonometric function operation on the output signal of the divider 7, and the sin trigonometric function operator 9 is tan -1 .
The trigonometric function calculator means for performing trigonometric function calculations on the output signal of the inverse trigonometric function calculator 8, and the divider 10 are sin,
This is an embodiment of a division means for dividing the output signal of the trigonometric function calculator 9 and the input AM signal.
作 用
90゜移相器6にて入力AM信号の位相を90゜移相
し、除算器7にて移相器6の出力信号と入力AM
信号との除算を行ない、tan-1逆三角関数演算器
8にて、除算器7の出力信号に逆三角関数演算を
行ない、sin三角関数演算器9にて、逆三角関数
演算器8の出力信号に三角関数演算を行ない、除
算器10にて、sin三角関数演算器9の出力信号
と上記入力AM信号との除算を行なう。Operation The 90° phase shifter 6 shifts the phase of the input AM signal by 90°, and the divider 7 divides the output signal of the phase shifter 6 and the input AM signal.
The tan -1 inverse trigonometric function operator 8 performs inverse trigonometric function operation on the output signal of the divider 7, and the sin trigonometric function operator 9 calculates the output of the inverse trigonometric function operator 8. A trigonometric function operation is performed on the signal, and a divider 10 divides the output signal of the sin trigonometric function operator 9 and the input AM signal.
実施例
第1図は本考案回路の一実施例のブロツク系統
図を示す。搬送波の振幅をA、振幅変調度をma、
変調信号V(t)、搬送波の周波数cとした場合、
a=A{1+maV(t)}sin(2πct)
なるAM信号が端子5に入来したとする。信号a
は一定の標本化周期で標本化されたデジタルAM
信号である。信号aは90゜移相器6にて90゜移相さ
れ、
b=A{1+maV(t)}cos′(2πct)
なる信号bとされる。除算器7においてa/bが
行なわれると、
c=tan(2πct)
なる信号cが得られる。Embodiment FIG. 1 shows a block diagram of an embodiment of the circuit of the present invention. The amplitude of the carrier wave is A, the amplitude modulation degree is ma,
Suppose that an AM signal such as a=A{1+maV(t)}sin(2πct) enters the terminal 5, where the modulation signal V(t) and the frequency of the carrier wave are c. signal a
is a digital AM sampled at a constant sampling period.
It's a signal. The signal a is phase-shifted by 90 degrees by the 90 degrees phase shifter 6, resulting in a signal b as follows: b=A{1+maV(t)}cos'(2πct). When a/b is performed in the divider 7, a signal c is obtained as follows: c=tan(2πct).
信号cはtan-1逆三角関数演算器8にてtan-1を
演算されて
d=2πct
なる信号dとされ、sin三角関数演算器9にてsin
を演算されて
e=sin(2πct)
なる信号eとされる。除算器10でa/eが行な
われると、
=A{1+maV(t)} (1)
なる信号とされて端子11より取出される。 The signal c is calculated by tan -1 in the tan -1 inverse trigonometric function calculator 8 to become a signal d with d = 2πct, and the sin trigonometric function calculator 9 calculates sin
is calculated and the signal e becomes e=sin(2πct). When a/e is performed by the divider 10, the signal is outputted from the terminal 11 as follows: =A{1+maV(t)} (1).
ここで、Aは搬送波の振幅であるので一定であ
る故、これを1とすると、(1)式は
=1+maV(t) (2)
と書直すことができる。(2)式の1は直流分である
故、結局、端子11には直流分を重畳されたAM
成分即ち入力AM信号の包絡線が取出されたこと
になる。 Here, since A is the amplitude of the carrier wave, it is constant, so if A is set to 1, equation (1) can be rewritten as =1+maV(t) (2). Since 1 in equation (2) is the DC component, in the end, terminal 11 receives the AM signal superimposed with the DC component.
This means that the component, ie, the envelope of the input AM signal, has been extracted.
なお、除算器7における除算をb/aにした場
合、演算器8をcot-1逆三角関数演算器にすれば
同様の結果を得ることができる。 Note that when the division in the divider 7 is b/a, the same result can be obtained if the arithmetic unit 8 is a cot -1 inverse trigonometric function arithmetic unit.
又、演算器8を−tan-1逆三角関数演算器、演
算器9を−sin三角関数演算器にしても同様の結
果を得ることができる。 Further, similar results can be obtained by using a -tan -1 inverse trigonometric function arithmetic unit as the arithmetic unit 8 and a -sin trigonometric function arithmetic unit as the arithmetic unit 9.
又、演算器8,9のいずれか一方の符号を負と
した場合には出力の符号が上記の場合と反転す
る。 Furthermore, when the sign of either one of the arithmetic units 8, 9 is set to negative, the sign of the output is inverted from the above case.
又、除算器10を信号e,bの除算を行なうよ
うにする場合、演算器9をcos三角関数演算器に
すれば同様の結果を得ることができる。 Furthermore, when the divider 10 is configured to divide the signals e and b, a similar result can be obtained by using a cos trigonometric function unit as the arithmetic unit 9.
又、90゜移相器6の代りに−90゜移相器を用いて
もよく、90゜移相器、−90゜としてはヒルベルト・
フイルタを用いればよい。 Also, a -90° phase shifter may be used instead of the 90° phase shifter 6, and as the 90° phase shifter, -90°, a Hilbert phase shifter may be used.
You can use a filter.
又、入力AM信号が搬送波の周波数の4倍の周
波数を以て標本化されている場合には−90゜移相
器を用い、−90゜移相器として入力AM信号を1標
本化周期だけ遅延させる遅延回路を用いてもよ
い。 Also, if the input AM signal is sampled at a frequency four times the frequency of the carrier wave, a -90° phase shifter is used, and the input AM signal is delayed by one sampling period as a -90° phase shifter. A delay circuit may also be used.
又、90゜移相器6、除算器7,10、tan-1逆三
角関数演算器8、sin三角関数演算器9等の各回
路にはROMによる関数テーブルを用いてもよ
い。 Further, a function table based on a ROM may be used for each circuit such as the 90° phase shifter 6, dividers 7 and 10, tan -1 inverse trigonometric function operator 8, and sine trigonometric function operator 9.
考案の効果
本考案回路は、一定の標本化周期で標本化され
た入力AM信号の位相を90゜又は−90゜移相する移
相器と、移相器の出力信号と該入力AM信号との
除算を行なう第1の除算器と、第1の除算器の出
力信号に逆三角関数演算を行なう逆三角関数演算
器と、逆三角関数演算器の出力信号に三角関数演
算を行なう三角関数演算器と、三角関数演算器の
出力信号と上記入力AM信号又は上記移相器の出
力信号との除算を行なう第2の除算器とにて構成
したため、各標本点におけるAM成分が得られる
ので低域フイルタを用いた従来のものに比して高
速度に復調処理し得、又、低域フイルタを用いた
ものに比して構成が簡単であり、IC化し易い等
の特長を有する。Effects of the invention The circuit of the invention includes a phase shifter that shifts the phase of an input AM signal sampled at a constant sampling period by 90 degrees or -90 degrees, and a phase shifter that shifts the phase of the input AM signal sampled at a constant sampling period. a first divider that performs division, an inverse trigonometric function operator that performs an inverse trigonometric function operation on the output signal of the first divider, and a trigonometric function operation that performs a trigonometric function operation on the output signal of the inverse trigonometric function operator. and a second divider that divides the output signal of the trigonometric function unit and the input AM signal or the output signal of the phase shifter, so the AM component at each sample point can be obtained. It has features such as being able to perform demodulation processing at a higher speed than the conventional method using a low-pass filter, and having a simpler structure and easier integration into an IC than a conventional method using a low-pass filter.
第1図は本考案回路の一実施例のブロツク系統
図、第2図は従来回路の一例の回路図である。
5……AM信号入力端子、6……90゜移相器、
7,10……除算器、8……tan-1逆三角関数演
算器、9……sin三角関数演算器、11……出力
端子。
FIG. 1 is a block system diagram of an embodiment of the circuit of the present invention, and FIG. 2 is a circuit diagram of an example of a conventional circuit. 5...AM signal input terminal, 6...90° phase shifter,
7, 10...Divider, 8...tan -1 inverse trigonometric function operator, 9...sin trigonometric function operator, 11...output terminal.
Claims (1)
号の位相を90゜又は−90゜移相する移相器と、該
移相器の出力信号と該入力AM信号との除算を
行なう第1の除算器と、該第1の除算器の出力
信号に逆三角関数演算を行なう逆三角関数演算
器と、該逆三角関数演算器の出力信号に三角関
数演算を行なう三角関数演算器と、該三角関数
演算器の出力信号と上記入力AM信号又は上記
移相器の出力信号との除算を行なう第2の除算
器とよりなるデジタルAM復調回路。 (2) 該移相器、第1及び第2の除算器、逆三角関
数演算器、三角関数演算器は、ROMによる関
数テーブルを用いてなる実用新案登録請求の範
囲第(1)項記載のデジタルAM復調回路。[Claims for Utility Model Registration] (1) A phase shifter that shifts the phase of an input AM signal sampled at a constant sampling period by 90° or -90°, and an output signal of the phase shifter that a first divider that performs division with the input AM signal; an inverse trigonometric function operator that performs an inverse trigonometric function operation on the output signal of the first divider; and an inverse trigonometric function operator that performs an inverse trigonometric function operation on the output signal of the inverse trigonometric function operator. A digital AM demodulation circuit comprising a trigonometric function calculator that performs calculations, and a second divider that divides the output signal of the trigonometric function calculator and the input AM signal or the output signal of the phase shifter. (2) The phase shifter, the first and second dividers, the inverse trigonometric function arithmetic unit, and the trigonometric function arithmetic unit use a ROM-based function table. Digital AM demodulation circuit.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20161384U JPH0141219Y2 (en) | 1984-12-25 | 1984-12-25 | |
US06/810,067 US4721904A (en) | 1984-12-25 | 1985-12-17 | Digital phase difference detecting circuit |
DE198585309519T DE186521T1 (en) | 1984-12-25 | 1985-12-30 | DIGITAL SWITCHING TO DISPLAY THE PHASE DIFFERENCE. |
EP85309519A EP0186521B1 (en) | 1984-12-25 | 1985-12-30 | Digital phase difference detecting circuit |
DE8585309519T DE3584565D1 (en) | 1984-12-25 | 1985-12-30 | DIGITAL CIRCUIT TO DISPLAY THE PHASE DIFFERENCE. |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20161384U JPH0141219Y2 (en) | 1984-12-25 | 1984-12-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61111213U JPS61111213U (en) | 1986-07-14 |
JPH0141219Y2 true JPH0141219Y2 (en) | 1989-12-06 |
Family
ID=30763571
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20161384U Expired JPH0141219Y2 (en) | 1984-12-25 | 1984-12-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0141219Y2 (en) |
-
1984
- 1984-12-25 JP JP20161384U patent/JPH0141219Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS61111213U (en) | 1986-07-14 |
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