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JPH01320830A - Impedance matching circuit - Google Patents

Impedance matching circuit

Info

Publication number
JPH01320830A
JPH01320830A JP15549288A JP15549288A JPH01320830A JP H01320830 A JPH01320830 A JP H01320830A JP 15549288 A JP15549288 A JP 15549288A JP 15549288 A JP15549288 A JP 15549288A JP H01320830 A JPH01320830 A JP H01320830A
Authority
JP
Japan
Prior art keywords
resistor
balanced
oscillator
circuit
bridge circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15549288A
Other languages
Japanese (ja)
Inventor
Akira Nakajima
朗 中島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP15549288A priority Critical patent/JPH01320830A/en
Publication of JPH01320830A publication Critical patent/JPH01320830A/en
Pending legal-status Critical Current

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  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To prevent deterioration in the talking quality caused by mismatching by providing an element whose resistance and capacitance are made variable to a balanced circuit network of a bridge circuit forming a telephone speech 10 and providing a circuit controlling automatically the values corresponding to the change in the line impedance. CONSTITUTION:When the bridge circuit 1 is not balanced, and when a signal of audible frequency is sent from an oscillator 17, the level at the receiver input terminal of the bridge circuit 1 is detected by a level comparator 18. Then a gate of a P-channel MOS transistor(TR) resistor 15 used in the nonsaturation region formed in the balanced circuit network 13 is driven by an output signal corresponding to the balance state of the level to vary the resistance of the MOS TR resistor 15. Moreover, the phase of the signal from the oscillator 17 by the line impedance 2 and the phase by the balanced network 13 are compared by a phase comparator 19 and an output signal corresponding to the phase difference varies the capacitance of the MOS capacitor 16.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はインピーダンス整合回路に関し、特に電話用ス
ピーチICのインピーダンス整合回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an impedance matching circuit, and particularly to an impedance matching circuit for a telephone speech IC.

〔従来の技術〕[Conventional technology]

従来、この種のインピーダンス整合回路は、ブリッジ回
路を回線側インピーダンスと固定の抵抗とコンデンサを
有する平衡回路網と第1の抵抗と第2の抵抗とで構成し
ていた。
Conventionally, in this type of impedance matching circuit, a bridge circuit has been configured with a line-side impedance, a balanced circuit network having a fixed resistor and a capacitor, a first resistor, and a second resistor.

第2図は従来のインピーダンス整合回路の一例の回路図
である。
FIG. 2 is a circuit diagram of an example of a conventional impedance matching circuit.

第2図に示すように、インピーダンスZt、の回線側イ
ンピーダンス2とインピーダンス整合回路の平衡回路網
5と抵抗値R,の第1の抵抗3と抵抗値R2の第2の抵
抗4とでブリッジ回路1.、を構成している。
As shown in FIG. 2, a bridge circuit is constructed by a line-side impedance 2 with an impedance Zt, a balanced network 5 of an impedance matching circuit, a first resistor 3 with a resistance value R, and a second resistor 4 with a resistance value R2. 1. , constitutes.

又、平衡回路網5は、抵抗値R3の抵抗6と容量Cのコ
ンデンサ7と抵抗値R4の抵抗8とから構成されている
The balanced circuit network 5 is composed of a resistor 6 having a resistance value R3, a capacitor 7 having a capacitance C, and a resistor 8 having a resistance value R4.

送話器9は回線側インピーダンス]と平衡回路網5との
接続節点と抵抗3と抵抗4との接続節点間に挿入され、
受話器10は抵抗3と抵抗4との両端間に接続される。
The transmitter 9 is inserted between the connection node between the line side impedance] and the balanced circuit network 5 and the connection node between the resistors 3 and 4,
A handset 10 is connected across resistors 3 and 4.

このブリッジ回路1aは、式(1)が成立するとき平衡
になる。
This bridge circuit 1a becomes balanced when equation (1) holds.

ZL XR2=ZBNl xR,+・べl)〔発明が解
決しようとする課題〕 上述した従来のインピーダンス整合回路は、固定の抵抗
やコンデンサを用いる平衡回路網でブリッジが構成され
ているのて、回線側インピーダンスが変化したとき、イ
ンピーダンスの整合がとれなくなり、不整合に起因する
送話器出力の反射による側音が大きくなり、従って、通
話時に自分の声のはね返りが大きくなったりエコーがか
がるなど、通話品質を劣化させるという欠点がある。
ZL When the side impedance changes, the impedances no longer match, and the sidetone due to the reflection of the transmitter output due to the mismatch becomes louder.Therefore, when making a call, your voice bounces more or you hear an echo. It has the disadvantage of deteriorating call quality.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のインピーダンス整合回路は、回線側インピーダ
ンスと非飽和領域で動作するMOSトランジスタ抵抗と
MOSコンデンサとを有する平衡回路網と第1の抵抗と
第2の抵抗とで構成され前記回線側インピーダンスと前
記平衡回路網との接続節点と前記第1の抵抗と前記第2
の抵抗との接続節点間を送話器出力端とし前記第1の抵
抗と前記第2の抵抗との両端間を受話器入力端とするブ
リッジ回路と、前記送話器出力端に接続される発振器と
、該発振器からの信号のそれぞれ前記受話器入力端にお
ける出力レベルを比較し該比較結果に応じて前記MO8
トランジスタ抵抗の抵抗値を可変するレベル比較器と、
それぞれの前記受話器入力端における前記発振器からの
信号の位相を比較し該比較結果に応じて前記MOSコン
デンサの容量を可変する位相比較器とを含んで構成され
る。
The impedance matching circuit of the present invention includes a line-side impedance, a balanced circuit network having a MOS transistor resistor operating in a non-saturation region, and a MOS capacitor, a first resistor, and a second resistor. a connection node with a balanced circuit network, the first resistor, and the second resistor;
a bridge circuit having a transmitter output terminal between the connection nodes with the resistor and a receiver input terminal between the first resistor and the second resistor; and an oscillator connected to the transmitter output terminal. and the output level of the signal from the oscillator at the input terminal of the handset, and depending on the comparison result, the MO8
A level comparator that changes the resistance value of the transistor resistor,
and a phase comparator that compares the phases of the signals from the oscillators at the respective receiver input terminals and varies the capacitance of the MOS capacitor according to the comparison result.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の回路図である。FIG. 1 is a circuit diagram of an embodiment of the present invention.

第1図に示すように、インピーダンスZLの回線側イン
ピーダンス2とインピーダンスZBNの平衡回路網13
と抵抗値R目の第1の抵抗11と抵抗値R1□の第2の
抵抗12とで構成され回線側インピーダンス2と平衡回
路網13との接続節点と抵抗11と抵抗12との接続節
点間を送話器9の送話器出力端とし抵抗11と抵抗12
との両端間を受話器10の受話器入力端とするブリッジ
回路1と、送話器出力端に接続される発振器17と、受
話器入力端の信号をそれぞれの入力とするレベル比較器
18と位相比較器19とを含んで構成される。
As shown in FIG. 1, a balanced circuit network 13 of line side impedance 2 of impedance ZL and impedance ZBN
between the connecting node between the line side impedance 2 and the balanced circuit network 13 and the connecting node between the resistor 11 and the resistor 12. be the transmitter output terminal of the transmitter 9, and the resistor 11 and the resistor 12
a bridge circuit 1 having both ends thereof as the handset input terminal of the handset 10, an oscillator 17 connected to the handset output end, and a level comparator 18 and a phase comparator each having a signal at the handset input end as input. 19.

又、平衡回路網13は抵抗値R13の抵抗14と、抵抗
値RTNがゲートに印加されるレベル比較器18の出力
により制御される非飽和領域で動作するPチャネル型の
MOSトランジスタ抵抗15と、容量C’vが位相比較
器1つの出力で可変されるMOSコンデンサ16とから
構成される。
Further, the balanced circuit network 13 includes a resistor 14 having a resistance value R13, and a P-channel MOS transistor resistor 15 that operates in a non-saturation region controlled by the output of a level comparator 18 to which a resistance value RTN is applied to the gate. It is composed of a MOS capacitor 16 whose capacitance C'v is varied by the output of one phase comparator.

ここでブリッジ回路1は式(2)が成立することによっ
て平衡となる。
Here, the bridge circuit 1 becomes balanced because equation (2) holds true.

Z t、 X R12= Z BNX R11・・・(
2) いま、発振器17から可聴周波数の信号を送出したとき
ブリッジ回路1が式(2)を満足していないと、ブリッ
ジ回路1の受話器入力端のレベルをレベル比較器18が
検出し、そのレベルのバランス状態に対応した出力信号
で平衡回路網13の中に構成されている、非飽和領域で
使われるPチャネル型のMOSトランジスタ抵抗15の
ゲートを駆動させて、MOSトランジスタ抵抗15の抵
抗値RTNを可変させる。
Z t, X R12= Z BNX R11...(
2) If the bridge circuit 1 does not satisfy equation (2) when an audio frequency signal is sent from the oscillator 17, the level comparator 18 detects the level at the receiver input terminal of the bridge circuit 1, and The gate of the P-channel type MOS transistor resistor 15 used in the non-saturation region, which is configured in the balanced circuit network 13, is driven by the output signal corresponding to the balanced state of Make it variable.

又、発振器17からの信号の回線側インピーダンス2に
よる位相と平衡回路網13による位相とを位相比較器1
つで比較して、その位相差に対応した出力信号で、MO
Sコンデンサ16の容量CVを可変する。
Further, the phase of the signal from the oscillator 17 due to the line side impedance 2 and the phase due to the balanced circuit network 13 are detected by the phase comparator 1.
With the output signal corresponding to the phase difference, MO
The capacitance CV of the S capacitor 16 is varied.

このように、受話器入力端における発振器17からの信
号のレベル並ひに位相を検出することにより、回線側イ
ンピータンス2のインピータンスZLの変化に対応して
平衡回路網13のインピーダンスZBNを自動的に変化
させて、ブリッジ回路1の平衡を保つことがてきる。
In this way, by detecting the level and phase of the signal from the oscillator 17 at the receiver input terminal, the impedance ZBN of the balanced circuit network 13 can be automatically adjusted in response to the change in the impedance ZL of the line side impedance 2. The balance of the bridge circuit 1 can be maintained by changing it to .

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、電話用スピーチICを構
成するブリッジ回路の平衡回路網に抵抗値及び容量値を
可変できる素子を設けこれらの値を回線側インピータン
スの変化に対応して自動的に制御する回路を設けること
により、通話時に回線側のインピータンスか変化しても
ブリッジ回路の平衡を保つことができるので、不整合に
起因する音声信号の反射や受話器への過大な音の漏れ等
の側音の発生を防止して通話品質を向上できる効果があ
る。
As explained above, the present invention provides an element that can vary the resistance value and capacitance value in the balanced circuit network of the bridge circuit constituting the telephone speech IC, and automatically adjusts these values in response to changes in line side impedance. By providing a control circuit to control the bridge circuit, it is possible to maintain the balance of the bridge circuit even if the impedance on the line side changes during a call, thereby preventing reflections of audio signals and excessive sound leakage to the handset due to mismatching. This has the effect of improving call quality by preventing the occurrence of sidetones such as

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロック図、第2図は従来
のインピータンス整合回路の一例のフロック図である。 1、]a・・・ブリッジ回路、2・・・回線側インピー
ダンス、3,4・・・抵抗、5・・・平衡回路網、6,
7・・・抵抗、8・・・コンデンサ、9・・・送話器、
10・・・受話器、11.12・・・抵抗、13・・・
平衡回路網、14・・・抵抗、15・・MOSトランジ
スタ抵抗、16・・・MOSコンデンサ、17・・・発
振器、18・・・レベル比較器、19・・・位相比較器
。 7  フツッソ゛回路、  2 回丸衆イFA’lイン
じ5り゛シZ、 フ支(イH器、fO交話器、/l /
Z、/4−抵抗、/、3子剰回露絹、IS#θ卦フシソ
7ヲ市に菊て1 )6 Na3コ〉デ゛ンブ、ノア全8
.113   l/へ=ル、l:JR’lS、   /
9 aatr*H1万 1 図 MZ  図
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a conventional impedance matching circuit. 1, ]a...Bridge circuit, 2...Line side impedance, 3, 4...Resistance, 5...Balanced circuit network, 6,
7... Resistor, 8... Capacitor, 9... Transmitter,
10...Telephone receiver, 11.12...Resistor, 13...
Balanced circuit network, 14...Resistor, 15...MOS transistor resistance, 16...MOS capacitor, 17...Oscillator, 18...Level comparator, 19...Phase comparator. 7 Futsusso circuit, 2 times Marushu IFA'l inji 5 Rishi Z, Fu branch (I H device, fO intercom, /l /
Z, /4-resistance, /, 3 children's surplus circulation silk, IS#θ trigram Fushiso 7 wo city ni chrysanthemum 1) 6 Na3 combination, Noah total 8
.. 113 l/he=le, l:JR'lS, /
9 aatr*H10,000 1 Figure MZ Figure

Claims (1)

【特許請求の範囲】[Claims]  回線側インピーダンスと非飽和領域で動作するMOS
トランジスタ抵抗とMOSコンデンサとを有する平衡回
路網と第1の抵抗と第2の抵抗とで構成され前記回線側
インピーダンスと前記平衡回路網との接続節点と前記第
1の抵抗と前記第2の抵抗との接続節点間を送話器出力
端とし前記第1の抵抗と前記第2の抵抗との両端間を受
話器入力端とするブリッジ回路と、前記送話器出力端に
接続される発振器と、該発振器からの信号のそれぞれ前
記受話器入力端における出力レベルを比較し該比較結果
に応じて前記MOSトランジスタ抵抗の抵抗値を可変す
るレベル比較器と、それぞれの前記受話器入力端におけ
る前記発振器からの信号の位相を比較し該比較結果に応
じて前記MOSコンデンサの容量を可変する位相比較器
とを含むことを特徴とするインピーダンス整合回路。
MOS operating in line side impedance and non-saturation region
A balanced circuit network including a transistor resistor and a MOS capacitor, a first resistor, and a second resistor, and a connecting node between the line side impedance and the balanced circuit network, the first resistor, and the second resistor. a bridge circuit having a transmitter output terminal between the connection nodes and a receiver input terminal between the first resistor and the second resistor, and an oscillator connected to the transmitter output terminal; a level comparator that compares the output level of the signal from the oscillator at each of the input ends of the handset and varies the resistance value of the MOS transistor resistor according to the comparison result; and a signal from the oscillator at each of the input ends of the handset; and a phase comparator that compares the phases of the MOS capacitor and varies the capacitance of the MOS capacitor according to the comparison result.
JP15549288A 1988-06-22 1988-06-22 Impedance matching circuit Pending JPH01320830A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15549288A JPH01320830A (en) 1988-06-22 1988-06-22 Impedance matching circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15549288A JPH01320830A (en) 1988-06-22 1988-06-22 Impedance matching circuit

Publications (1)

Publication Number Publication Date
JPH01320830A true JPH01320830A (en) 1989-12-26

Family

ID=15607232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15549288A Pending JPH01320830A (en) 1988-06-22 1988-06-22 Impedance matching circuit

Country Status (1)

Country Link
JP (1) JPH01320830A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459440A (en) * 1993-04-20 1995-10-17 Madge Networks Limited Automatic impedance matching with potential monitoring means

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459440A (en) * 1993-04-20 1995-10-17 Madge Networks Limited Automatic impedance matching with potential monitoring means

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