JPH01280360A - Manufacture of nonvolatile semiconductor memory device - Google Patents

Abstract

PURPOSE:To obtain a device whose tunnel window area is small without deteriorating the film quality of a tunnel oxide film by a method wherein a part to be used as the tunnel oxide film is formed in advance and a thick gate oxide film is formed around it by following a method to form a residual pattern. CONSTITUTION:A semiconductor substrate 11 is oxidized thermally; an insulating film 13, of a prescribed film thickness, as a tunnel oxide film is formed on the surface; a pattern layer of a two-layer structure composed of a polycrystalline silicon film 14 and an oxidation-resistant film 15 is formed selectively in an electron-injection and-emission region on the oxide film 13. In addition, this assembly is oxidized thermally by making use of said pattern layer as an oxidation-resistant mask; an insulating film 17 is grown up to a prescribed film thickness; said oxidation-resistant film 15 is removed; after that, a polycrystalline silicon film 18 to be used as a charge retention layer is formed on the whole surface. After that, e.g., the surface of the polycrystalline silicon layer 18 is oxidized; an insulating film 19 is formed; in addition, a third polycrystalline silicon layer 20 to be used as a control gate and a wiring layer is deposited; the third polycrystalline silicon layer 20, the insulating film 19 and the second polycrystalline silicon layer 18 are patterned; after that, a diffusion layer 21 is formed.

Description

[Detailed Description of the Invention] [Object of the Invention] (Field of Industrial Application) The present invention relates to a method of manufacturing a nonvolatile semiconductor memory device,
In particular, the present invention relates to a method of manufacturing a nonvolatile semiconductor memory device that has a thin tunnel oxide film in an element region and is electrically programmable and erasable.

(Prior Art) A nonvolatile semiconductor memory device that can be electrically written and erased is generally called an E2FROM.

This E2PROM generally has a thin oxide film called a tunnel oxide film in the element region, and stores information by accumulating charges in the floating gate through the tunnel oxide film.

FIG. 2 is a cross-sectional view of an element according to steps for explaining a conventional E2FROM manufacturing method.

First, a diffusion layer 2 is formed near the surface of a silicon substrate 1 using a well-known technique.

Then, a thick oxide film 3 is grown on the surface by thermal oxidation, and a resist 4 is applied thereon. This resist 4 is exposed to light to provide an opening (tunnel window) 4a (Fig. 2(a)
)). Next, using the resist 4 as a mask, the oxide film 3 under the opening 4a is removed to form a tunnel window, and then the resist 4 is removed.
After removal, thermal oxidation is performed to grow a thin oxide film 5 within the tunnel window. Then, a first polycrystalline silicon layer 6, which will become a floating gate, is deposited on the entire surface (Fig. 2(b)).
).

Thereafter, as shown in FIG. 2(c), an insulating film 7 is formed on the entire surface, and then a second polycrystalline silicon layer 8, which will become a control gate, is deposited. Next, as shown in FIG. 2(d), a gate electrode is patterned using a resist, and the second polycrystalline silicon layer 8, insulating film 7, and first polycrystalline silicon layer 6 are sequentially removed to form a second polycrystalline silicon layer. Diffusion layer 11 is formed by ion implantation into silicon substrate 1 using layer 8 as a mask.

In this way, E2 having a thin oxide film 5 on the tunnel window
A PROM is formed.

Generally, in a nonvolatile semiconductor memory device having a tunnel window, it is desirable to make the area of the tunnel window as small as possible. However, in the conventional manufacturing method, since the tunnel window is patterned using the resist punching pattern shown in FIG. 2(a), the critical minimum area tends to become large.

Also, when patterning the tunnel window, a resist is used as a mask to remove the thick oxide film.
If wet etching using ammonium fluoride (NH4F) or the like is used, the tunnel window becomes larger than the width of the resist pattern.

Furthermore, since the thick oxide film within the tunnel window is removed using a resist as a mask, a thin tunnel oxide film cannot be formed immediately after the silicon substrate is exposed. This causes deterioration in the withstand voltage of the thin tunnel oxide film.

Furthermore, since the thin tunnel oxide film is formed after the resist removal step, the stripped resist mixes into the thin tunnel oxide film when the oxide film is formed, which tends to cause 19 staining.

(Problems to be Solved by the Invention) As explained above, the conventional manufacturing method has problems in that the critical minimum area of the tunnel window increases and the breakdown voltage of the thin tunnel oxide film deteriorates.

The present invention has been made to solve the problems of the prior art, and provides a manufacturing method for obtaining a nonvolatile semiconductor memory device that does not cause deterioration of the quality of the tunnel oxide film and has a small tunnel window area. The purpose is to provide

[Structure of the invention]

(Means for Solving the Problems) According to the method of manufacturing a semiconductor memory device according to the present invention, a step of thermally oxidizing a semiconductor substrate to form an insulating film of a predetermined thickness as a tunnel oxide film on the surface; A step of selectively forming a two-layer patterned layer consisting of a polycrystalline silicon film and an oxidation-resistant film in the electron injection/emission region on the oxide film, and thermally oxidizing the insulating film using the patterned layer as an oxidation-resistant mask. This method includes a step of growing a film to a predetermined thickness, and a step of depositing polycrystalline silicon to serve as a charge retention layer over the entire surface after removing the oxidation-resistant film.

(Function) In the present invention, a portion that will become a tunnel oxide film is formed in advance, and a thick gate oxide film is formed around it according to the method for forming a remaining pattern. Therefore, the tunnel window region can be formed finely, and since the polycrystalline silicon in the tunnel window region can be simultaneously oxidized when forming a thick gate oxide film, the tunnel window region can be formed even finer.

(Example) A method of manufacturing a nonvolatile semiconductor memory device of the present invention will be described below with reference to the drawings.

FIG. 1 is a cross-sectional view of an element according to steps for explaining the manufacturing method of the present invention.

First, as shown in FIG. 1(a), a diffusion layer 12 is selectively formed in a predetermined region near the surface of a silicon substrate 11. Then, as shown in FIG.

Then, due to thermal oxidation, a thin oxide film of about 100 layers is formed on the surface1.
Grow 3.

Next, a first polycrystalline silicon layer 14 and a nitride film 1 are formed on the surface.
5 are sequentially deposited by the CVD method, and a resist 16 patterned in correspondence with the tunnel window portion is formed thereon (FIG. 1(b)).

Thereafter, as shown in FIG. 1C, the nitride film 15 and first polycrystalline silicon layer 14 are removed by a method such as reactive ion etching (RIE) using the patterned resist 16 as a mask.

Next, as shown in FIG. 1(d), a thick oxide film 17 of about 400 nm is grown on the thermal oxide film 13 and on the sidewalls of the polycrystalline silicon layer 14 by thermal oxidation. At this time, the oxidation of the side wall portion also spreads inward, making the tunnel window even smaller. At this time, since the nitride film 15 is an oxidation-resistant film, almost no oxide film is formed thereon. Then, the nitride film 15 used for this selective oxidation is selectively removed using heated phosphoric acid or the like.

After that, a second polycrystalline silicon layer 18 that will become a floating gate is deposited on the entire surface, and the surface of the second polycrystalline silicon layer 18 is oxidized by a thermal oxidation method to form an insulating film 19.
Furthermore, a third polycrystalline silicon layer 20, which will serve as a control gate and wiring layer, is deposited to obtain a structure as shown in FIG. 1(e).

Thereafter, according to a well-known technique, a resist is applied, and using the resist as a mask, the third polycrystalline silicon layer 20 and the insulating film 1 are formed.
9. The second polycrystalline silicon layer 18 is sequentially removed to pattern the gate electrode.

Then, using the polycrystalline silicon layer 20 of the node 3 as a mask, ion implantation is performed to form a diffusion layer 21 on the silicon ribbon substrate 11,
A structure as shown in FIG. 1(f) is obtained.

The electrodes are formed by a well-known method as follows.
Form 2FROM.

In the above embodiments, a nitride film is used as the oxidation-resistant film, but other oxidation-resistant films may be used.

〔Effect of the invention〕

As described above in detail based on the embodiments, in the present invention, the resist patterning of the tunnel window is left intact and the pattern is formed, so it is possible to reduce the pattern area of the tunnel window. Furthermore, since a thin tunnel oxide film is grown first, there is no need for steps such as removing the resist after exposing the silicon substrate.

Therefore, no contamination occurs, and the tunnel oxide film can be formed continuously.

Further, when a thick oxide film is formed by thermal oxidation, the floating gate formed by the polycrystalline silicon layer of the tunnel window is oxidized, so the area of the tunnel window is further reduced, the capacitance is reduced, and performance can be improved.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of an element according to steps for explaining a method of manufacturing a nonvolatile semiconductor memory device according to the present invention, and FIG. 2 is a cross-sectional view of an element according to steps for explaining a conventional manufacturing method. 11... Silicon substrate, 12... Diffusion region, 13.
... Thin oxide film (tunnel oxide film), 14... First polycrystalline silicon layer, 15... Nitride film, 16... Resist, 17... Thick oxide film (gate oxide film), 18.・
・Second polycrystalline silicon layer, 19...insulating film, 20...
- Third polycrystalline silicon layer, 21...diffusion region. Applicant's agent Mr. Sato

Claims (1)

[Claims] A process of thermally oxidizing a semiconductor substrate to form an insulating film of a predetermined thickness as a tunnel oxide film on the surface, and a two-layer process consisting of a polycrystalline silicon film and an oxidation-resistant film in the electron injection/emission region on the oxide film. a step of selectively forming a patterned layer of the structure; a step of thermally oxidizing the insulating film to a predetermined thickness using the patterned layer as an oxidation-resistant mask; and a step of growing the insulating film to a predetermined thickness after removing the oxidation-resistant film. A method for manufacturing a nonvolatile semiconductor memory device, comprising the step of depositing polycrystalline silicon to serve as a charge retention layer.