JPH01268303A - Offset canceling circuit - Google Patents

Abstract

PURPOSE:To suppress the turn-in quantity of power source noise to an output by bringing a signal to balance input to a positive phase input and an opposite phase input of an amplifier by an emitter follower of the same driving impedance. CONSTITUTION:As for a signal which has been inputted from a base of a transistor 7, an output of a positive phase is fetched as an emitter follower output from an emitter, and an output of an opposite phase is brought to level shift and fetched from a collector by an emitter follower consisting of a transistor 10, a diode 11 and a resistance 12. When a DC component of a positive phase output of an amplifier 13 has a higher offset than that of a DC component of an opposite phase output, an output voltage of an amplifier 18 rises, a DC component of a signal applied to the opposite phase input drops, a DC component of the positive phase output drops, and the offset can be canceled. In such a way, the signal is brought to balance input to a positive phase input and a reverse phase input of the amplifier 13 by the emitter follower of almost the same driving impedance, therefore, the turn-in quantity of a power source noise of both the inputs is canceled by the same phase component elimination ratio of the amplifier 13.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to electronic circuits, and particularly to an offset canceling circuit with excellent resistance to power supply noise.

[Conventional technology]

An example of a conventional offset cancel circuit is shown in FIG. 2 and will be described.

In the figure, 21 is an input terminal, 22 is a positive phase output terminal, 2
3 is a negative phase output terminal, 24.25a is an amplifier, 26.28 is a resistor, and 27 and 29.30 are capacitors.

Then, the output offset of the amplifier 24 detected by the low-pass filter each composed of a resistor 26 and a capacitance of 2 g is applied to the amplifier 25, negative feedback is applied to the negative phase input of the amplifier 24, and the output of the amplifier 24 is Configured to cancel offsets.

[Problem to be solved by the invention]

In the conventional offset canceling circuit described above, in order to cancel the offset by directly applying negative feedback of only the DC component to the negative phase input of the amplifier 24, it is necessary to ground the negative phase input with a capacitor.

Here, consider a case where there is power supply noise inside the amplifier 24. Since the negative phase input of the amplifier 24 is grounded through a capacitor, it is possible to suppress the amount of power supply noise going around. but,
With positive phase input, a signal is input, so it cannot be grounded with capacitance.
Unable to suppress the amount of power supply noise input.

Therefore, there is a difference in the amount of power supply noise looping between the positive phase input and the negative phase input of the amplifier 24, and this difference is amplified and output, so there is a problem that the amplifier 24 is vulnerable to power supply noise.

[Means for Solving the Problems] In the offset canceling circuit of the present invention, the collector
A first transistor connected to a power supply, and a second transistor connected to the other end.
a second transistor having an emitter connected to a first resistor connected to a power supply and a base connected to an input terminal; one end connected to the emitter of the first transistor and the other end connected to the second transistor; a second resistor connected to the collector; a third transistor having a collector connected to the first power supply and a base connected to the collector of the second transistor; and an anode connected to the emitter of the third transistor. a third resistor whose negative end is connected to the second power source and whose other end is connected to the cathode of the diode, whose positive phase input is connected to the emitter of the second transistor and whose negative phase input is connected to the second transistor. The cathode of the diode is connected to the connection point of the third resistor, the positive phase output is connected to the positive phase output terminal and the input of the first low pass filter, and the negative phase output is connected to the negative phase output terminal and the second low pass filter. a first amplifier connected to the input of the pass filter; a positive phase input connected to the output of the first low pass filter; and a negative phase input connected to the output of the second low pass filter; A second amplifier having an output connected to the base of the first transistor is included.

[For production]

In the present invention, the bias of the positive phase input of the signal system amplifier is determined by the bias of the signal input, and the bias of the negative phase input is determined by the output bias of the Jansell amplifier during offset, so that the output of the first amplifier is determined by the bias of the signal input. The offset is canceled and signals are input in a balanced manner to the positive phase input and the negative phase input of this first amplifier using emitter followers having the same drive impedance.

〔Example〕

Embodiments of the present invention will be described in detail below based on the drawings.

FIG. 1 is a circuit diagram showing an embodiment of an offset cancel circuit according to the present invention.

In the figure, 1 is an input terminal, 2 is a positive phase output terminal, 3 is a negative phase output terminal, and 4 and 5 are power supply terminals.

6 is an NPN transistor whose collector is connected to power supply terminal 4; T is N whose emitter is connected to resistor 8 whose other end is connected to power supply terminal 5; and whose base is connected to input terminal 1.
A PN type transistor, 9 is a resistor connected to the 8 terminal of the transistor and the other end is connected to the collector of the transistor T, 10 is an NPN type transistor whose collector is connected to the power supply terminal 4 and whose base is connected to the collector of the transistor 7. , 11 is a diode that connects node 7 to the emitter of transistor 10, and 12 has one end connected to power supply terminal 5.
A resistor 13 connects the positive phase input to the emitter of the transistor T, and connects the negative phase input to the connection point between the cathode of the diode 11 and the resistor 12, and connects the positive phase output to the positive phase input. Phase output terminal 2 and resistor 1
an amplifier 18 connected to an input of a low-pass filter consisting of a resistor 16 and a capacitance 15;
connects the positive phase input to the output of a low pass filter consisting of resistor 14 and capacitor 15, connects the negative phase input to the output of the low pass filter consisting of resistor 16 and capacitor 17, and connects the positive phase output to transistor 60 pace. It's an amplifier.

The transistor 7 and the resistors 8 and 9 constitute a common emitter amplifier, and the transistor 70 is connected to the input terminal 1 of this circuit.

A level shift circuit is constituted by a transistor 10, a diode 11, and a resistor 12, which connect the collector of the transistor T to the pace. Further, the amplifier 13 uses the emitter output of the transistor T as a positive phase input, and the output of the level shift circuit as a negative phase input, and the positive phase output and the negative phase output serve as outputs of this circuit.

In addition, as mentioned above, the resistor 14 and the capacitor 15° resistor 16
and a capacitor 17 constitute a low-pass filter, each input of these low-pass filters is connected to the positive-phase output and the negative-phase output of the amplifier 13, and each output of this low-pass filter is connected to the amplifier 13. 18 positive phase inputs and negative phase inputs, respectively. The output of this amplifier 18 is connected to the pace of a transistor 6, and the emitter of this transistor 6 is connected to the collector of a transistor T via a resistor 9, thereby forming an offset cancellation circuit.

Next, the operation of the embodiment shown in FIG. 1 will be explained.

First, when a signal is input to the transistor T, a positive phase output is taken out from the emitter as an emitter follower output, and an opposite phase output from the collector is taken out from the transistor T.
and an emitter follower consisting of a diode 11 and a resistor 12.
It is added to the positive phase input and negative phase input of No.3. Then, the positive phase output and the negative phase output of this amplifier 13 become the final output.

Here, if there is an offset in which the DC component of the positive-phase output of the amplifier 13 is higher than the DC component of the negative-phase output, the DC voltage detected by the low-pass filter composed of the resistor 14 and the capacitor 15 will be When the DC voltage detected by the low-pass filter constituted by 16 and capacitor 17 is also higher, the output voltage of amplifier 18 increases.

Next, when the output voltage of the amplifier 18 increases, the emitter potential of the transistor 6 and the collector potential of the transistor T increase. Therefore, as the DC component of the signal applied to the negative phase input of the amplifier 13 increases, the DC component of the positive phase output decreases, making it possible to cancel the offset.

Since signals are input in a balanced manner to the write inputs of the positive-phase input and the negative-phase input of the amplifier 13 using emitter followers with approximately the same drive impedance, the amount of power supply noise input to the write input is reflected by the common-mode component rejection ratio of the amplifier 13. It will be cancelled.

〔Effect of the invention〕

As explained above, in the present invention, the bias of the positive phase input of the signal system amplifier is determined by the bias of the signal input, and the bias of the negative phase input is determined by the output bias of the offset canceling amplifier. By canceling the output offset of the amplifier and inputting signals to the positive-phase input and negative-phase input of this first amplifier in a balanced manner through emitter followers with the same drive impedance, wideband Km! This has the effect of suppressing the amount of power supply noise that feeds into the output.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an offset cancel circuit according to the present invention, and FIG. 2 is a block diagram showing an example of a conventional offset cancel circuit. 1φ...input terminal, 2...positive phase output terminal, 3@.
・・Negative phase output terminal, 4.5−・・Input power terminal, 6.7−
@ψ@NPN school transistor, 8°9I...resistance, 1
0... NPN transistor, 11-... Diode, 12... Φ resistor, 13... Amplifier, 14...
・・・Resistance, 15・Written・−Capacitance, 16・・・・Resistance, 1
T... Reference Capacity, 18... Amplifier.

Claims (1)

[Claims] a first transistor whose collector is connected to a first power supply; a second transistor whose emitter is connected to a first resistor whose other end is connected to a second power supply and whose base is connected to an input terminal; a second resistor having one end connected to the emitter of the first transistor and the other end connected to the collector of the second transistor; a collector connected to the first power supply and a base connected to the collector of the second transistor; a third transistor connected to the emitter of the third transistor, a diode having an anode connected to the emitter of the third transistor, and a third resistor having one end connected to the second power supply and the other end connected to the cathode of the diode. , the positive phase input is connected to the emitter of the second transistor, the negative phase input is connected to the connection point between the cathode of the diode and the third resistor, and the positive phase output is connected to the positive phase output terminal and the first low frequency transistor. a first amplifier connected to an input of a pass filter and having a negative phase output connected to a negative phase output terminal and an input of a second low pass filter; and a positive phase input connected to an output of the first reduced pass filter. An offset cancellation circuit comprising a second amplifier having a negative phase input connected to the output of the second low-pass filter and a positive phase output connected to the base of the first transistor.