JPH01264214A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a manufacturing technology for semiconductor devices, and in particular to SQ I
The present invention relates to a technique that is effective when applied to improving the reliability of a semiconductor device having a (sil (H-on-insulator) structure).

[Conventional technology]

Regarding Sol technology, which forms integrated circuits in silicon single-crystal thin films grown on insulating substrates, see, for example, "Applied Physics Letters (^ppl, Phys.
, Lett), 40 J (1982), P2S
It is stated in 5.

In order to form a silicon single crystal film on an insulating substrate when manufacturing a semiconductor device having the above-mentioned SOI structure, a silicon film made of polysilicon or amorphous silicon is deposited on the insulating substrate, and then this single crystal silicon film is deposited on the insulating substrate. A method of converting the data is used.

In addition, in order to make a silicon film into a single crystal, it is necessary to irradiate it with a laser beam or heat it with a carbon heater.
A so-called melt recrystallization method (zone melt method), which locally melts a silicon film, is known.

[Problem to be solved by the invention]

Semiconductor devices with an SOI structure have excellent advantages such as reducing parasitic capacitance, improving latch-up resistance, and making it easier to create three-dimensional integrated circuits because it enables complete isolation between elements. However, in order to effectively utilize these advantages, the biggest challenge is how to form a high-quality silicon single crystal film on an insulating substrate.

However, with the current melt recrystallization method, it is difficult to control the grain boundaries that occur in the silicon film, so it is extremely difficult to form a uniform single crystal over a wide area. This is a major cause of hindering practical application.

The present invention has been made in view of the above-mentioned problems, and its purpose is to provide a technique that can improve the element characteristics and reliability of a semiconductor device having a Sol structure.

Another object of the present invention is to provide an element region according to a mask pattern;
It is an object of the present invention to provide a technology capable of forming isolation regions and to enable high integration of elements.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

A brief overview of typical inventions disclosed in this application is as follows.

That is, by patterning a silicon film made of polysilicon or amorphous silicon formed on the surface of an insulating substrate, a large number of small regions separated from each other are formed, and then each small region is heated and melted to become a single crystal. Then, an insulating film is buried between each small region.

[Effect]

According to the above-described means, since a small area silicon film is heated and melted, a uniform silicon single crystal film without grain boundaries can be obtained.

〔Example〕

FIGS. 1(a) to 1(e) are sectional views of main parts of a silicon wafer showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

The insulator substrate 1 used in this example is a silicon wafer 2 made of silicon single crystal having a predetermined film thickness.
A Ch film 3 is formed.

To form the 5102 film 3 on the surface of the silicon wafer 2, for example, the silicon wafer 2 may be thermally oxidized, or
A 5in2 film 3 may be deposited on the surface using the CVD method.

First, using the CVD method, a silicon film 4 made of polysilicon or amorphous silicon having a thickness of several hundred nm, for example, is deposited on the surface of the Sin film 3 (see FIG. 1(a)). ).

Next, the silicon film 4 is patterned according to the device structure by etching using a photoresist as a mask.

That is, the silicon portion corresponding to the isolation region is removed by etching, leaving the portion corresponding to the element region. In this way, a large number of small regions 5 separated from each other at predetermined intervals are formed (Fig. 1 et al.)).

Note that it is preferable to use reactive ion etching, which has strong anisotropy, for the patterning. This makes it possible to form isolation regions and element regions according to the mask pattern.

Here, the area of each small region 5 and the interval between small regions 5 are selected according to the type and characteristics of the circuit element formed in each small region 5. For example, for the small head region 5 in this embodiment, The area is approximately several tens of μm×several tens of μm.

Next, by irradiating each small region 5 with an energy beam such as a laser beam or an electron beam, each small region 5 is heated and melted to form a single crystal. In this way, single-crystal element regions 6 separated from each other at predetermined intervals are formed (FIG. 1(C)).

In this way, by dividing the silicon film 4 made of polysilicon or amorphous silicon into a large number of small regions 5 having extremely small areas, and then heating and melting each small region 5, a large area of silicon can be formed as in the conventional method. Unlike the case where the film is heated and melted, a uniform silicon single crystal film without grain boundaries can be obtained.

Note that it is also possible to single-crystallize the small region 5 by heating using a carbon heater instead of using an energy beam such as the laser beam or electron beam.

Next, an insulating film 7 for element isolation is buried between each of the element regions 6 which have been made into single crystals in this way, and the surface of the insulating substrate 1 is flattened (FIG. 1(d)).

In order to embed the element isolation insulating film 7 between each element region 6, it is sufficient to deposit a 5i(h) film on the entire surface of the insulating substrate l using, for example, the CVD method. By etching back the 5102 film using highly efficient reactive ion etching (RIE) to expose the upper surface of each element region 6, the surface of the insulator substrate 1 can be planarized.

In this way, each element region 6 made of silicon single crystal
After insulating them from each other with an element isolation insulating film 7, a desired circuit element is formed inside each element region 6 according to a conventional method.

For example, when forming an MO3 type semiconductor integrated circuit,
As shown in FIG. 1(e), after sequentially forming a gate oxide film 8 and a gate electrode 9 made of polysilicon, etc., impurities such as arsenic (As) are diffused into the element region 6 to form source and drain regions. Region 10 is formed and MO5FET II is formed. Next, phosphosilicate glass (PS
Form an interlayer insulating film and Al wiring made of G) etc.
Complete MO3LSI.

Note that when diffusing the impurity into the element region 6, if the impurity is diffused until it comes into contact with the 5iOz film 3 below the element region 6, the parasitic capacitance of the diffusion layer can be significantly reduced.

As described above, according to this embodiment, the following effects can be obtained.

(1) Silicon film 4 formed on the surface of insulator substrate 1
When the silicon film 4 is heated and melted to become a single crystal, the silicon film 4 is separated into a large number of small regions 5 with minute areas, and then each small region 5 is heated and melted, so that uniform silicon without grain boundaries is formed. A single crystal film is obtained.

(2) Due to (1) above, it is possible to form circuit elements within a high-quality silicon single crystal film, which improves device characteristics such as reducing junction leakage current of a semiconductor device having an SOI structure. Improved reliability.

(3) When dividing the silicon film into small regions, each region is patterned to become an element region, so there is no need to form isolation regions later, which simplifies the process.

As above, the invention made by the present inventor has been specifically explained based on Examples, but the present invention is not limited to the above-mentioned Examples, and it is understood that various changes can be made without departing from the gist thereof. Needless to say.

For example, as shown in FIG. 2, a flat 5iCh film 3 is deposited on the surface of the semiconductor device obtained in the above example, and circuit elements are formed on the surface by the same process as in the example. , three-dimensional semiconductor devices can be easily achieved. In this case, the first layer MOSFET is S6
The MO3FET 13 does not have to be one structure, and may be an MO3FET 13 formed on a normal Si substrate, as shown in FIG.

Furthermore, the method of burying the isolation trench shown in FIG. 1(6) is not limited to this embodiment, and may be any other method used in normal device isolation methods. Further, the material of the element isolation insulating film 7 is not limited to Sin, but may be polysilicon. In that case, it is necessary to oxidize the inner wall of the trench before filling it with polysilicon.

In addition to the above-mentioned isolation trench, a part of the element region 6 is
The isolation region may be formed by oxidation using the CO5 method.

In addition, although the embodiment has been explained by taking the formation of an N-channel MOSFET as an example, the MOSFET may be of a P-channel type, and a CMOS (Complementary Menu) consisting of an N-channel FET and a P-channel FET
ry Metal Oxide Sem1conduc
tor).

Furthermore, the present invention is applicable not only to MO3LSI but also to bipolar LSI.
It is also applicable to SI.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

That is, when forming circuit elements in a silicon single crystal film formed on the surface of an insulating substrate, the silicon film made of polysilicon or amorphous silicon formed on the surface of the insulating substrate is patterned and separated from each other. By forming a large number of small regions and then heating and melting each small region to form a single crystal, a uniform silicon single crystal film without grain boundaries can be obtained, which reduces the junction leakage current of a semiconductor device with a Sol structure. can be reduced, and device characteristics and reliability are improved.

[Brief explanation of the drawing]

FIGS. 1(a) to (e) are cross-sectional views of main parts of a silicon wafer showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. FIGS. FIG. 2 is a sectional view of a main part of a silicon wafer. 1... Insulator substrate, 2... Silicon wafer, 3...
・SiO□ film, 4... silicon film, 5... small area,
6... Element region, 7... Insulating film for element isolation, 8...
・Gate oxide film, 9... Gate electrode, 10... Source/drain region, 11.12.13... MOSFE
T. Figure 1 (e) Figure 2 Figure 3

Claims (1)

[Claims] 1. When forming a predetermined circuit element in a silicon single crystal film formed on the surface of an insulating substrate, silicon made of polysilicon or amorphous silicon formed on the surface of the insulating substrate The method is characterized by forming a large number of small regions separated from each other by patterning the film, heating and melting each of the small regions to form a single crystal, and then embedding an insulating film between each of the small regions. A method for manufacturing a semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the small region has the same shape as an element region. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the insulating substrate is a wafer made of single crystal silicon with an insulating film formed on the main surface thereof.