JPH01263725A - Program processor - Google Patents

Abstract

PURPOSE:To search a processing position to need execution without reading a step to become unnecessary at the time of executing a conditions instruction by placing a pointer to show a position to be executed when a conditions sentence is false immediately after the intermediate code of an IF sentence. CONSTITUTION:When a code converted to an intermediate code is an 'IF' instruction, '1' is held at an F/F circuit 8 by the output of an IF detecting part 7. A control part 2 advances an address controller 6 to a next address, inserts a dummy code to a storing part 5 and stores an address '01' to a temporary storing part 9. When an ELSE detecting part 10 detects the intermediate code of 'ELSE,' the condition of the F/F circuit 8 is watched, and an IF instruction is detected, a difference '09' between an address oa and an address 01 of the intermediate code of the 'ELSE' is calculated and written to the temporary storing part 9. The conditions instruction is executed, the execution after 'THEN' is unnecessary, and then, the address 01 is added to address information '09' and the position, in which the intermediate code of the 'ELSE' is stored, can be known.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a program processing device capable of efficiently executing conditional commands in a programmable computer into which a program can be input.

(Prior Art) In a programmable computer that can input a program, for example, in the RASIC language, there is an IF which is a conditional instruction.
There are expressions such as "A=1" as conditional expressions of sentences. These conditional commands are, for example, when the judgment result is "YES", [THE
Steps after NJ, "When NOJ, the steps after ELsEJ are processed. Also, if the judgment result is rNO, follow the conditional expression < rTHENJ
The subsequent steps do not need to be executed.

(Problem to be solved by the invention) However, in order to search for the location of the code indicating rELSEJ, there is no need to execute it. was consumed. To explain in more detail in Fig. 4, Fig. 4 a shows the key human power.
"OD" at address 1/s 15 indicates the storage state of the program data immediately after inputting the F statement program.
indicates a break from the next instruction: j-do. Figure 4b
fL'i, statement of the program in Figure 1a'
r It is a diagram converted into intermediate code. If the program of this IF statement is executed and the judgment result is "NO", then "THEN" is executed.
Read j and do not execute subsequent steps JELSE
In the step after j, the task of assigning 20 to variable C is executed. 1~Kashi, [t, To search for the position of the code indicating sEJ, press “B” “...”0 after “THEN”
``It is necessary to call Ill one by one to find the position of the code indicating JELSEj at address 1/s09.

This invention was made in consideration of the points mentioned in -! 1. The purpose is to provide a program processing device that can search for a processing position that requires execution without reading steps that are unnecessary while waiting for the execution of a conditional instruction.

(Means for Solving All Problems) The program processing device of the present invention includes an input means for inputting program data, a storage means for storing the program data input from the input means, and a storage means for storing the program data input from the input means. address instruction means for sequentially reading the stored program data; program execution means for executing the program data read by the address instruction means;
a first detection means for detecting that a conditional command has been input by the program input means; a second detection means for detecting a command to be executed when the condition is negative; It is characterized by comprising a calculation means for calculating the positional relationship between the address information of the instruction to be executed detected by the means and the address information of the conditional instruction detected by the first detection means. do.

(Operation) A pointer indicating the position to be executed when the conditional statement is false is placed immediately after the intermediate code of the IF statement, and when the conditional statement is false, the pointer is immediately used to find the position to be executed.

(Embodiment) Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 to 3. In FIG. 1, numeral 1 denotes an input section equipped with alphabet keys, function keys, numeric keys, delimiter code input keys, etc. Program data input from the input section 1 is stored in a storage section 5 that can be read and written by the control section 2. Write the program data to the address specified by the address controller) and roller 6, and at the same time
Program data is also sent from the control section 2 to a display section 3 consisting of a CD or the like, so that the program data can be displayed and checked. Reference numeral 7 denotes an IF detection section that detects the intermediate code of the FJ instruction, and its output is held in the F/F circuit 8. Reference numeral 9 denotes a temporary storage unit that temporarily stores the address of a dummy code, which will be described later. 10 is [EL S E
This is an ELSE detection unit that detects the intermediate code of j.

FIG. 2a shows a state in which program data similar to that of the prior art described above is input from the input section 1 and stored in the storage section 5. When the delimiter code is input, the input program data is transferred to Atto 1/S controller 6.
The statement is read into the control unit 2 and is converted into intermediate code and written. (Figure 3 Sl, S2.
53. S4) Then, if the code converted to the intermediate code is an [F1 instruction, the F/
1 is held in the F circuit 8.

(Figures 2 and 35) When the 1F detection unit detects the [I FJ instruction, the control unit 2 advances the 7-dress controller 6 to the address next to the intermediate code of the rIFj instruction and stores the dummy code in the storage unit 5. and (01), which is the at1 nos of the dummy code, is temporarily stored in the - hour storage section 9.

(Fig. 2 C2 Fig. 3 56) At the same time as this operation, the ELSE detection section
Detect all intermediate codes of E j.

(Fig. 2 C2 Fig. 3 57) [When the intermediate code of ELSEj is detected, the F/F circuit 8
It is determined whether an IF command has been detected by looking at the state of .

(Fig. 3, 5S) If the 1F instruction is detected, calculate the difference (Oa-01=09) between the address (Oa) of the intermediate code of LsEJ and the address (01) stored in the -time storage unit 9. The arithmetic unit 4 calculates the result and writes it to the address where the gummy code is stored in the temporary memorization unit 9 as address information up to the intermediate code of "ELSE".

(Fig. 2 e, Fig. 3 59) Repeat this operation up to the delimiter code (Fig. 2 f,
510 in Figure 3) When this conditional instruction is executed and the execution of the steps after THENJ is unnecessary, the address information (09 ) by adding the address (01) where the dummy code is stored to (o1+O(+=or)[E
The intermediate code of LsEJ can be stored and the position to be discussed can be known, and by replacing the address with the address of the address controller, the intermediate code of "ELSE" can be stored without reading the program data of unnecessary steps. It is possible to search for a location and perform high-speed processing.

(Effects) As explained in detail above, according to the program processing device of the present invention, a pointer indicating the position to be executed when the conditional statement is false is placed immediately after the intermediate code of the IF statement, so the IF You can measure the speed of sentences.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a programmable computer into which a program can be input, showing an embodiment of the invention. FIG. 2 is a diagram showing the storage state of the program disk of the invention. FIG. 3 is a detailed explanation of the invention. FIG. 4 is a flowchart showing the storage state of a program disk in the prior art. l: Input section 2: Control section 3: Display section 4: Calculation section 5
: Storage section 6: Address controller 7: IF detection section
8: Flip-flop circuit 9 d Temporary storage section 1 o
: ELSE Detection Department Representative Patent Attorney Takeshi Sugiyama (
1 other person) G1 figure 32♂

Claims (1)

[Scope of Claims] 1. In a programmable computer into which a program can be input, an input means for inputting program data, a storage means for storing program data input from the input means, and the storage means address instruction means for sequentially reading out program data stored in the address instruction means; program execution means for executing the program data read by the address instruction means; and detection of input of a conditional command by the program input means. a first detection means for detecting an instruction to be executed when the condition is negative; a second detection means for detecting an instruction to be executed when the condition is negative; and address information of the instruction to be executed detected by the second detection means and the above. calculation means for calculating the positional relationship between the conditional instruction detected by the first detection means and the address information, and storing the calculation result at an address after the conditional instruction detected by the first detection means. A program processing device characterized by: