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JPH01262649A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH01262649A
JPH01262649A JP63090265A JP9026588A JPH01262649A JP H01262649 A JPH01262649 A JP H01262649A JP 63090265 A JP63090265 A JP 63090265A JP 9026588 A JP9026588 A JP 9026588A JP H01262649 A JPH01262649 A JP H01262649A
Authority
JP
Japan
Prior art keywords
fins
semiconductor device
resin
package
sections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63090265A
Other languages
Japanese (ja)
Inventor
Yoshiteru Kitayama
北山 美照
Kiyoshi Usui
臼井 清
Yoshio Arima
有馬 良雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63090265A priority Critical patent/JPH01262649A/en
Publication of JPH01262649A publication Critical patent/JPH01262649A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To lower stress generated by bending in fin sections and to prevent the spreading of sections among the fins and the crack of a resin mold package by projecting the tabular fins from the resin package for a resin seal type semiconductor device and forming through-holes in the direction of the plate thickness of the projecting sections from the package of the fins. CONSTITUTION:Slots 11a are shaped to fins 11 projected from a resin mold package 101 for a semiconductor device, and the size of the slots 11a is set by the width and plate thickness of the fins 11. Approximately half the width of the fins 11 is excellent in thermal conductivity and strength and the like. In a lead frame 12 for an IC in which the semiconductor device is assembled, the fins 11 are shaped previously at the same time as the punching of the lead frame to projecting sections from the mold package 101. Since the slots 11a are formed to the fins 11, stress by bending is lowered, the generation of cracks in the package 101 and the spreading of sections among the fins are prevented, and quality is stabilized.

Description

【発明の詳細な説明】 (発明の目的〕 (産業上の利用分野) 本発明は半導体装置にかかり、特にフィンを備えた樹脂
モールド型の半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION (Objective of the Invention) (Industrial Field of Application) The present invention relates to a semiconductor device, and more particularly to a resin-molded semiconductor device having fins.

(従来の技術) 半導体装置でフィンを有する樹脂モールド型のICを第
3図に示す。
(Prior Art) FIG. 3 shows a resin mold type IC which is a semiconductor device and has fins.

第3図(a)に斜視図で、また(b)に(a)のAA線
に沿う断面図で示される101は平板状の樹脂モールド
外囲器で、その両側面から複数本のり−ド102が突出
し、樹脂モールド外囲器lotに近い部位で下面側に向
は曲げ加工が施されており、さらに。
3(a) is a perspective view, and FIG. 3(b) is a cross-sectional view taken along line AA in FIG. 102 protrudes, and a bending process is applied to the lower surface side at a portion close to the resin mold envelope lot.

上記リード群の中央にこのリードと同じ曲げ加工が施さ
れたフィン103が設けられている。叙上の如きDIP
型ICは第4図に平面図で示されるリードフレーム10
4によって形成される。すなわち、リードフレーム中央
部のチップベツド部103aにチップ105(第3図(
b))をチップボンディング、ワイヤボンディング等に
よって取着したのち、樹脂モールドを施して外囲器10
1を形成する。ついで、リードカット、リード曲げ加工
(リードベンド)等を施してiCが得られるものである
A fin 103 is provided at the center of the lead group, which is bent in the same way as the lead. DIP as described
The type IC has a lead frame 10 shown in plan view in FIG.
Formed by 4. That is, the chip 105 (see FIG.
b)) is attached by chip bonding, wire bonding, etc., and then resin molded to form the envelope 10.
form 1. Then, lead cutting, lead bending, etc. are performed to obtain an iC.

(発明が解決しようとする課題) 上記従来のICにおいては、樹脂モールド封止後のリー
ド曲げ加工工程でリードとフィンの折曲げ部に応力がか
かる。特にフィンはリードに比し幅が広いために大きな
応力がかかる。このリードおよびフィンの折曲げ部を第
3図(b)に破線円CB)で、また、該部の拡大図で第
3図(C)に示すように。
(Problems to be Solved by the Invention) In the conventional IC described above, stress is applied to the bent portions of the leads and fins in the lead bending process after resin mold sealing. In particular, the fins are wider than the leads, so they are subject to a large stress. The bent portion of the lead and fin is shown in FIG. 3(b) as a broken line circle CB), and an enlarged view of the portion is shown in FIG. 3(c).

フィンの曲げ部には口開きを生ずる。106はフィンの
口開部を示す。
An opening is created at the bend of the fin. 106 indicates the mouth opening of the fin.

上記口開きはリードやフィンの板厚が厚いほど生じやす
く、また、外囲器に発生をみるクラックの原因ともなっ
ている。これにより、水、異物等が浸入しやすく、IC
の信頼性に悪影響を及ぼす。
The thicker the leads and fins are, the more likely the gap is to occur, and is also a cause of cracks that occur in the envelope. This allows water, foreign matter, etc. to easily enter the IC.
has a negative impact on reliability.

この発明は叙上の課題を解決するためになされたもので
、樹脂モールド外囲器から板状のフィンを突出させた樹
脂封止型半導体装置の改良構造を提供することを目的と
する。
The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide an improved structure of a resin-sealed semiconductor device in which plate-shaped fins are protruded from a resin molded envelope.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段) 本発明にかかる半導体装置は、樹脂モールド外囲器から
板状のフィンを突出させた樹脂封止型半導体装置におい
て、フィンが外囲器からの突出部分にその板厚方向の透
孔を具備したことを特徴とするものである。
(Means for Solving the Problems) A semiconductor device according to the present invention is a resin-sealed semiconductor device in which plate-shaped fins protrude from a resin-molded envelope, and the fins are attached to the protruding portion from the envelope. It is characterized by having through holes in the thickness direction.

(作 用) 本発明はフィンとリード、特にフィン部に曲げ加工によ
って生ずる応力が低下でき、口開きや樹脂外囲器のクラ
ックが防止できる。
(Function) The present invention can reduce the stress caused by bending in the fins and leads, especially in the fin portion, and can prevent openings and cracks in the resin envelope.

(実施例) 以下5本発明にかかる一実施例のフィン付きICにつき
図面を参照して説明する。なお、説明において従来と変
わらない部分については、図面に従来と同じ符号をつけ
て示し、説明を省略する。
(Embodiment) Hereinafter, five finned ICs according to an embodiment of the present invention will be described with reference to the drawings. In addition, in the description, parts that are the same as the conventional one are shown in the drawings with the same reference numerals as the conventional one, and the explanation will be omitted.

第1図(a)に斜視図で、また(b)に(a)のCC線
に沿う断面図で示されるように、樹脂モールド外囲器1
01から突出したフィン11に一例の長孔11aが設け
られている。この長孔11aの寸法はフィン11の幅や
、板厚により設定されるが、フィンの熱伝導性、強度等
からしてフィンの幅の略172程度がよい。なお、第3
図(b)におけるIlbはチップ105がマウントされ
るチップベツド部である。
As shown in FIG. 1(a) in a perspective view and in FIG. 1(b) in a sectional view taken along line CC in FIG.
An example long hole 11a is provided in the fin 11 protruding from the fin 01. The dimensions of this elongated hole 11a are determined by the width of the fin 11 and the thickness of the plate, but from the viewpoint of the thermal conductivity and strength of the fin, it is preferably about 172 mm of the width of the fin. In addition, the third
Ilb in Figure (b) is a chip bed portion on which the chip 105 is mounted.

次に、第2図に叙上のICの組立に用いられるリードフ
レーム■を平面図で示す、このリードフレームUにおい
ては、フィン11が樹脂モールド外囲器の側面から突出
する部位に、このリードフレームのプレス抜き加工と同
時に予め形成される。
Next, FIG. 2 shows a plan view of the lead frame (2) used for assembling the above-described IC. It is preformed at the same time as the frame press punching process.

叙上の実施例はDIP型ICの場合を例示したが。In the above embodiment, the case of a DIP type IC was exemplified.

これに限られるものでなく、外囲器の西側面からフィン
を突出させたもの等、広く適用できる。
The present invention is not limited to this, and can be widely applied to a structure in which fins are protruded from the west side of the envelope.

〔発明の効果〕〔Effect of the invention〕

この発明によれば、フィンの樹脂封止部からの突出部に
長孔が設けられて曲げ加工による応力を低下させること
ができ、口開きや、外囲器に生ずるクラックが完全に防
止される。これにより、品質の安定と、向上に顕著な効
果がある。
According to this invention, the elongated hole is provided in the protruding part from the resin sealing part of the fin, so that the stress caused by bending can be reduced, and openings and cracks that occur in the envelope are completely prevented. . This has a significant effect on stabilizing and improving quality.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明にかかる一実施例のICの(a)は斜視
図、(b)は(a)のCC線に沿う断面図、第2図は本
発明の一実施例に用いられるリードフレームの正面図、
第3図は従来例のICの(a)は斜視図。 (b)は(a)のAA線に沿う断面図、(C)は(b)
のB部を拡大して示す断面図、第4図は従来例のICに
用いられるリードフレームの正面図である。 11−−−−フィン 11a−−−一長孔 11b−−−−チップベツド U−一一一リードフレーム 101−−−一樹脂モールド外囲器 105−−−−チップ 代理人 弁理士 大 胡 典 夫 ll:  フ(ン   //a :  長子ムttn 
; テ、2プ公ッド 渠1図 @ 2 図 701 7  末灯月をモールドタト団名シ1oz :
  リード   103 : フィン103a:チップ
イッド部 10s:ナツツ。 第  3  図 (蔓のIン (C) /(Ms:D開部 第  3  図 (受Φ2) 第  4  図
FIG. 1 is a perspective view of an IC according to an embodiment of the present invention, FIG. 2B is a sectional view taken along line CC in FIG. 2, and FIG. front view of the frame,
FIG. 3 is a perspective view (a) of a conventional IC. (b) is a cross-sectional view along line AA in (a), (C) is (b)
FIG. 4 is an enlarged sectional view showing part B of FIG. 4, and FIG. 4 is a front view of a lead frame used in a conventional IC. 11---Fin 11a---Elongated hole 11b---Chip bed U-111 Lead frame 101---1 Resin molded envelope 105---Chip agent Patent attorney Norifu Ogo ll: Fu(n) //a: Firstborn Muttn
; Te, 2 Pukoddo 1 Figure @ 2 Figure 701 7 Mold Tato group name 1oz:
Lead 103: Fin 103a: Chip id part 10s: Natsutsu. Fig. 3 (Vine I (C) / (Ms:D opening Fig. 3 (Reception Φ2) Fig. 4

Claims (1)

【特許請求の範囲】[Claims]  樹脂モールド外囲器から板状のフィンを突出させた樹
脂封止型半導体装置において、フィンが外囲器からの突
出部分にその板厚方向の透孔を具備したことを特徴とす
る半導体装置。
1. A resin-sealed semiconductor device having a plate-shaped fin protruding from a resin molded envelope, characterized in that the fin has a through hole extending in the thickness direction of the fin in the protruding portion from the envelope.
JP63090265A 1988-04-14 1988-04-14 Semiconductor device Pending JPH01262649A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63090265A JPH01262649A (en) 1988-04-14 1988-04-14 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63090265A JPH01262649A (en) 1988-04-14 1988-04-14 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH01262649A true JPH01262649A (en) 1989-10-19

Family

ID=13993674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63090265A Pending JPH01262649A (en) 1988-04-14 1988-04-14 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH01262649A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6165818A (en) * 1997-05-21 2000-12-26 Nec Corporation Method of manufacturing a semiconductor device with a pair of radiating terminals and a plurality of lead terminals formed from a single lead frame
KR20010087803A (en) * 2001-06-07 2001-09-26 김덕중 Small Out-line Package improving thermal performance

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6165818A (en) * 1997-05-21 2000-12-26 Nec Corporation Method of manufacturing a semiconductor device with a pair of radiating terminals and a plurality of lead terminals formed from a single lead frame
KR20010087803A (en) * 2001-06-07 2001-09-26 김덕중 Small Out-line Package improving thermal performance

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