JPH01256835A - Modem device - Google Patents

Abstract

PURPOSE:To measure line equalization and to determine optimum transmission speed by one training by providing a mean square error calculation circuit calculating the mean square error during a TCF(training check) signal period to an equalizer. CONSTITUTION:The number of times of accumulation N is set to '2400' by using the CCITT modem recommendations V29. In accordance with the CCITT recommendations T30 with respect to the facsimile protocol, as the TCF, a consecutive '0s' signal for 1.5sec+ or -10% is sent. Thus, the N is set to '2400', then the square error is accumulated for 1sec. Then an error rate versus S/N curve for a V29 modem is plotted succeedingly to obtain the S/N with respect to the user allowable error rate. Then the mean square error accumulation is obtained by the square error accumulation level QL with respect to the obtained S/N to plot a threshold level TH. When the value QL is larger than the TH, 9600bps is selected as the optimum transmission speed and when larger, 7200bps is selected as the optimum transmission speed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a modem device, and relates to a modem device used, for example, in digital data communication such as GIII facsimile communication.

[Prior Art] When transmitting digital signal data via a general public line that is an analog line, it is necessary to modulate the digital signal and convert it into a desired analog signal before transmitting it. Furthermore, it is necessary to demodulate this modulated signal on the receiving side, and a modulation/demodulation device (modem device) for this purpose is essential.

The transmission speed during data transmission has also been increased, and currently GM facsimile machines have an information transmission speed of 9.
A type that transmits data at a high speed of 600 bps (bit/sec) is used.

Therefore, the transmission signal modulated by the transmitting modem device and sent out to the line is received by the receiving modem device with distortion added due to line distortion, jitter, timing error between transmission and reception, carrier error, etc. The receiving modem device is equipped with an equalizer or the like to correct this distortion, and the signal is corrected so that it becomes the original transmission signal when it is output from the receiving modem device.

The operation of this equalizer will be explained below with reference to FIG. 6 and FIGS. 7(A) to 7(C).

In FIG. 6, 10 is a transmitting modem device, 20 is a receiving modem device, 21 is an equalizer built in the receiving modem device 20, and 30 is a line connecting both modem devices.

The transmission signal ak output from the transmission side modem device 10 is
As shown in FIG. 7(A), the signal is sent to the line 30 with a uniform gain over the entire band used. However, the line 3o has frequency characteristics, and its transmission characteristics are, for example, the characteristics shown in FIG. 7(B). Therefore, the received signal Rk received by the receiving modem device 20 is affected by this transmission characteristic, and becomes as shown in FIG. 7(B). By equipping the receiving side modem device 20 with an equalizer 21 having the frequency characteristics shown in FIG. 7(C), the output signal a k R from this equalizer 21 is as shown in FIG. 7(B) and FIG. This is a composite property with (C). The image frequency characteristics are opposite to each other, and the characteristic of the output signal ak, which is the convolution of both characteristics (a simple multiplication in the frequency domain), is the flat characteristic shown in Figure 7 (A). be. As a result, distortion-free signal transmission is possible.

That is, the role of the equalizer 21 is to create the inverse characteristics of the line characteristics.

In the method described above, line characteristics are equalized in data communications using public telephone lines, such as facsimile communications.

The table below shows CCITT as a training pattern for the equalizer.
, V29 Recommendation, and with reference to this table, C
The fallback will be explained using the CITT V29 recommendation as an example.

In the table, segment 2 is a pattern for timing phase adjustment, and segment 3 is a pattern for equalizer adjustment.

The table shows synchronization signals recommended by V29, which are used to equalize line characteristics before transmitting and receiving facsimile image data. Following the synchronization signal, a continuous "0" signal for 1.5 seconds ±10% is sent out, which is called a TCF (Draining check), to confirm whether the line characteristics have been properly equalized.

Therefore, first, the transmitter side sends out a synchronization signal having a transmission rate of 9600 bps, and then sends out the TCF.

On the receiver side, AGC control, timing extraction, flower vase adjustment, etc. are performed while receiving the synchronization signal.

Next, during the TCF period, for example, check whether there are any errors for 1 second, and if there is an error, send the FTT (
training failure) and falls back to 7200 bps. Also, if there is no error, a CFR (receipt confirmation signal) is sent to the transmitter side and 9600 is sent without fallback.
Image data is sent and received at bps.

[Problem to be solved by the invention] However, in the conventional example described above, the line equalization rate is poor, and if a TCF error occurs as a result, an FTT (training failure) is sent to the transmitting side and a fallback is performed. An extra step is involved, and even though a modem with a high transmission speed is used, the pre-steps for transmitting and receiving image data take a long time, and the effective transmission speed becomes extremely low. There was a drawback.

Therefore, if the transmission path characteristics are poor, V29 modem (9
600bps, 7200bps) than when using V27ter modem (4800bps).

2400 bps), the effective transmission speed may be faster.

In the future, 12.0Kbps, 14.4Kbps, 19
．． It is expected that a high-speed modem with a transmission speed of 2 Kbps will be recommended, but if a conventional fallback mode is used in a high-speed modem, the effective transmission efficiency will be worse than ever.

[Means for Solving the Problems'] The present invention has been made for the purpose of solving the above-mentioned problems, and includes the following configuration as one means for solving the above-mentioned problems.

That is, the equalizer is provided with a mean square error calculating circuit that calculates the mean square error during the TCF (training check) signal period (1.5 seconds ±10%).

Further, it is desirable to add a square error calculation circuit and an IDF filter to the output of the equalizer determination section as the mean square error calculation circuit.

Furthermore, it is desirable to add an absolute value error or a squared error and a low-pass filter to the output of the equalizer determination section.

[Operation] By providing the above-described mean square error calculation circuit, it is possible to measure the degree of line equalization and determine the optimum transmission rate with one training.

That is, in order to solve the above problem, a squared error calculation circuit is installed on the output side of the equalizer judgment section on the receiver side.1. D.

F (Integrate and Dump File
By adding a comparator and a comparator, it is possible to calculate the equalization rate during the TCF (Training Check) period of CCITT Facsimile Recommendation T30, and select the optimum transmission rate based on the result.

[Example] Hereinafter, an example according to the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a modulation/demodulation device (modem) according to an embodiment of the present invention.
This is a block diagram of the DSP.
(digital signal processing processor).

In FIG. 1, 1oO and 118 are a transmitting terminal and a receiving terminal that are connected to the modem of this embodiment and generate digital signals to be transmitted.

101 is a scrambler that randomizes transmission data in order to prevent continuous output of the same data; 102 is an encoder that assigns a code to the signal from the scrambler 101 for each tribit, guibit, etc.; and 103 is a code amount interference of the signal. Waveform shaping filter (roll-off filter) that prevents
4 is a modulator that performs predetermined modulation processing on the signal from the waveform shaping filter 03. The modulation method in this modulator 104 is a quadrature amplitude modulation (QAM) method that changes the amplitude and phase of a carrier wave.

The signal modulated by this modulator 104 is converted into an analog signal by a D/A converter 105 in order to be sent to an analog public line, etc., and is further converted into an analog signal by a low-pass filter 06 to match the transmission band of the transmission line. harmonic components are removed and sent to the transmission line.

On the other hand, from the transmission signal from the transmission path, components outside the transmission band are first removed by a bandpass filter 110, then controlled by the AGCll to a signal level that can be handled on the receiving side, and then converted into a digital signal by the A/D converter 112. be converted into After being converted into a digital signal, it is demodulated by the demodulator 113 into the original signal before modulation. Here, reference numeral 114 denotes a flower vase, and as described above, distortion components received during transmission are removed from the received signal transmitted here, and the original transmitted signal is extracted.

The output signal of this flower vase 114 is sent to the determiner 115,
Here, the signal is determined to be a code point, and then decoded by the decoder 116 and sent to the descrambler 117, and the signal randomized by the scrambler 101 on the transmitting side is restored. In this way, the signal is returned to the same signal as the transmission signal output from the transmitting terminal 100, and is output to the receiving terminal 118 side.

Then, the signal line 120 determines, for example, that the squared error cumulative value QL, which will be described later, is at the threshold T based on the determination result of the comparator 114 (at the end of segment 4).

When selecting a transmission speed of 9,600 bps, the output is H level ()High Level), and the squared error cumulative value QL is the threshold T)!
When selecting a transmission speed of 7,200 bps, which is higher than that of 7200 bps, L level (Low Level) is output. Of course, it is also possible to add a signal line to notify that when the value of the squared error cumulative value QL exceeds TdlV, the tap coefficients of the equal flower vase will be saved and the process will proceed to retraining.

Since the configuration and control of the parts of the modem device of this embodiment having the above configuration except for the flower vase 114 are well known, a detailed explanation thereof will be omitted, and the detailed structure and operation of the flower vase 114 of this embodiment will be sequentially explained below.

FIG. 8 is a diagram showing the configuration of the isobacter according to this embodiment. The isobacter 114 of this embodiment is composed of a transversal filter. In the figure, 400 is a delay element that delays the received data R8 for a certain period of time, and 401 is a delay element that delays the received data R8 for a certain period of time. This is the tap gain [C-8 to CN] multiplied by the delayed received data immediately above in the figure. As is well known, the tap gain expressed on the time axis is called a unit impulse response, and the result obtained by Fourier transformation of this is the frequency characteristic of the isoflower shown in FIG. 7(B). Further, 402 is a multiplier that multiplies the received data delayed by the delay element 400 and the tap gain 401, and 403 is a multiplier that multiplies the received data delayed by the delay element 400 from each multiplier 402 by the tap gain 401. This is an adder that takes the total value of the result.

The equalizer output signal yk with the above configuration can be expressed by the following equation.

yk =ΣC+Rk-+...(1) equation equalizer 201
is based on the received data, and calculates each tap gain using the MSE method (M
The system adapts to the reverse characteristics of the line by sequentially calculating the following equation using the EAN S guare error method).

However, γ+1−0 Ce +, γ+1 tap gain value M calculated at the first time: judgment (estimated value) is the estimated value of the received data ai+, and fik=ak during the training period.

L: Convergence coefficient (generally α(1) y, -fik: error signal (ek).

Note that the above-mentioned MSE method uses a squared error signal e2. This is an algorithm that minimizes

Particularly in this modem, speed and precision of this equalization operation are required, and it is no exaggeration to say that this itself determines the performance of the modem.

In this way, the equalizer 114 creates inverse line characteristics using known data (training data) between the transmitter and receiver before data transmission, and then uses the equalizer 114 to follow gradual time fluctuations in the line. The characteristics are changed (automatic equalization or adaptive equalization).

FIG. 2 shows an example in which the phase control section on the output side of the equalizer determination section is configured as a PLL automatic equalizer (PLL automatic equalizer with square error accumulator).

R in FIG. 2 is a demodulated complex signal and is supplied from the demodulation section of the receiving system. 600 is a line equalizer, which normalizes data that has been distorted on the line to its original transmission state.

Jθm Here, Y+ = A+ e is the i-th output of the equalizer 600 expressed in polar coordinates.

603 is a multiplier, −jφ・of the complex number generator 605;
and output e jθ1 equalizer output Y+ = e are multiplied together and Z+
=Y+e=A+e"θ1-φ1)-jθ1. 610 is a determiner and a multiplier 60
The code point (person, ) is determined to be the one closest to the received signal point, which is the output of step 3. A subtracter 611 subtracts the decision point from the received signal point and outputs an error signal Et=ZI-person.

The error signal E1 is then multiplied with the output e of the complex number generator jφ1 602 to obtain 1, jφ1 Ele and fed back to the equalizer 600.

jφ5 Here, e is the phase correction amount.

Next, the phase control surrounded by the dotted line in FIG. 2 will be explained.

609 is a divider and enters Z+, which division result,
Approximately ej Ce"-9") can be found.

608 is an imaginary part extractor which outputs sin (θ1-φI).

5 inches (θ1-φl) is approximately equal to (θ1-φ,) when (θ14φI). 606 and 607 are ordinary PLL components, ■CO and low-pass filter, which adjust the phase value (-) to cancel the input phase error.
φl) is output.

Subsequently, the complex number generators 605 and 602 and the complex conjugate generator 604 generate j +l! ++ j $1 is outputted and input to multipliers 603 and 601, respectively, to cancel out the phase error of the entire system.

In FIG. 2, the output Ei=Z+-person of the subtracter 611 is inputted to an IDF 613, which will be described later, via an absolute value squaring circuit 612. Note that the absolute value square circuit 612 calculates the square of the distance between the received signal point and the determination point. Subsequently, in the IDF 613, the output of the absolute value squaring circuit 612 is accumulated the number of times (N baud periods) set by the designer, and outputted as QL. If the line equalization rate is good and the amount of line noise is small, QL approaches zero; conversely, if the line equalization rate is poor and the amount of line noise is large, the value of QL increases.

Next, using Figure 3, I D F (Integrat
e and Dump Filter) 613 will be explained.

In FIG. 3, 700 is an adder, 701 is a delay device, and 702 is a sampler.

First, the output of the absolute value squaring circuit 612 and the output of the delay device 701 in FIG. 2 are added in the adder 700. This operation is repeated every output period of the absolute value squaring circuit 612, that is, every baud period. The sampler 702 samples the output of the adder 700 for each value N determined by the designer, and subsequently initializes the value of the delay device 701.

In other words, this circuit cumulatively adds N outputs of the absolute value squaring circuit 612.

A method of determining the equalization rate using the PLL automatic equalizer with automatic error accumulator described above and determining the optimum transmission rate based on the determination result will be described below.

CCITT modem recommendation V29 is used, and the cumulative number N in FIG. 3 is set to "24oO".

CCITT Recommendation T3 Recommendation 3 on facsimile procedures
0, TCF is a continuous “0” signal for 1.5 seconds ±10%. Therefore, by setting the cumulative number N to "2400", the squared error will be accumulated for one second.

Next, the error rate V, S, and S/N ratio curves of the V29 modem are drawn, and the S/N ratio with respect to the user allowable error rate is determined. By receiving the training signal many times, a mean square error cumulative value is determined from the square error cumulative value QL for the determined S/N ratio, and is set as a threshold T□.

Therefore, in actual facsimile communication, if the value of QL is smaller than the threshold TH, 9600 bps is selected as the optimum transmission rate, and if it is larger than the threshold T□, 7200 bps is selected as the optimum transmission rate.
Select ps.

As explained above, by using the above method, the optimum transmission rate can be determined with one training session.

Furthermore, if the value at which the equalizer diverges is determined in advance by simulation and the divergence value is set as TdlV, when the value of the cumulative squared error value QL is larger than the divergence value TdlV, the tap coefficient of the equalizer It is also possible to save and move on to retraining.

All the comparisons between the equalization level squared error cumulative value QL and each threshold To that have been described so far are performed by the comparator 614 shown in FIG.

The above method is also applicable to V27 ter modem, 14.4Kbps, 19.2Kbps
There are many transmission speeds for ultra-high-speed modems such as S, but by using the above method, it is possible to select the optimal transmission speed with one training.

Figure 4 shows V29T-dem (transmission speed 9600 bps/
7'200bps) (7) It is a graph of S/N ratio versus pit error rate. In the figure, the solid line is the pit error rate of the V29 modem when transmitting at 9600 bps, and the dotted line is the pit error rate of the V29 modem when transmitting at 7200 bps.

Therefore, if you want to construct a communication system with an allowable transmission error rate of 10-', draw a straight line parallel to the horizontal axis passing through the point where the pit error rate is 1o-4, as shown in Figure 4. Straight line and V29 modem (transmission speed 9600b
A perpendicular line is drawn on the horizontal axis from the intersection with the solid line representing the pit error rate of ps).

The intersection of the horizontal axis and the perpendicular line is the V29 modem (transmission speed 9600
This means the minimum S/N ratio that can guarantee a bit error rate of 10-4 at a transmission rate of (bps).

In addition, in Figure 4, the V29 modem (transmission speed 960
This shows that the minimum S/N ratio that can guarantee a bit error rate of 10'' is 18.2 dB at a transmission rate of 0 bps).

The details of the method for obtaining the above cumulative mean squared error will be explained below.

In the case of V 2.9, the cumulative number N shown in Figure 3 is (2
400).

First, a training process is executed in which a synchronization signal (training) according to CCITT Recommendation V29 is sent from the transmitter side device to the receiver side device. For example, repeat this operation 100 times. Then, the squared error cumulative value QL is obtained for each training process.

Therefore, through a series of training processes, Q LOIQ
LII QL2. ...Obtain IQL99.

Next, using this QLO, QLll...1QL99, calculate the cumulative mean square error as follows.

The threshold T in the above equation is defined as the mean squared error accumulation.

Finally, the PLL with automatic error accumulator that has been explained so far
A method of determining the equalization rate using an automatic equalizer and determining the optimum transmission rate based on the determination result will be described below with reference to the flowchart of FIG.

First, in step 1000, a loop counter f is used to count the number of baud periods in each segment of the synchronization signal.
2c initialization processing is performed. In the following step 1001, a normal timing extraction algorithm using a baseband or carrier band extraction method is operated. Subsequently, in step 1002, it is checked whether the loop counter βC has reached 127, and if the loop counter I2C has not reached 127, the loop counter 12c is checked in step 1003.
is incremented by one and returns to step 1001.

When loop counter f2c reaches 127, that is, V2
9 The number of symbol intervals of synchronization signal segment 2 is 12
7, and the timing extraction algorithm (step 10
01) has been executed 128 times, step 1004
Then, the loop counter nc is reset and initialized again, and in steps 1005 to 1007, an algorithm is operated 384 times using the received data to adaptively update the equalizer tap coefficients to follow the line characteristics. That is, in step 1005, an algorithm for updating the equalizer tap coefficients is executed, and in the following step 1006, the number of symbol intervals of V29 synchronization signal segment 3 is counted to see if it has reached 383, and if it is less than that, step 1007 is executed. Then, the loop counter I2C is incremented by one and the process returns to step 1005.

After executing the algorithm for updating the equalizer tap coefficients 384 times, the process proceeds to step 1008, where the loop counter ρC
Initialize the following steps 1009 to 1011.
Similarly, 48 pieces of scrambled data "1" of V29 synchronization signal segment 4 are received. The number of symbol intervals of V29 synchronization signal segment 4 is counted, and when step 1009 has been executed 48 times, step 10 is executed.
10, the process proceeds to step 1012, and if not, the process proceeds to step 1011, where the loop counter 12c becomes "1".
is incremented, and the process returns to step 1009.

In step 1012, a loop counter βC is initialized, and in subsequent steps 1013 to 51017, squared cumulative error accumulation processing is performed 2400 times.

First, in step 1013, the TCF of CCITT recommendation T30 is
The scrambled data “0” is received. next,
In step 1014, the square error between the received signal and the signal coordinate point defined by CCITT V29 recommendation is determined.

Furthermore, in step 1015, the squared error determined in step 1014 is accumulated by the IDF shown in FIG. Then, in step 1016, the number of symbol intervals of the TCF is counted, and when steps 1013 to 1015 are executed 2400400 times, step 10
If not, the process proceeds to step 1017, where the loop counter is incremented by "1", and the process returns to step 1013.

In step 1018, the mean squared cumulative error, that is, the squared cumulative error, is calculated using the number of symbol intervals 2400 in TCFI seconds.
The value divided by is determined, and compared with a threshold To determined in advance to determine whether it is large or small. The determination result is obtained, the level of the signal line 120 is switched to either high level or low level, and is output to the receiving terminal 118.

[Other Embodiments] In the above embodiments, the squared error was used as a measure of the equalization rate, but the present invention is not limited thereto, and the absolute value of the error between the received signal point and the determination point may be used. However, it can be easily realized.

In the above explanation, the CCITT V29 recommendation was used as an example, but the present invention is not limited to the V29 recommendation.
Any modem having a transmission speed as recommended by CITT, V27ter, or V3333 can be easily applied.

In the above embodiment, the squared error is accumulated for 2400 symbol intervals in accordance with the T30 recommendation, but the number of times is not limited as long as it is within 1.5 seconds.

In the embodiment, an IDF is used as the accumulator circuit, but the accumulator circuit is not limited to this and can be easily implemented using a normal low-pass filter.

Furthermore, in the embodiment described above, a total of 100 squared errors were accumulated as the mean squared error accumulated value, and the average thereof was determined, but the number of samples is not limited to 100.

As explained above, according to the above embodiments, the following effects can be achieved.

The conventional TCF (training) sequential fallback method for determining the transmission transmission rate has been abolished, and a mean square cumulative error calculation section has been installed at the output of the equalizer's determination section, and the synchronization signal is followed by <T
By determining the equalization rate during the CF reception period and comparing it with the threshold TH determined in advance, the optimal transmission rate can be determined with one TCF following the synchronization signal, or if the equalization rate is still poor. It is now possible to perform the hamstring training again.

Furthermore, since the TCF continues for a long time of 1.5 seconds, it has become possible to obtain the mean square cumulative error more accurately than during the synchronization signal period. As a result, in a modem having a plurality of transmission speeds, the time required for the pre-procedure can be greatly reduced, making it possible to provide a very efficient modem device.

Along with this, the effective transmission speed has been significantly increased to 12.0 Kbps, which is scheduled to be used in the future.

Even if 14, 4 Kbps, and 19.2 Kbps ultra-high-speed modems are standardized and the number of transmission speeds increases from 4 to 37, if equalization processing is performed using the method of this embodiment, the transmission efficiency will be dramatically improved. .

Further, although this embodiment has been described on the assumption that a DSP is used, the invention is not limited to this, and even if the algorithm is created using hardware, the algorithm is the same and the effect will not change at all.

[Effects of the Invention] As explained above, according to the present invention, equalization processing can be performed reliably in a very short time.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment according to the present invention, Fig. 2 is a schematic diagram of equalization operation by the equalizer of this embodiment, Fig. 3 is a configuration diagram of the IDF of this embodiment, and Fig. 4 is A diagram for explaining the S/N ratio versus pit error rate in this embodiment, Figure 5 is a flowchart showing the equalization process in this embodiment, and Figure 6 is a diagram for explaining the flow of a general transmission signal. Figure 7 (A) is a diagram showing the frequency characteristics in the line, Figure 7 (B) is a diagram showing the frequency characteristics in the equalizer, and Figure 7 (C) is the frequency of the transmission signal from the transmitting modem. FIG. 8 is a diagram showing the characteristics and the frequency characteristics of the output signal corrected by the equalizer. FIG. 8 is a configuration diagram of the equalizer of this embodiment. In the figure, 100... Transmission terminal, 101... Scrambler, 102... Encoder, 103... Pulse shaping filter, 104... Modulator, 105... D/A converter, 106 ...Low pass filter, 110...Band pass filter, 111...AGC, 1, 12...A
/D converter, 113... Demodulator, 114... Equalizer, 115... Determiner, 116... Decoder, 117...
... Descrambler, 118 ... Receiving terminal, 400
... Delay element, 401... Tap gain, 402.
. . . Multiplier, 403 . . . Adder. Leaf; Figure 3, Figure 4, Figure 5

Claims (3)

[Claims] (1) The equalizer is equipped with a mean square error calculation circuit that calculates the mean square error during the TCF signal period, and the circuit is used to measure the degree of line equalization and determine the optimal transmission rate with one training. A modem device characterized by: (2) The modem device according to claim 1, wherein a square error calculation circuit and an IDF filter are attached to the output of the equalizer determination section as the mean square error calculation circuit. (3) Claim 2, characterized in that an absolute value error or a squared error and a low-pass filter are added to the output of the equalizer determination section.
Modem equipment as described in section.