[go: up one dir, main page]

JPH01238074A - Led driving circuit - Google Patents

Led driving circuit

Info

Publication number
JPH01238074A
JPH01238074A JP63063582A JP6358288A JPH01238074A JP H01238074 A JPH01238074 A JP H01238074A JP 63063582 A JP63063582 A JP 63063582A JP 6358288 A JP6358288 A JP 6358288A JP H01238074 A JPH01238074 A JP H01238074A
Authority
JP
Japan
Prior art keywords
circuit
led
mode input
npn transistor
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63063582A
Other languages
Japanese (ja)
Inventor
Kanesuke Nakamichi
中道 兼介
Yoichi Morita
要一 森田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP63063582A priority Critical patent/JPH01238074A/en
Publication of JPH01238074A publication Critical patent/JPH01238074A/en
Pending legal-status Critical Current

Links

Landscapes

  • Led Devices (AREA)

Abstract

PURPOSE:To give an appearance of two indication LED's lighting ON on one drive terminal, by making two mode indications available on one terminal simultaneously in a driving circuit made by a combination of LED's, a PNP transistor and an NPN transistor. CONSTITUTION:A PNP transistor Q1 and an NPN transistor Q2 are turned into cutoff and conduction states alternately by a gate circuit consisting of AND circuits G1 and G2. The output of the AND circuit G1 is reversed by an inversion circuit G3 to switch incoming current of a LED1 and a LED2 so that both LED's appear to light ON. The conditions for the NPN transistor Q2 to conduct is that two inputs to the AND circuit G2, a mode input from a mode input terminal IN2 (second voice program) and a switch pulse signal, are in a first logical state (H) and the conditions for the PNP transistor Q1 to conduct is that two inputs to the AND circuit G1, a mode input from a mode input terminal IN1 (stereo) and the switch pulse signal, are in a first logical state (H).

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はLEDを利用した表示装置の駆動回路に関する
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a drive circuit for a display device using LEDs.

(従来の技術) 第3図は従来のLED駆動回路を示すものである。第3
図において、1はLED駆動端子、QlはPNPトラン
ジスタ、Q2はNPNトランジスタ、R3は電流制限用
抵抗、LEDl、LED、はモード表示用LED、R□
、R2はバイアス用抵抗。
(Prior Art) FIG. 3 shows a conventional LED drive circuit. Third
In the figure, 1 is an LED drive terminal, Ql is a PNP transistor, Q2 is an NPN transistor, R3 is a current limiting resistor, LEDl and LED are mode display LEDs, R□
, R2 is a bias resistor.

INよ、IN、はモード入力端子、VCCは電源である
IN, IN is a mode input terminal, and VCC is a power supply.

次にL記構酸の従来例の動作について説明する。Next, the operation of the conventional example of the L-synthetic acid will be explained.

第3図において、例えば、モード入力端子IN工が第2
の論理状態(L)になるとPNP トランジスタQ、が
導通し、電源vccよりPNPトランジスタQ工、j&
、抗R,,LED駆動端子1.LED、、。
In FIG. 3, for example, the mode input terminal IN is connected to the second
When the logic state (L) is reached, the PNP transistor Q becomes conductive, and the PNP transistor Q, j &
, anti-R,, LED drive terminal 1. LED...

抵抗R1を通して電流が流れLED工が点灯する。Current flows through resistor R1 and the LED lights up.

一方、モード入力端子IN、が第1の論理状態(H)に
なりNPNトランジスタQ2が導通すると、電源■Cc
より抵抗R,,LED、、LED駆動端子1.抵抗R,
,NPNトランジスタQ2を通して電流が流れLED、
が点灯する。ここで抵抗R1=抵抗R2とすると、抵抗
R□と抵抗R2の接続点の電位はVcc/2となりLE
D1点灯時のLEDlに流れる電流を工、とすると、 LED2点灯時のLED2に流れる電流を特徴とする特
許 なお、抵抗R,,R2の中点電位はLEDの駆動電流に
よってあまり変化しないよう抵抗R□、R2の値を小さ
く選ぶ必要がある。
On the other hand, when the mode input terminal IN becomes the first logic state (H) and the NPN transistor Q2 becomes conductive, the power supply ■Cc
From resistor R, , LED, , LED drive terminal 1. Resistance R,
, a current flows through the NPN transistor Q2 and the LED,
lights up. Here, if resistor R1 = resistor R2, the potential at the connection point of resistor R□ and resistor R2 becomes Vcc/2, and LE
If the current flowing through LED 1 when D1 is lit is , then the current flowing through LED 2 when LED 2 is lit is . □, it is necessary to select a small value for R2.

(発明が解決しようとする課題) しかしながら、上記従来の構成では、2個の表示用LE
D (LEDl、LED2)を同時に点灯させることが
できないという問題があった。
(Problem to be Solved by the Invention) However, in the above conventional configuration, two display LEs
There was a problem in that D (LEDl, LED2) could not be turned on at the same time.

本発明はこのような従来の問題を解決するものであり、
1つの駆動端子で疑似的に2個の表示用LEDを点灯さ
せることを目的とするものである。
The present invention solves these conventional problems,
The purpose of this is to pseudo-light two display LEDs using one drive terminal.

(課題を解決するための手段) 本発明は上記目的を達成するために、LED駆動回路は
、従来のLED、PNP)−ランジスタ、NPNトラン
ジスタにさらに論理積回路の構成によるゲート回路と反
転回路とを備えたものである。
(Means for Solving the Problems) In order to achieve the above object, the present invention provides an LED drive circuit that includes conventional LEDs, PNP transistors, and NPN transistors, as well as a gate circuit and an inverting circuit configured as an AND circuit. It is equipped with the following.

(作 用) 本発明は上記のような構成により、時分割的に2個のL
EDを交互に点灯させることができ、見かけ上−つのL
ED駆動端子で2個のLED表示を同時に行わせること
ができるという効果を有する。
(Function) With the above configuration, the present invention can time-share two L
The ED can be lit alternately, giving the appearance of two L lights.
This has the effect that two LED displays can be performed at the same time using the ED drive terminal.

(実施例) 実施例の説明に先だって本発明の背景の要点をのべる。(Example) Before explaining the embodiments, the main points of the background of the present invention will be described.

近年、半導体集積回路の集積度の増加に伴い、1つのチ
ップ内に多くの機能を収納することが可能となってきた
。一方、パッケージの大きさ、端子数に制限があり、端
子数をできるだけ少なくしながら多くの回路を集積する
方向に進んでおり、本発明もこの方向に寄与するもので
ある。
In recent years, with the increase in the degree of integration of semiconductor integrated circuits, it has become possible to accommodate many functions within one chip. On the other hand, there are restrictions on the size of the package and the number of terminals, and the trend is to integrate as many circuits as possible while minimizing the number of terminals, and the present invention also contributes in this direction.

−例として特にテレビ音声多重復調用集積回路について
のべると、現在1国内では2箇国語及びステレオの多重
放送が行われているが、同時に両方の放送を行うことは
なく、シたがってテレビセット側でそれぞれの放送状態
をLED等表示する場合も同時に両方のモードのLED
を点灯させる必要はなかった。一方、アメリカ合衆国内
でゼニス方式(以下、USA方式という)の音声多重放
送が実施されつつあり、これにしたがい復調用集積回路
が開発されている。USA方式はステレオ放送及び第2
音声プログラムで構成され、同時に両方のプログラムが
放送される頻度が高い。この場合、視聴者は現在放送が
一方だけなのか両方の放送がなされているのかを知る必
要があり、したがって両方のモードのLED表示が必要
となる。上記要求に合致し、且つ集積回路の端子を減ら
すため1つの駆動端子で2つのモード表示ができること
が望まれる。
- For example, specifically regarding integrated circuits for TV audio multiplexing and demodulation, multiplex broadcasting in two languages and stereo is currently carried out in one country, but both broadcasts are not carried out at the same time, and therefore the TV set When displaying the broadcast status of each mode using LEDs, the LEDs of both modes at the same time.
There was no need to turn it on. On the other hand, Zenith system (hereinafter referred to as USA system) audio multiplex broadcasting is being implemented in the United States, and demodulation integrated circuits are being developed in accordance with this system. The USA system is stereo broadcasting and
It consists of an audio program, and both programs are often broadcast at the same time. In this case, the viewer needs to know whether only one broadcast or both broadcasts are currently being broadcast, and therefore LED displays for both modes are required. In order to meet the above requirements and reduce the number of terminals in an integrated circuit, it is desirable to be able to display two modes with one drive terminal.

第1図は本発明の一実施例の基本回路を示すものである
。第1図において、1はLED駆動端子。
FIG. 1 shows a basic circuit of an embodiment of the present invention. In FIG. 1, 1 is an LED drive terminal.

Q工はPNP トランジスタ、G2はNPNトランジス
タ、R3は電流制限用抵抗、R,、R2はバイアス用抵
抗、LED工、LED、は表示用LED、G1.G2は
論理積回路、G、は反転回路、Q、Qは切換パルス信号
、IN、、IN、はモード入力端子である。
Q is a PNP transistor, G2 is an NPN transistor, R3 is a current limiting resistor, R,, R2 is a bias resistor, LED is a display LED, G1. G2 is an AND circuit, G is an inversion circuit, Q and Q are switching pulse signals, and IN, , IN are mode input terminals.

次に上記第1図の動作について説明する。上記第1図に
おいて、PNPトランジスタQユ、NPNトランジスタ
Q2を論理積回路Gt*a*で構成するゲート回路によ
り交互に断続し、また、論理積回路G工の出力を反転回
路G3で反転してLEDl、LED、の流入電流を切り
換えることにより、両方のLEDが点灯しているように
見せるものである。
Next, the operation shown in FIG. 1 will be explained. In Fig. 1 above, the PNP transistor QU and the NPN transistor Q2 are alternately connected and disconnected by a gate circuit composed of an AND circuit Gt*a*, and the output of the AND circuit G is inverted by an inverter circuit G3. By switching the inflow currents of LEDl and LED, both LEDs appear to be lit.

NPNトランジスタQ2の導通時の条件は、論理積回路
G2の2人力即ちモード入力端子IN、からのモード入
力(第2音声プログラム)と切換パルス信号がともに第
1の論理状態(H)の時であり。
The condition for conduction of the NPN transistor Q2 is when both the mode input (second audio program) from the mode input terminal IN of the AND circuit G2 and the switching pulse signal are in the first logic state (H). can be.

PNPトランジスタQ1の導通時の条件は、論理積回路
G1の2人力即ちモード入力端子IN工からのモード入
力(ステレオ)と切換パルス信号がともに第1の論理状
態(H)の時である。なお、論理積回路Giの入力であ
る切換パルス信号Qと論理積回路G、の入力である切換
パルス信号Qとは論理的に反転したパルスである。
The condition for conducting the PNP transistor Q1 is when the two inputs of the AND circuit G1, that is, the mode input (stereo) from the mode input terminal IN and the switching pulse signal are both in the first logic state (H). Note that the switching pulse signal Q, which is an input to the AND circuit Gi, and the switching pulse signal Q, which is an input to the AND circuit G, are logically inverted pulses.

第2図は本発明の一実施例の具体的回路を示すものであ
る。第2図において、G31 Q4t QljQ、、Q
、、Q、はNPNトランジスタ、Q、はPNPトンラジ
スタ、Aは分周回路、Bは切換用発振源である。
FIG. 2 shows a specific circuit of one embodiment of the present invention. In Figure 2, G31 Q4t QljQ,,Q
,,Q are NPN transistors, Q is a PNP transistor, A is a frequency dividing circuit, and B is a switching oscillation source.

第1図と第2図の関係を示すと、第1図のPNPトラン
ジスタQ、に相当するものは第2図のNPNトランジス
タQ、、PNPトランジスタQい抵抗Rsであり、第1
図のNPN トランジスタQ2に相当するものは第2図
のNPNトランジスタQ4である6また、第1図の反転
回路G、及び論理積回路G工に相当するものは第2図の
NPNトランジスタQ、、 Q、と抵抗R,,R,であ
り、第1図の論理積回路G2に相当するものは第2図の
NPNトランジスタQ、、 Q、と抵抗R,,R4であ
る。
To show the relationship between FIG. 1 and FIG. 2, the PNP transistor Q in FIG. 1 corresponds to the NPN transistor Q in FIG.
The NPN transistor Q2 in the figure corresponds to the NPN transistor Q4 in Figure 2.6 Also, the NPN transistor Q in Figure 2 corresponds to the inverting circuit G and the AND circuit G in Figure 1. Q, and resistors R,,R,, and what corresponds to the AND circuit G2 in FIG. 1 are the NPN transistors Q,,Q, and resistors R,,R4 in FIG.

論理積回路G、、G、の切換パルス信号としては逆極性
のパルス(Q、Q)が必要であり、パルスの発生源とし
てはいろいろの方法が考えられる。ここでは1例として
1発振器よりの発振を波形成形あるいは分周した信号を
利用する方法を示している。
Pulses (Q, Q) of opposite polarity are required as switching pulse signals for the AND circuits G, , G, and various methods can be considered as the source of the pulses. Here, as an example, a method is shown in which a signal obtained by waveform shaping or frequency division of oscillation from one oscillator is used.

上記実施例の説明ではモード入力端子IN1のモード入
力をステレオ、モード入力端子IN、のモード入力を第
2音声プログラムとしているが、モード入力端子IN□
を第2音声プログラムに、モード入力端子IN、をステ
レオにすることも勿論可能であり、その際はLED1+
 LED、のモード表示の内容は当然逆にすべきである
In the description of the above embodiment, the mode input to the mode input terminal IN1 is stereo, and the mode input to the mode input terminal IN is the second audio program, but the mode input terminal IN□
Of course, it is also possible to set the mode input terminal IN to the second audio program and the mode input terminal IN to stereo, in which case the LED1+
The contents of the mode display of the LED should naturally be reversed.

(発明の効果) 本発明は上記実施例より明らかなように、端子数を増や
すことなく、2個のモードLEDを同時に点灯表示させ
ることができるという効果を有する。
(Effects of the Invention) As is clear from the embodiments described above, the present invention has the effect that two mode LEDs can be simultaneously lit and displayed without increasing the number of terminals.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の基本回路図、第2図は実施
例の具体的回路図、第3図は従来のLED駆動回路図で
ある。 Q、、 Q、・・・PNP トランスタ、Q2゜Q、、
 Q、、 Q、、 Q、、 Q、、 Q、・・・NPN
トランジスタ、R工〜R1・・・抵抗、LEDl、LE
D、・・・ LED、G□、G2・・・論理積回路、G
3・・・反転回路、INl。 IN2・・・モード入力端子、A・・・分周回路、B・
・・切換用発振源、Q、Q・・・切換パルス信号(Qと
Qは反転したパルス)、VCC・・・電源。 特許出願人 松下電器産業株式会社 第1図 Gt 、 GrS會Pt瑣l!l賂   G5″反転1
隆Q、6  ロSバセス傷号  (oho+−反」λし
rニパレ人)+  LEo!t111堝3   匡D+
 、 LED2・化印代−V軽ホ沿)第2図
FIG. 1 is a basic circuit diagram of an embodiment of the present invention, FIG. 2 is a specific circuit diagram of the embodiment, and FIG. 3 is a conventional LED drive circuit diagram. Q,, Q,...PNP transformer, Q2゜Q,,
Q,, Q,, Q,, Q,, Q,...NPN
Transistor, R engineering ~ R1...resistance, LEDl, LE
D,... LED, G□, G2... AND circuit, G
3... Inversion circuit, INl. IN2...mode input terminal, A...divider circuit, B...
...Switching oscillation source, Q, Q...Switching pulse signal (Q and Q are inverted pulses), VCC...Power supply. Patent Applicant Matsushita Electric Industrial Co., Ltd. Figure 1 Gt, GrS Association Pt dwarf! l bribe G5″ inversion 1
Takashi Q, 6 Rosbatheskugo (oho+-anti'λshir Niparejin) + LEo! t111屝3 匡D+
, LED2/Kaindai-V Light Ho) Figure 2

Claims (2)

【特許請求の範囲】[Claims] (1)LEDとPNPトランジスタとNPNトランジス
タを組み合わせて構成し、同時に2つのモード表示を1
端子で駆動可能とすることを特徴とするLED駆動回路
(1) Constructed by combining LED, PNP transistor, and NPN transistor, and can display two modes at the same time.
An LED drive circuit characterized in that it can be driven by a terminal.
(2)モード表示用LEDを逆並列接続して使用するこ
とを特徴とする請求項(1)記載のLED駆動回路。
(2) The LED drive circuit according to claim (1), wherein the mode display LEDs are connected in antiparallel.
JP63063582A 1988-03-18 1988-03-18 Led driving circuit Pending JPH01238074A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63063582A JPH01238074A (en) 1988-03-18 1988-03-18 Led driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63063582A JPH01238074A (en) 1988-03-18 1988-03-18 Led driving circuit

Publications (1)

Publication Number Publication Date
JPH01238074A true JPH01238074A (en) 1989-09-22

Family

ID=13233404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63063582A Pending JPH01238074A (en) 1988-03-18 1988-03-18 Led driving circuit

Country Status (1)

Country Link
JP (1) JPH01238074A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5491349A (en) * 1991-06-13 1996-02-13 Kabushiki Kaisha Toshiba Multi-color light emitting device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5491349A (en) * 1991-06-13 1996-02-13 Kabushiki Kaisha Toshiba Multi-color light emitting device

Similar Documents

Publication Publication Date Title
JPH0123009B2 (en)
JPH01238074A (en) Led driving circuit
EP0388919B1 (en) Matrix circuit of FM stereo multiplex demodulation circuit
JPS6022371Y2 (en) Group performance training device
KR910008937Y1 (en) Color display circuit of frequency display of FM / AM digital tuner
JP2664263B2 (en) ECL-TTL conversion circuit
JPH0322619A (en) Digital logic circuit
KR890001813B1 (en) Voice Multiple Broadcasting Signal Selection Circuit
JPS61184063A (en) Video signal switching device
KR910001588Y1 (en) Broadcasting Mode Display Circuit of Voice Multiple TV
KR880002128Y1 (en) Synchronizing signal modulating circuit
KR900003482Y1 (en) Automatic surround mode changing circuit
KR890004764Y1 (en) Video switching circuit
KR910004613Y1 (en) Voice multiple reception automatic mode selection circuit
KR890009423Y1 (en) Multi-sound signals control circuits
KR900010359Y1 (en) Audio mode switching circuit
JPS62110372A (en) Display circuit
JPS63314021A (en) Driver circuit
KR0132777Y1 (en) Circuit for indicating moving state
JPS6072316A (en) Sampling circuit
JPS6251476B2 (en)
JPH02306717A (en) Emitter coupled logic circuit device
JPS59110009A (en) Channel switching device of tape player
JPS554168A (en) Multiplex signal processor
JPH0255807B2 (en)