JPH01220473A - light sensor - Google Patents
light sensorInfo
- Publication number
- JPH01220473A JPH01220473A JP63046459A JP4645988A JPH01220473A JP H01220473 A JPH01220473 A JP H01220473A JP 63046459 A JP63046459 A JP 63046459A JP 4645988 A JP4645988 A JP 4645988A JP H01220473 A JPH01220473 A JP H01220473A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- amorphous semiconductor
- transparent conductive
- conductive films
- conductive film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 41
- 230000003287 optical effect Effects 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 16
- 239000010410 layer Substances 0.000 description 56
- 229910052751 metal Inorganic materials 0.000 description 36
- 239000002184 metal Substances 0.000 description 36
- 238000010586 diagram Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910003437 indium oxide Inorganic materials 0.000 description 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000000049 pigment Substances 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 229910001887 tin oxide Inorganic materials 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- -1 nickel Chemical class 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 150000003377 silicon compounds Chemical class 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
Landscapes
- Light Receiving Elements (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業の利用分野〕
本発明は光学的測定装置、光スイツチング素子などに用
いられる非晶質半導体層を有する光センサーに関するも
のである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an optical sensor having an amorphous semiconductor layer used in optical measuring devices, optical switching elements, and the like.
(従来の技術〕
本発明者は、先に透明導電膜を被着した透明基板上に、
第1の導電型、第2の導電型、第3の導電型を接合した
非晶質半導体層及びバイアス電圧が印加される金属電極
の積層体を複数個形成して構成されてた光センサーを提
案した。(Prior Art) The present inventor has developed a method of applying a transparent conductive film onto a transparent substrate.
An optical sensor is constructed by forming a plurality of stacked bodies of an amorphous semiconductor layer in which a first conductivity type, a second conductivity type, and a third conductivity type are bonded, and a metal electrode to which a bias voltage is applied. Proposed.
第4図はその光センサーの構造図である。FIG. 4 is a structural diagram of the optical sensor.
この光センサーは、P−1−N接合された非晶質半導体
層3を挟持する透明導電膜2、金属電極4から成る2つ
の積層体a、bが抱き合わされた構造になっている。This optical sensor has a structure in which two laminates a and b, each consisting of a transparent conductive film 2 and a metal electrode 4 sandwiching an amorphous semiconductor layer 3 bonded to each other by P-1-N, are joined together.
透明基板1はガラス、透光性セラミックなどから成り、
該透明基板1の一生面には透明導電膜2が被着されてい
る。The transparent substrate 1 is made of glass, translucent ceramic, etc.
A transparent conductive film 2 is adhered to the entire surface of the transparent substrate 1.
透明導電膜2は酸化錫、酸化インジウム、酸化インジウ
ム錫などの金属酸化物膜で形成され、透明基板1の一生
面の少なくとも積層体a、bに共通の膜となるように形
成されている。The transparent conductive film 2 is formed of a metal oxide film such as tin oxide, indium oxide, or indium tin oxide, and is formed to be a film common to at least the laminates a and b on the entire surface of the transparent substrate 1.
非晶質半導体層3は、少なくとも金属電極4a、4bが
形成される積層体a、b部分には、第1の導電型、第2
の導電型、第3の導電型を接合、即ちP−1−N接合が
形成されている。The amorphous semiconductor layer 3 has a first conductivity type, a second conductivity type, and a second conductivity type, at least in the laminated body parts a and b where the metal electrodes 4a and 4b are formed.
conductivity type and the third conductivity type are joined, that is, a P-1-N junction is formed.
金属電極4a、4bは、非晶質半導体層3上に所定形状
の間隔を置いて形成されている。The metal electrodes 4a and 4b are formed on the amorphous semiconductor layer 3 at predetermined intervals.
そして、金属電極4a、4b間に外部回路(図示せず)
から一定のバイアス電圧を印加しておく、例えば積層体
aの金属電極4aに+、積Iヨ体すの金属電極4bに−
でバイアス電圧をかけておくと、積層体a側には逆バイ
アス、積層体す側には順バイアスがかかることになる。An external circuit (not shown) is provided between the metal electrodes 4a and 4b.
For example, a constant bias voltage is applied to the metal electrode 4a of the stacked body A, and - to the metal electrode 4b of the stacked body A.
If a bias voltage is applied at , a reverse bias will be applied to the stacked body a side, and a forward bias will be applied to the stacked body side.
暗状態において、金属電極4a、4b間の抵抗は積層体
aの逆方向抵抗と積層体すの順方向抵抗の和になる。In the dark state, the resistance between the metal electrodes 4a and 4b is the sum of the reverse resistance of the laminate a and the forward resistance of the laminate A.
光センサーの透明絶縁基板1側から光照射される明状態
では、電流は、積層体aの金属電極4a−非晶質半導体
層のN層33−1層32−2層31−透明導電膜2−積
層体すの非晶質半導体層の2層31−1層32−N層3
3−金属電極4bに流れる。即ち金属電極4a、4b間
の抵抗は積層体aの逆方向抵抗と積層体すの順方向抵抗
の和になるが、積層体aには逆方向光電流が発生し、積
層体すは順バイアスなので抵抗としてはたらく。In a bright state in which light is irradiated from the transparent insulating substrate 1 side of the photosensor, a current flows between the metal electrode 4a of the laminate a - the N layer 33 - 1 of the amorphous semiconductor layer 32 - 2 layer 31 - the transparent conductive film 2 - Two layers of amorphous semiconductor layers in the laminate 31-1 layer 32-N layer 3
3- Flows to metal electrode 4b. That is, the resistance between the metal electrodes 4a and 4b is the sum of the reverse resistance of the laminate a and the forward resistance of the laminate A, but a reverse photocurrent is generated in the laminate a, and the laminate is forward biased. So it acts as a resistance.
このため、光センサー全体において、見かけ上光照射に
より抵抗が下がったことになり、光導電型センサーのよ
うにはたらく。これにより照度−抵抗値特性がリニアと
なり、T値が約1となる。Therefore, the resistance of the entire optical sensor appears to decrease due to light irradiation, and it functions like a photoconductive sensor. As a result, the illuminance-resistance value characteristic becomes linear, and the T value becomes approximately 1.
しかしながら、上述の光センサーは金属電極4a、4b
と透明導電膜2とで挟まれる非晶質半導体層3の耐圧前
件が低いため、外部から印加するバイアス電圧を低く抑
えなければならなかった。However, the above-mentioned optical sensor has metal electrodes 4a, 4b.
Since the amorphous semiconductor layer 3 sandwiched between the transparent conductive film 2 and the amorphous semiconductor layer 3 has a low breakdown voltage, the externally applied bias voltage had to be kept low.
また、暗電流が高くなり過ぎ、1xlO−12A/cm
2以下にできなかった。Also, the dark current becomes too high, 1xlO-12A/cm
I couldn't get it below 2.
本発明は、上述の光センサーの問題点に鑑み案出された
ものであり、その目的は強い照射光の下でも暗電流を低
くすることでき、且つ交流でも簡単に利用でき、耐圧信
頼性が向上する光センサーを提供するものである。The present invention was devised in view of the above-mentioned problems with optical sensors, and its purpose is to reduce dark current even under strong irradiation light, to be easily usable even with alternating current, and to have high voltage reliability. The present invention provides an improved optical sensor.
〔問題点を解決するための具体的な手段〕本発明によれ
ば、上述の問題点を解決するために、 複数個の透明導
電膜を形成した透明基板上に非晶質半導体層を形成し、
少なくとも隣接する2(INIの透明導電膜の間隔部に
対応する非晶質半導体層上に、該非晶質半導体層を介し
て両透明導電膜の一部と重なるように導電膜を形成した
光センサーが提供される。[Specific means for solving the problems] According to the present invention, in order to solve the above problems, an amorphous semiconductor layer is formed on a transparent substrate on which a plurality of transparent conductive films are formed. ,
An optical sensor in which a conductive film is formed on an amorphous semiconductor layer corresponding to the interval between at least two adjacent transparent conductive films (INI) so as to overlap a part of both transparent conductive films via the amorphous semiconductor layer. is provided.
以下、本発明の光センサーを図面に基づいて詳細に説明
する。Hereinafter, the optical sensor of the present invention will be explained in detail based on the drawings.
第1図は本発明に係る光センサーの構造を示す断面図で
ある。FIG. 1 is a sectional view showing the structure of an optical sensor according to the present invention.
本発明の光センサーは、透明基板1上に複数個、例えば
3つの透明導電膜2a〜2cが形成され、該透明導電膜
2a〜2cに連続して非晶質半導体層3が形成され、さ
らに非晶質半導体層3上にバイアス電圧が印加される電
極4a、4b及び隣接し合う2つの透明導電膜2a、2
b及び2b、2Cの間隙に対応する位置に導電膜5a、
5bが形成されている。In the optical sensor of the present invention, a plurality of, for example, three, transparent conductive films 2a to 2c are formed on a transparent substrate 1, an amorphous semiconductor layer 3 is formed continuously to the transparent conductive films 2a to 2c, and further Electrodes 4a and 4b to which a bias voltage is applied on the amorphous semiconductor layer 3 and two adjacent transparent conductive films 2a and 2
A conductive film 5a at a position corresponding to the gap between b, 2b, and 2C,
5b is formed.
透明基板1はガラス、透光性セラミックなどから成り、
該透明基板1の一生面には透明導電膜2a〜2cが被着
されている。The transparent substrate 1 is made of glass, translucent ceramic, etc.
Transparent conductive films 2a to 2c are attached to the entire surface of the transparent substrate 1.
透明導電膜2a〜2cは酸化錫、酸化インジウム、酸化
インジウム錫などの金属酸化物膜で形成されている。具
体的には透明基板1の一生面上にマスクを装着し、上述
の金属酸化物膜を被着したり、透明基板1の一生面上に
金属酸化物膜を被着した後、レジスト・エツチング処理
したりして形成されている。The transparent conductive films 2a to 2c are formed of metal oxide films such as tin oxide, indium oxide, and indium tin oxide. Specifically, a mask is attached to the entire surface of the transparent substrate 1 and the metal oxide film described above is deposited, or after a metal oxide film is deposited on the entire surface of the transparent substrate 1, resist etching is performed. It is formed by processing.
非晶質半導体層3は、透明導電膜2a〜2cに連続して
被うように形成され、P−I−N接合が形成されている
。具体的には、非晶質半導体層3はシランなどのシリコ
ン化合物ガスをグロー放電で分解するプラズマCVD法
や光CVD法等で被着される非晶質シリコンなどから成
り、2層31はシランガスにジボランなどのP型ドーピ
ングガスを混入した反応ガスで形成され、17m32は
シランガスを反応ガスとして形成され、N)’633は
シランガスにフォスフインなどのN型ドーピングガスを
混入した反応ガスで形成される。The amorphous semiconductor layer 3 is formed so as to continuously cover the transparent conductive films 2a to 2c, and a P-I-N junction is formed. Specifically, the amorphous semiconductor layer 3 is made of amorphous silicon deposited by a plasma CVD method or a photo CVD method in which silicon compound gas such as silane is decomposed by glow discharge, and the second layer 31 is made of silane gas. 17m32 is formed with a reactive gas mixed with P-type doping gas such as diborane, 17m32 is formed with silane gas as a reactive gas, and N)'633 is formed with a reactive gas mixed with silane gas with an N-type doping gas such as phosphine. .
金属電極4a、4bは、透明導電膜2a、2Cの一部に
非晶質半導体層3を介して重なるように形成されている
。The metal electrodes 4a, 4b are formed so as to partially overlap the transparent conductive films 2a, 2C with the amorphous semiconductor layer 3 in between.
導電膜5a、5bは、隣接し合う2つの透明導電膜2a
、2b及び2b、2cの間隙に対応する位置に非晶質半
導体層3を介して重なるよう6.形成されている。そし
て導電膜5a、5bの形状は隣接し合う2つの透明導電
膜2a、2b及び2b。The conductive films 5a and 5b are two adjacent transparent conductive films 2a.
, 2b and 2b, 2c so that they overlap with each other with the amorphous semiconductor layer 3 in between. It is formed. The shapes of the conductive films 5a and 5b are two adjacent transparent conductive films 2a, 2b and 2b.
2Cの間隔と同じ幅又は隣接し合う2つの透明導電膜2
a、2b及び2b、2cに一部が重なるように該間隔よ
りも広い幅に設定されている。Two transparent conductive films 2 with the same width as the interval of 2C or adjacent to each other
The width is set wider than the distance so that it partially overlaps a, 2b, 2b, and 2c.
具体的には、金属電極4a、4b及び導電膜5a。Specifically, metal electrodes 4a, 4b and conductive film 5a.
5bは同一工程で形成され、非晶質半導体層3上に所定
形状のマスクを装着し、ニッケル、アルニウム、チタン
、クロム等の金属を被着したり、非晶質半導体層3上に
ニッケル、アルニウム、チタン、クロム等の金属膜を被
着した後、レジスト・エツチング処理したりして所定パ
ターンに形成される。好ましい金属は、金属電極4a、
4bと外部リードとが容易に半田付けできるニッケルで
ある。5b is formed in the same process, and a mask of a predetermined shape is attached on the amorphous semiconductor layer 3, and metals such as nickel, alumium, titanium, and chromium are deposited on the amorphous semiconductor layer 3. After depositing a metal film of aluminum, titanium, chromium, etc., a resist etching process is performed to form a predetermined pattern. Preferred metals include metal electrode 4a,
4b and the external lead are made of nickel which can be easily soldered.
最後に、透明基板1以外からの不要な光入射防止し、正
確な光検出が可能にするため、半田層6が形成される部
分のみを開口して、裏面側は遮光顔料が含有した絶縁保
護膜7で被われている。尚、該絶縁保護膜7に耐熱性で
、且つ半田接合できない、例えば遮光顔料が含有したエ
ポキシ樹脂を用いれば、該絶縁保護膜7の形成後に半田
デツプすれば、極めて容易に半田層6が形成される。Finally, in order to prevent unnecessary light from entering from sources other than the transparent substrate 1 and to enable accurate light detection, only the part where the solder layer 6 will be formed is opened, and the back side is covered with an insulating layer containing a light-shielding pigment. It is covered with a membrane 7. If the insulating protective film 7 is made of an epoxy resin that is heat resistant and cannot be soldered, for example containing a light-shielding pigment, the solder layer 6 can be formed very easily by applying solder after forming the insulating protective film 7. be done.
第2図は、第1図に示した光センサーの金属電極4aに
+、積層体すの金属電極4bに−とじて外部回路から一
定のバイアス電圧を印加した等価回路図である。FIG. 2 is an equivalent circuit diagram in which a constant bias voltage is applied from an external circuit to the metal electrode 4a of the optical sensor shown in FIG. 1 and to the metal electrode 4b of the laminated body.
尚、説明上、金属電極4aと透明導電膜2aとで非晶質
半導体層3を挟持する部分を積層体U、導電膜5aと透
明導電膜2aとで非晶質半導体層3を挟持する部分を積
層体■、導電膜5aと透明導電膜2bとで非晶質半導体
層3を挟持する部分を積層体W、導電膜5bと透明導電
膜2bとで非晶質半導体層3を挟持する部分を積層体X
、導電膜5bと透明導電膜2cとで非晶質半導体層3を
挟持する部分を積層体y、金属電極4bと透明導電膜2
cとで非晶質半導体層3を挟持する部分を積層体2と言
い、非晶質半導体層3は基板側からP層、1層、N石と
積層され、各金泥電極4a、4b、導電膜5a、5b及
び透明導電膜2a〜20間は非晶質半導体層3の厚み以
上の間隔を有するものとする。For the sake of explanation, the part where the amorphous semiconductor layer 3 is sandwiched between the metal electrode 4a and the transparent conductive film 2a is referred to as the laminate U, and the part where the amorphous semiconductor layer 3 is sandwiched between the conductive film 5a and the transparent conductive film 2a. A laminate ■, a part where the amorphous semiconductor layer 3 is sandwiched between the conductive film 5a and the transparent conductive film 2b are a laminate W, a part where the amorphous semiconductor layer 3 is sandwiched between the conductive film 5b and the transparent conductive film 2b. The laminate
, the part where the amorphous semiconductor layer 3 is sandwiched between the conductive film 5b and the transparent conductive film 2c is a laminate y, the metal electrode 4b and the transparent conductive film 2
The part in which the amorphous semiconductor layer 3 is sandwiched between the two layers is called a laminate 2, and the amorphous semiconductor layer 3 is laminated with a P layer, a 1 layer, and an N stone from the substrate side, and each gold electrode 4a, 4b, and a conductive layer. The distance between the films 5a, 5b and the transparent conductive films 2a to 20 is greater than the thickness of the amorphous semiconductor layer 3.
第2図に示した等価回路図において、暗状態では・金属
電極4a、4b間にバイアス電圧がかかつているものの
、金属電極4a、4b間の抵抗Rabは、積層体u、
w、 yの逆方向抵抗と積層体V+ X+ Zの
順方向抵抗の和になる。抵抗Rabは各積層体u−Zが
直列接続されているため、Ru+Rv+Rw+Rx+R
y+Rzと等価となる。In the equivalent circuit diagram shown in FIG. 2, in the dark state, although a bias voltage is applied between the metal electrodes 4a and 4b, the resistance Rab between the metal electrodes 4a and 4b is
It is the sum of the reverse resistance of w and y and the forward resistance of the stacked body V+X+Z. The resistor Rab is Ru+Rv+Rw+Rx+R since each stacked body u-Z is connected in series.
It is equivalent to y+Rz.
明状態では、各積層体u−Zで正孔及び電子が発生する
ものの、積層体u、 w、 yには逆方向光電流が
発生し、積層体v、 x、 zには順方向光電流が
発生する。即ち積層体v、 x、 zは順方向ダイ
オードDv、Dx、Dzに、積層体u、 w、 y
は抵抗Ru、Rw、Ryになり、金属電極4a、4b間
の抵抗RabはRu+Rw+Ryと等価となる。In the bright state, although holes and electrons are generated in each stack u-Z, reverse photocurrents are generated in the stacks u, w, y, and forward photocurrents are generated in the stacks v, x, z. occurs. That is, the stacked bodies v, x, z are the forward diodes Dv, Dx, Dz, and the stacked bodies u, w, y
are the resistances Ru, Rw, and Ry, and the resistance Rab between the metal electrodes 4a and 4b is equivalent to Ru+Rw+Ry.
以上のように、特に、膜厚の増加によって抵抗値の制御
が困難なP−1−N接合の非晶質半導体層3を有する光
センサーであっても、隣接し合う2つの透明導電膜2a
、2b及び2b、2cの間隔に対応する位置に導電膜5
a、5bを形成すれば、暗状態、明状態の抵抗値を相対
値で3倍にすることができる。即ち、複数個の透明導電
膜2a。As described above, even in an optical sensor having a P-1-N junction amorphous semiconductor layer 3 whose resistance value is difficult to control due to an increase in film thickness, two adjacent transparent conductive films 2a
, 2b and the conductive film 5 at a position corresponding to the spacing between 2b and 2c.
By forming elements a and 5b, the resistance values in the dark state and bright state can be tripled in relative value. That is, a plurality of transparent conductive films 2a.
2b、2c、、、の少なくとも2つの透明導電膜2a、
2b、2b、2c、、、の間隔の非晶質半導体層3上に
導電膜5a、 5b、 5c、 + 、を形成すれ
ば、導電膜5a、5b、5c、、 、(D形成数に応じ
て2.3.4・・−・倍と任意の抵抗値に設定でき、暗
電流を自由に設定できる。At least two transparent conductive films 2a, 2b, 2c, .
If conductive films 5a, 5b, 5c, + are formed on the amorphous semiconductor layer 3 with intervals of 2b, 2b, 2c, . . . , conductive films 5a, 5b, 5c, . The resistance value can be set to an arbitrary value of 2.3.4 times, and the dark current can be set freely.
また、この抵抗値の増大化は、外部バイアス電圧を複数
の抵抗に分散されるため、バイアス電圧が比較的高圧に
なっても、充分、耐えることができ、高耐圧信頼性が向
上する。In addition, this increase in resistance value allows the external bias voltage to be distributed to a plurality of resistors, so that even if the bias voltage becomes relatively high, it can be sufficiently withstood, and high voltage reliability is improved.
さらに、バイアス電圧の極性を逆にして金属電極4aに
一1積層体すの金属電極4bに十とした場合には、積層
体u、 w、 yと積層体v、 x、 zの働き
が逆になるため、全く支障なく使用でき、交流でも節単
に利用できる光センサーである第3図は、本発明の他の
利用方法を示す等価回路図である。Furthermore, when the polarity of the bias voltage is reversed so that one layer is applied to the metal electrode 4a and the other is applied to the metal electrode 4b, the functions of the layers u, w, y and the layers v, x, z are reversed. Therefore, it is an optical sensor that can be used without any problems and can be easily used even with alternating current. FIG. 3 is an equivalent circuit diagram showing another method of using the present invention.
本発明の光センサーは、金属電極4a、4bと導電膜5
a、5b、5c、、、が同時に形成されるため、導電膜
5 a、 5 b、 5 co、 、 (7) 一
つ又は二つをバイアス電圧を印加する電極として使用で
きる。The optical sensor of the present invention includes metal electrodes 4a, 4b and a conductive film 5.
Since conductive films 5a, 5b, 5c, . . . are formed simultaneously, one or two of the conductive films 5a, 5b, 5co, .
金属電極4a、4b又は導電膜5a、 5b、 5
C01,と透明導電膜2a、2b、2c、、、 とで
非晶質半導体層3を挟持する部分を積層体を多数並設し
ておき、任意の金属電極4a、4b及び導電膜5a、5
b、5c、、、をバイアス電圧を印加する電極に使用す
れば、−(II]の光センサーから多数の抵抗特性を得
ることができる。第3図では、金属電極4aと金属電極
4bとの間で第1の抵抗成分Rabが得られ、金属電極
4aと導電膜5cとの間で第2の抵抗成分Racが得ら
れる。Metal electrodes 4a, 4b or conductive films 5a, 5b, 5
C01, transparent conductive films 2a, 2b, 2c, .
b, 5c, . . . are used as electrodes to which a bias voltage is applied, a large number of resistance characteristics can be obtained from the -(II) optical sensor. In Fig. 3, the relationship between metal electrode 4a and metal electrode 4b A first resistance component Rab is obtained between the metal electrode 4a and the conductive film 5c, and a second resistance component Rac is obtained between the metal electrode 4a and the conductive film 5c.
上述の実施例では、非晶質半導体層は、透明導電股上に
連続して被うように形成され、P−I−N接合が形成さ
れているが、P−1接合、I−N接合の非晶質半導体層
でも構わず、また装造工程上、金属電極と導電膜との間
又は隣接し合う導電股間の非晶質半導体層の一部又は全
部をレーザー照射やエツチングして除去しても構わない
。In the above embodiment, the amorphous semiconductor layer is formed so as to continuously cover the transparent conductive layer, and a P-I-N junction is formed. An amorphous semiconductor layer may be used, and during the assembly process, part or all of the amorphous semiconductor layer between the metal electrode and the conductive film or between the adjacent conductive layers may be removed by laser irradiation or etching. I don't mind.
さらに、γ値が約0.5となるものの、非晶質半導体層
を1層のみの単層としてもよい。Further, although the γ value is approximately 0.5, the amorphous semiconductor layer may be formed as a single layer.
以上のように、本発明は透明基板上に複数個の透明導電
膜を形成し、該透明導電膜に連続して非晶質半導体層を
形成し、さらに少なくとも2つの透明導電膜の間隔の非
晶質半導体層上に導電膜を形成したため、光照射によっ
て抵抗値特性が変化する積層体が直列的に接続された構
造となるため、強い照射光の下での使用を設定して、抵
抗値を所定値に設定できる。As described above, the present invention includes forming a plurality of transparent conductive films on a transparent substrate, forming an amorphous semiconductor layer continuously on the transparent conductive films, and furthermore forming a non-crystalline semiconductor layer between at least two transparent conductive films. Since a conductive film is formed on the crystalline semiconductor layer, the structure has a series-connected layered structure whose resistance value characteristics change with light irradiation. can be set to a predetermined value.
また、バイアスを印加する電極に極性がないため、交流
でも簡単に利用でき、さらに、導電++gの形成数に応
じてバイアス電圧の高電圧化に対応でき、高耐圧信頼性
が向上する。In addition, since the electrode to which bias is applied has no polarity, it can be easily used even with alternating current.Furthermore, the bias voltage can be increased depending on the number of conductive ++g formed, and high voltage resistance reliability is improved.
さらに金属電極又複数個の導電膜の何れか2つの間から
出力を取れば、複数種の抵抗特性が得られる。Furthermore, if the output is taken between any two of the metal electrodes or the plurality of conductive films, a plurality of types of resistance characteristics can be obtained.
第1図は本発明に係る光センサーの構造を示す断面図で
ある。第2図は、第1図に示した光センサーの等価回路
図である。
第3図は本発明の光センサーの他の使用方法を巻示す等
価回路図である。
第4図は従来の光センサーの構造図である。
1 ・・・・・退団基板
2a、2b、2c・・・透明導電膜
3・・・・・・・・・・非晶質半導体層4a、4b・・
・・・・金属電極
5a、5b、5c・・・導電膜FIG. 1 is a sectional view showing the structure of an optical sensor according to the present invention. FIG. 2 is an equivalent circuit diagram of the optical sensor shown in FIG. 1. FIG. 3 is an equivalent circuit diagram showing another method of using the optical sensor of the present invention. FIG. 4 is a structural diagram of a conventional optical sensor. 1...Retired substrates 2a, 2b, 2c...Transparent conductive film 3...Amorphous semiconductor layer 4a, 4b...
... Metal electrodes 5a, 5b, 5c... Conductive film
Claims (1)
導体層を形成し、少なくとも隣接する2個の透明導電膜
の間隔部に対応する非晶質半導体層上に、該非晶質半導
体層を介して両透明導電膜の一部と重なるように導電膜
を形成した光センサー。An amorphous semiconductor layer is formed on a transparent substrate on which a plurality of transparent conductive films are formed, and the amorphous semiconductor layer is placed on the amorphous semiconductor layer corresponding to the space between at least two adjacent transparent conductive films. An optical sensor in which a conductive film is formed so as to overlap part of both transparent conductive films through the transparent conductive film.
Priority Applications (1)
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JP63046459A JP2706942B2 (en) | 1988-02-29 | 1988-02-29 | Light sensor |
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Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63046459A JP2706942B2 (en) | 1988-02-29 | 1988-02-29 | Light sensor |
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JPH01220473A true JPH01220473A (en) | 1989-09-04 |
JP2706942B2 JP2706942B2 (en) | 1998-01-28 |
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ID=12747744
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014074360A1 (en) * | 2012-11-12 | 2014-05-15 | The State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon State University | Amorphous metal thin-film non-linear resistor |
US8822978B2 (en) | 2009-05-12 | 2014-09-02 | The State of Oregon Acting by and through... | Amorphous multi-component metallic thin films for electronic devices |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101321783B1 (en) | 2011-11-11 | 2013-11-04 | 재단법인대구경북과학기술원 | Solar cell with photo sensor for tracking solar and manufacturing method thereof, solar developement system comprising it |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61104561U (en) * | 1984-12-13 | 1986-07-03 | ||
JPS61263171A (en) * | 1985-05-15 | 1986-11-21 | Sharp Corp | Manufacture of amorphous semiconductor photoelectric conversion device |
-
1988
- 1988-02-29 JP JP63046459A patent/JP2706942B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61104561U (en) * | 1984-12-13 | 1986-07-03 | ||
JPS61263171A (en) * | 1985-05-15 | 1986-11-21 | Sharp Corp | Manufacture of amorphous semiconductor photoelectric conversion device |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8822978B2 (en) | 2009-05-12 | 2014-09-02 | The State of Oregon Acting by and through... | Amorphous multi-component metallic thin films for electronic devices |
WO2014074360A1 (en) * | 2012-11-12 | 2014-05-15 | The State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon State University | Amorphous metal thin-film non-linear resistor |
US9099230B2 (en) | 2012-11-12 | 2015-08-04 | State Of Oregon Acting By And Through The State Board Of Higher Education On Behalf Of Oregon State Univesity | Amorphous metal thin-film non-linear resistor |
CN105264618A (en) * | 2012-11-12 | 2016-01-20 | 俄勒冈州立大学 | Amorphous metal thin-film non-linear resistor |
CN105264618B (en) * | 2012-11-12 | 2018-06-05 | 俄勒冈州立大学 | amorphous metal film nonlinear resistor |
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