JPH01218363A - Inverter controller - Google Patents

Abstract

PURPOSE:To suppress the peak of a high frequency component by stepwisely switching the frequency of a carrier signal to be applied to comparing means each time the phase of a reference signal is advanced at 360 deg./3m. CONSTITUTION:A microcomputer 11 in a PWM control type inverter continuously outputs digital signals SDu-SDw composed by quantizing the phase of balanced 3-phase sine wave signals from its terminals Du-Dw, and intermittently outputs a select signal Sa from its output terminal D0 at a predetermined timing. This signal Sa is output each time the phase of the sine wave signal is advanced at 360 deg./3m (m: natural number). D/A converters 12-14 respectively generate U--V-phase reference signals eu-gw. Switching control means 15 including the microcomputer 11 is composed of triangular wave generators 16-21, and a signal selector 22, and comparing means 23 output U--W-phase PWM control signals Su-Sw with the output carrier signal of the means 15 and the reference signals.

Description

Detailed Description of the Invention [Objective of the Invention 1 (Field of Industrial Application) The present invention provides a method for switching switching elements in an inverter main circuit to
The present invention relates to an inverter control device that performs DC-AC conversion by switching using a WM (pulse width modulation) method.

(Prior art) For example, when operating an induction motor at variable speed, it has become common in recent years to use a PWM type inverter. Main parts of the inverter are shown. That is, in the example shown in FIG. 6, power transistors are used as switching elements for the inverter main circuit 1,
Each arm of the three-phase bridge is connected to two pairs of transistors.
7, and the interconnection points of eight pairs of these transistors 2 to 7 are used as output terminals TU, TV, and TW for each phase, respectively. Then, with the inverter main circuit 1 connected to the DC power supply 8, each transistor 2 to 7 is connected to a PW which will be described later.
By switching with the M control signal, three-phase AC output is obtained from the output terminals TU, TV, and TW, and
A three-phase induction motor 9 is driven by this output.

The most common method used to generate the PWM control signal is to compare a sine wave signal as a reference signal with a triangular wave signal as a carrier signal, and the principle of its generation is shown in FIG. That is, as shown in FIG. 7(a), the reference signals eu, eV, and ev are composed of balanced three-phase sine wave signals with a frequency corresponding to the output frequency of the inverter main circuit 1, and the carrier is composed of a triangular wave signal with a constant frequency. 7(b), (
PWM control signal S for each phase as shown in c) and (d), respectively.
I try to obtain u, Sv, and Sv. And U, V
, W, one transistor 2, 4.6 of each phase is connected to PW.
M control signal Su.

Sv, Sv are given as they are, and the other transistor 3
, 5.7, PWM control signals Su, Sv, Sv are set to 1, respectively.
By inverting the phase by 80", each transistor 2 to 7 is switched.As a result of switching each transistor 2 to 7 in this way, for example, the line voltage VUV between the U phase and V phase is as shown in FIG. The waveform becomes as shown in e), and its average value approximates a sine wave as shown by the two-dot chain line.

(Question 8 that the invention seeks to solve) The operational efficiency of the induction motor 9 in the above conventional configuration.

In order to increase the carrier frequency, it is desirable to make the carrier frequency fc (the frequency of the carrier signal eb) as high as possible, but if the carrier frequency fc is made too high, the switching frequency of transistors 2 to 7 will become too high. Since the switching loss increases, there is a problem that the conversion efficiency of the inverter main circuit 1 decreases. However, Darlington type bipolar transistors are widely used as the transistors 2 to 7, but in this case, taking into account the above circumstances and the switching speed of the transistors 2 to 7, The carrier frequency fc is set to about 2 kHz. Further, according to the conventional configuration, the main component of harmonics contained in the output voltage and current of the inverter main circuit 1 is twice the carrier frequency fc, as shown in FIG. 8 showing the actual frequency analysis results. It is known. Therefore, the electromagnetic excitation force accompanying the drive of the induction motor 9 is centered around the 4 kHz frequency band, and the frequency distribution characteristics of the electromagnetic noise at this time are greatest in the frequency band around 4 kHz, as shown in FIG. However, this frequency band is the band in which human hearing is the highest, and therefore, in the conventional configuration, there was a problem in that the electromagnetic noise accompanying the driving of the induction motor 9 was felt to be loud.

The present invention has been made in view of the above circumstances, and its purpose is to provide an inverter control device that can suppress the peak of harmonic components contained in the inverter output, thereby realizing noise reduction when driving a load. There is something to do.

[Structure of the Invention] (Means for Solving the Problem) In order to achieve the above object, the present invention provides an inverter for performing DC-AC conversion by switching switching elements in an inverter main circuit using a PWM control signal. In the control device, a comparison means is provided for generating the PWM control signal by comparing a reference signal and a carrier signal, and the frequency of the carrier signal given to the comparison means is determined so that the phase of the reference signal is 360°/3m (m is a natural number). )
The structure is such that a switching control means is provided for switching stepwise as the vehicle progresses.

In this case, the switching control means controls the frequency of the carrier signal to be switched stepwise as described above to be 3 (2n-1) times the frequency of the reference signal (n is a natural number), that is, an odd multiple of 3. It is desirable to control.

Furthermore, in obtaining the PWM control signal, the PWM control signal is
The W M rvi control signal is stored in a storage element as a logic pattern signal that generates output voltages of different magnitudes corresponding to a plurality of set output frequencies of the inverter main circuit, and the PWM control signal is output from this storage element. A readout control circuit is provided to read out the PW at the set output frequency speed and provide the readout control circuit to the switching element.
The M control signal has a phase of 360 degrees between the reference signal and this reference signal.
A configuration may also be adopted in which a logic pattern signal formed by comparison with a carrier signal whose frequency is switched stepwise every time the signal advances by °/3 m (m is a natural number) is stored as a logical pattern signal.

(Function) The PWM control signal for switching the switching elements in the inverter main circuit is obtained by reading the comparison result between the reference signal and the carrier signal, or the memory contents of the storage element that stores the comparison result. However, in the above comparison, the phase of the reference signal is 360°/3m.
(m is a natural number) The frequency of the carrier signal is switched in stages as the process progresses. As a result, the harmonic components included in the inverter output due to the switching of the switching element become widely dispersed and distributed over a range of integral multiples of multiple types of carrier frequencies that are changed stepwise as described above. . Therefore, the peak of harmonic components contained in the inverter output is lowered, and the noise level when driving a load by the inverter output can be reduced. Furthermore, when switching the carrier frequency in stages as described above, if the carrier frequency is controlled to be an odd multiple of 3 with respect to the frequency of the reference signal, in the PWM control type inverter. As is well known, since harmonics of frequencies lower than the carrier frequency are substantially removed, the noise level when driving a load can be further reduced.

(Embodiment) Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. 1 to 4 and the aforementioned FIG. 6.

In FIG. 1, 11 is a microcomputer, and from its output terminals Du, Dv, Dv, digital signals SDu, SD are obtained by quantizing each phase of a balanced three-phase sine wave signal, for example.
v and SDv continuously, and an output terminal.

The select signal Sa is intermittently outputted at predetermined timing. Specifically, the select signal Sa is a digital signal SDu.

SDv, it is output every time the phase of the balanced three-phase sine wave signal corresponding to SDv advances by 360@/3m (m is a natural number), and in this embodiment, it is output every time the phase of the above signal advances by 151'. It is set to m-8 so that Further, 12.13.14 is a D/A converter, which receives the digital signal SDu.

SDv and SDv are converted into analog to generate reference signals 6g, ey, and ev (that is, balanced three-phase sine wave signals) for each phase of U, V, and W. In addition, in FIG. 2, the above reference signal e
Among the sine wave signals corresponding to u, ev, ev, for example, U
The phase reference signal eu is shown for 1/4 wavelength.

Reference numeral 15 denotes a switching control means including the microcomputer 11, which will be explained below. That is, 16 to 21 are triangular wave generating circuits, which output triangular wave signals of mutually different frequencies (with the same peak value) as carrier signals e1 to e6, respectively. In this case, the frequencies (carrier frequencies) f, -f of the carrier signals e1 to e8 are the same as the reference signals eu, ev, e.
It is 3 (2n-1) times the frequency of ν (n is a natural number), and for example, fl < fg < f3 < f4 < fS <
It is set to satisfy the relationship r6.

Further, 22 is a signal selection circuit, which is configured to sequentially select and pass one of the carrier signals el-66 each time it receives a selection signal Sa from the microcomputer 11. . As a result of the above configuration, the signal selection circuit 22 outputs the reference signal eu.
, ev, and ew advance by 15 degrees, a carrier signal (el to e6) of a different frequency is output, and the state of output change is shown in FIG. In addition, each reference signal eu
, ev, and ev are set to match the zero-crossing phase of any one of the carrier signals e1 to e6. Also, in reality, the carrier signal 8
1 to efi are the digital signals SDu, SDv,
Although a plurality of types of SDv are set corresponding to the inverter output frequency, a plurality of types are set, but only a basic example is disclosed here.

On the other hand, 23 is a comparison means, which is used for the reference signals eu, e.
It is composed of comparators 24, 25 and 26 for comparing v and ev with any of the carrier signals e1 to e6. In this case, each of the above comparators 24.25.2
6 is eu>el~e@, eV>el --5s
, eV > el PWM control signals Su, Sv, Sv that invert from low level to high level only in each state of NeH
(The U-phase signal Su is shown in FIG. 2).

Then, the PWM control signal Su for each phase of U, V, and W is
, Sv, and Sv are U in FIG. 6 above.

V, W are applied directly to one transistor 2, 4.6 for each phase, and are inverted by 180'' by inverters 27, 28, 29 and applied to the other transistor 3°5.7, respectively.

Therefore, the PWM control signal su given as described above
, Sv, and Sv, when each transistor 2 to 7 in the inverter main circuit 1 is switched, each phase output terminal TU of the inverter main circuit 1 is switched.

Three-phase AC output is obtained from the TV and TW, and the induction motor 9 is driven by such inverter output.

At this time, the inverter output includes harmonic components with frequencies that are integral multiples of the carrier frequency, and the carrier frequency changes from fl to f8 every time the phase of the reference signals eu, ev, and ev advances by 1511. As a result, as shown in Fig. 3, the harmonic components included in the inverter output are integer multiples of the six types of carrier frequencies f1 to f6 that are changed stepwise as described above. The harmonics are distributed widely over a range, and the peaks of each harmonic component are suppressed to a low level. For this reason,
The electromagnetic excitation force in the induction motor 9 is dispersed over a wide frequency range and the level decreases, and as a result, the level of electromagnetic noise generated in the induction motor 9 is lower than that of the conventional one (see Fig. 8), as shown in Fig. 4. reference). In addition, the carrier frequencies f1 to f6 that are switched in stages as described above are
Since the frequency of the reference signals eu, ev, and ew is controlled to be an odd multiple of 3, harmonics of frequencies lower than the carrier frequencies f1 to f8 are generated, as is well known in PWM control type inverters. As a result, the level of electromagnetic noise generated by the induction motor 9 can be further suppressed.

In the above embodiment, the comparison means 23. Signal selection circuit 22. The functions of the triangular wave generation circuits 16 to 21 etc. can be performed using a high-speed calculation type microcomputer or the so-called DSP (Digital
It is also possible to adopt a configuration realized by software using a software such as .ital Signal Processor.

FIG. 5 shows a second embodiment of the present invention which has the same effects as the first embodiment, and will be described below with reference to FIG. 6 as well.

That is, numeral 30 is a ROM which is a storage element, and contains the PWM control signal Su in the first embodiment.

Sv, a PWM control signal for each phase equivalent to Sv, that is, a reference signal consisting of a balanced three-phase sine wave signal, and a carrier signal consisting of a triangular wave signal whose frequency is switched stepwise every time the phase of this reference signal advances by 15@ For example, a 360'' PWM control signal formed by comparison with A plurality of types of PWM control signals are stored so as to generate output voltages of different magnitudes each having the same ratio relationship with a plurality of set output frequencies.Furthermore, such plural types of PWM control signals are stored in a frequency setting circuit (not shown). A signal corresponding to the frequency is selected by a frequency selection signal sb from the reference clock.31 is a readout control circuit for reading out the PWM control signal selected as described above. A signal generation circuit 32 for generating a signal PC generates a new read clock signal Ps by converting the reference clock signal Pc into a frequency division ratio according to the frequency selection signal sb.
The rate multiplier 33 converts the RO to
It is constituted by a counter 34 for sequentially reading out the PWM control signals from M30. The PWM control signal thus read out from the ROM 30 is applied to the transistors 2 to 7 in the inverter main circuit l in the same manner as in the first embodiment.

It should be noted that the present invention is not limited to the embodiments described above and shown in the drawings, and may be implemented with various modifications without departing from the gist of the invention, such as a configuration in which the carrier frequency is switched in more steps. can do.

[Effect of the invention] As is clear from the above explanation, according to the inventions of claims 1 and 3, the harmonic components contained in the inverter output are distributed in a distributed manner, and the peak of the harmonic components is This reduces noise when driving the load. Moreover, according to the invention of claim 2, the above-mentioned noise reduction effect can be further enhanced.

[Brief explanation of the drawing]

1 to 4 show a first embodiment of the present invention, FIG. 1 is a block diagram showing the main part of the system, and FIG. 2 is the relationship between the reference signal, carrier signal, and PWM control signal. 3 is a distribution characteristic diagram of harmonic components, and FIG. 4 is a noise characteristic diagram. Furthermore, FIG. 5 is a diagram corresponding to FIG. 1 showing the second embodiment of the present invention, FIG. 6 is a wiring diagram showing an example of the configuration of a general inverter main circuit, and FIG. 7 is a P
Waveform diagrams illustrating the generation principle of the WM control signal, Figures 8 and 9
The figures correspond to FIGS. 3 and 4, respectively, for explaining the conventional example. In the figure, 1 is the inverter main circuit, 2 to 7 are transistors (
9 is a three-phase induction motor, 11 is a microcomputer, 12 to 14 are A/D converters, 1
5 is a switching control means, 16 to 21 are triangular wave generation circuits, 22
23 is a signal selection circuit, 23 is a comparing means, 24 to 26 are comparators, 30 is a ROM (memory element), and 31 is a read control circuit. Applicant Toshiba Corporation Figure 1 Figure 2 Figure 3 Figure 6 Figure 7 Figure 8 Figure 9

Claims (1)

[Claims] 1. In a device for performing DC-AC conversion by switching switching elements in an inverter main circuit using a PWM control signal, the PWM control signal is generated by comparing a reference signal and a carrier signal. and switching control means for switching the frequency of the carrier signal given to the comparison means in stages every time the phase of the reference signal advances by 360°/3m (m is a natural number). Control device. 2. The frequency of the carrier signal that is switched stepwise by the switching control means is controlled to be 3 (2n-1) times the frequency of the reference signal (n is a natural number). inverter control device. 3. In a device for performing DC-AC conversion by switching switching elements in an inverter main circuit using a PWM control signal, the PWM control signal is set to have different amplitudes corresponding to a plurality of set output frequencies of the inverter main circuit. a storage element storing a logic pattern signal so as to generate an output voltage of 1000 kHz, and a readout control circuit that reads out the PWM control signal from the storage element at the set output frequency speed and applies it to the switching element; The PWM control signal stored in the memory element is such that the phase between the reference signal and this reference signal is 360°/3m (m
is a natural number).