JPH01216429A - Microcomputer - Google Patents

Abstract

PURPOSE:To enable recovery from a subroutine to a main program to be performed by one instruction, to shorten a processing time, and to improve processing efficiency by switching two kinds of incorporated stack memories. CONSTITUTION:The title computer is provided with the stack memories 1 and 2 to house the value of a program counter which performs the addressing of a program memory at the time of executing a subroutine call instruction, a stack pointer 3 to perform the addressing to the memory 1, and a permission flag setting circuit 4 to perform control whether or not the value of the program counter should be stored on the memory 2. When an instruction RETM that is a recovery instruction to the main program is decoded in processing the subroutine, a microcomputer activates the operation prohibiting signal 5 of the stack pointer 3, and simultaneously, activates a readout prohibiting signal 9 to the memory 1, and the recovery processing is performed by making access to the memory 2. In such a way, it is possible to recover to the main program by one instruction.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer, and more particularly to a microcomputer that references a subroutine at multiple nesting levels and has an improved method for returning from the subroutine.

[Conventional technology]

Usually, a microcomputer (hereinafter referred to as a microcomputer)
The program includes an instruction for calling a subroutine from within a program (hereinafter referred to as a CALL instruction) and an instruction for returning from the subroutine (hereinafter referred to as a RET instruction). Here, the operation of the microcomputer when executing such a CALL instruction and a RET instruction will be explained in particular.

Figure 4 shows the flow of progera to explain a conventional example.
In particular, it is a sequence diagram showing an example of a subroutine operation of a microcomputer and its return operation.

As shown in FIG. 4, when the microcomputer that is processing the main program 30 decodes the CALL instruction, it first stacks the value of a counter (hereinafter referred to as a program counter) for addressing the ROM memory that stores the program. Stored in random access memory called memory. The storage address at that time is a value specified by a counter register called a stack pointer.

This stack pointer stores the value of the program counter in the back memory and at the same time increments the address. For example, if the stack memory has 8 bits per address, when 5 bytes of data is stored, the stack pointer will point to the (current address) + 5 address, and the address that is called at the same time, that is, the start address of the subroutine, will point to the (current address) + 5 address. It is written to the program counter and the operation of the CALL instruction is completed. From then on,
The microcontroller moves execution to a subroutine. In the example shown in FIG. 4, subroutine 31 is called.

Next, regarding the operation of the RET command, the microcontroller
When the instruction is decoded, the data stored during the subroutine call is retrieved from the stack memory and written to the program counter. The address of the data to be taken out sequentially decreases from (the value of the stack pointer) -1, and finally the microcomputer returns to the state immediately before the CALL instruction. In the example shown in FIG. 4, the main program 30 calls the subroutine 31, the subroutine 31 calls the subroutine 32, the subroutine 32 calls the subroutine 33, and then the subroutines called by the RET command sequentially return to the main program. is returning to.

[Problem to be solved by the invention]

In the conventional microcontrollers mentioned above, subroutines have a so-called nested structure, so when performing a sequence of calling subroutines from subroutines, it is not possible to return to the main program at once; The problem is that each RET instruction must be passed through.

However, in general, the operation of the RET instruction requires many processing states and takes several machine cycles, so in a microcomputer sequence that returns to the main program while executing the RET instruction many times, the processing until returning to the main program is delayed. The disadvantage is that it is less efficient.

An object of the present invention is to provide a microcomputer that shortens the time required to return to the main program from such a subroutine and improves processing efficiency.

[Means to solve the problem]

The microcomputer of the present invention includes a first memory and a second memory that store the value of a program counter that addresses the program memory when executing a subroutine call instruction, a stack pointer that addresses the first memory, and a stack pointer that addresses the first memory. and a permission flag setting circuit that controls permission/denial of storage of the program counter value in the second memory.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a main circuit diagram of a microcomputer for explaining a first embodiment of the present invention.

As shown in FIG. 1, such a microcomputer includes a stack memory 1 as a first memory and a stack memory 2 as a second memory, which store the value of a program counter that addresses program memory when executing a subroutine call instruction. A stack pointer 3 generates a recess operation prohibition signal 5 depending on the presence or absence of a return command RETM, and performs addressing to the stack memory 1 using an address line 7.
and a permission flag setting circuit 4 that generates a write permission signal 6 for controlling whether or not to store the program counter value in the stack memory 2. This permission flag setting circuit 4 is set by the CFLAG command and by the CALL command, and the write permission signal 6 is formed by the AND of its output 0 and the CALL command from the control signal line 8. In addition, stack memory 1 and stack memory 2 each have a return instruction R.
Reading is controlled by memory read inhibit signals 9 and 10 which are formed based on the ETM and RET commands.

FIG. 2 shows an example of the flow of program processing in the present invention, and is an operation sequence diagram for explaining the subroutine operation of the microcomputer in FIG. 1.

As shown in FIG. 2, in the flow of such program processing, while the main program 21 is being executed, the first subroutine 22. After processing the second subroutine 23 and third subroutine 24, the flow returns to execution of the main program 21 again. During this operating sequence, CFLAG
In FIG. 1, CALL is an instruction to set the permission flag setting circuit 4 and permit writing to the stack memory 2.
I is an instruction that calls the first subroutine 22, CAL
L2 is an instruction that calls the second subroutine 23, CA
LL3 is an instruction for calling the third subroutine 24, and RETM is a return instruction for returning from the subroutine to the main program. This RBTM instruction is different from the RET instruction described above.

First, before calling the subroutine 22 on the main program 21, the permission flag setting circuit 4 is set using the CFLAG command.
Set. After performing such setting, the permission flag setting circuit 4 receives the first CALL instruction (CALL
1) is cleared after execution. In this way, CFL
After executing the AG instruction, the first CALL instruction, CA
When LLl is decoded, the control signal line 8 becomes active and writing to the stack memory 2 is permitted. The subsequent operation is the same as that of the CALL instruction described above, but in the present invention, the value of the program counter is written to both stack memory 1 and stack memory 2. Furthermore, after the CALL instruction is executed, the permission flag setting circuit 4 is cleared, so the CFLA is set again.
Unless the permission flag setting circuit 4 is activated by executing the G instruction, even if the CALL instruction is executed, the stack memory 2
No data is written to . In the example shown in FIG. 2, program processing moves to subroutine 22 by executing the CALLI instruction, but even if the CALL2 instruction is executed within this, the operation is no different from that of conventional microcontrollers, and the same applies to the execution of the CALL3 instruction. It is.

On the other hand, when the microcomputer is processing the subroutine 24 and decodes the RETM instruction, which is an instruction to return to the main program 21, the microcomputer activates the stack pointer 3 operation inhibit signal 5, and at the same time inhibits the operation of the stack pointer 3. , the read prohibition signal 9 to the stack memory 1 is also activated to prohibit access to the stack memory 1. Therefore, the restoration process is performed by accessing the stack memory 2. That is, since the stack memory 2 stores the state immediately before the execution of the CALLI instruction, the return to the main program is performed with one instruction. On the other hand, for processing of the above-mentioned normal RET command, since the read prohibition signal 10 to the stack memory 2 becomes active, only the stack memory 1 is accessed and the conventional processing is performed.

In the explanation so far, the program flow shown in FIG. 2 has been taken as an example, but in addition to this, for example, if the CFLAG instruction is executed before the CALL2 instruction in the subroutine 22, the RETM instruction can be executed in the subroutine 24. By doing this, it is possible to return to the subroutine 22, and it is possible to return to the desired location with one command without being aware of the nesting level of the subroutine.

FIG. 3 is a main circuit diagram of a microcomputer for explaining a second embodiment of the present invention.

As shown in FIG. 3, the basic configuration of this second embodiment is the same as that in FIG. It is omitted here. The difference from the first embodiment described above is that there are two types of write permission signals 13 and 16 to the stack memory 11. That is, the stack memory 2 in FIG. 1 cannot be used directly by the user, but in this second embodiment, the stack memory 1
For example, the user can freely access the second stack memory 11 by mapping it into the memory space and setting the write permission signal 16.
If access is possible, there is a great advantage that by rewriting the value of the program counter, it is possible to return to an arbitrary address with a single instruction when executing a RETM instruction.

〔Effect of the invention〕

As explained above, the microcontroller of the present invention can execute a single instruction without being aware of the subroutine nesting level by switching the built-in secondary stack memory.
That is, since it is possible to return to a desired location from any location in the same amount of time, it is possible to shorten processing time and improve processing efficiency. Another big advantage is that it requires less hardware than conventional microcontrollers.

[Brief explanation of the drawing]

FIG. 1 is a main circuit diagram of a microcomputer for explaining the first embodiment of the present invention, FIG. 2 is an operation sequence diagram for explaining the subroutine operation of the microcomputer in FIG. 1, and FIG. A main circuit diagram of a microcomputer for explaining a second embodiment of the present invention,
FIG. 4 is a subroutine operation sequence diagram of a microcomputer to explain a conventional example. 1.2.11... Stack memory, 3... Stack pointer, 4, 12... Permission flag setting circuit, 5...
・Stack pointer operation prohibition signal, 6.13゜16・
...Stack memory write enable signal, 7...Address line to stack memory, 8,14...Control signal line to stack memory, 9.10.15...Stack memory read prohibition signal, 21...・Main program, 2
2.23.24... Subroutine.

Claims (1)

[Claims] A first memory and a second memory for storing the value of a program counter for addressing program memory when a subroutine call instruction is executed, a stack pointer for addressing the first memory, and a stack pointer for addressing the first memory; Permission to store the program counter value
1. A microcomputer comprising a permission flag setting circuit for controlling permission disapproval.