JPH01211966A - Solid-state sensing element and manufacture thereof - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] Regarding the structure of the well region in the light receiving part of a solid-state image sensor, the purpose is to increase the photoelectric conversion efficiency and reduce pluming and smear. The opposite conductivity type well region surrounding the one conductivity type semiconductor layer is characterized in that it has an impurity concentration gradient in which the impurity concentration decreases from the surface to the bottom, and the manufacturing method thereof includes the steps of: Opposite conductivity type impurity ions are implanted at high energy and low dose, and then opposite conductivity type impurity ions are implanted at low energy and high dose to form an opposite conductivity type well region surrounding one conductivity type light-receiving layer. It is characterized by including the step of

[Industrial application field]

The present invention relates to a solid-state image sensor and a method for manufacturing the same, and in particular,
This invention relates to the configuration of a well region in a light receiving section.

Recently, CCD image sensors (solid-state image sensors) have been developed as optical sensors that have a wide range of applications such as in the camera field.
There is a demand for further improvement in the performance of the image sensor.

[Problems to be solved by the prior art and the invention] As an area sensor, for example, an incline type CCD (C
Image sensors (Harge Coupled Devices) usually have two functions: a photoelectric conversion section and a charge transfer section. The charge transfer section is a shift register section of a potential well that sequentially changes and transfers the potential of the arranged electrodes. FIG. 3 shows a configuration diagram of an area sensor consisting of an interline CCD image sensor, in which 1 is a photoelectric conversion section + 2a is a vertical shift register, 2b is a horizontal shift register, this shift register is a charge transfer section, 3 is the output part.

FIG. 4 shows a cross-sectional view of this CCD image sensor, and FIG. 4 is a cross-section mainly showing the photoelectric conversion section, where 10 is an n-type silicon substrate, 11 is a p-type well region, 12 is a light receiving section, and 20 is a cross section mainly showing a photoelectric conversion section. In the charge transfer section, only a portion of the charge transfer section 20 is shown because it is arranged perpendicularly to the paper surface.

Figure 5 shows the conventional light receiving section (photodiode).
The same parts as in FIG. 4 are given the same symbols, except that 14 is an n+ type silicon layer, 15 is a transparent insulating film, and this n+ type silicon layer 14 and the p type well region The photodiode portion consisting of 11 is a light receiving portion corresponding to one pixel.

By the way, when light is incident on this light receiving section (photodiode), carriers are generated at the pn junction, and the carriers are sent to the charge transfer section (shift register) by a ternary signal. When light enters, carriers are generated excessively, leaking to neighboring pixels, and registers (
This may cause problems such as leakage into the charge transfer section (charge transfer section), resulting in a CCD III CCD image sensor (reducing sensitivity). The leakage of this light into neighboring pixels is called blooming, and the leakage into the register is called smearing, and it is necessary to reduce these problems as much as possible.

Therefore, for example, a method (vertical overflow drain method) is adopted in which a bias is applied to the substrate during operation, and when excess carriers are generated, the excess carriers are dissipated from the substrate side.

However, if there are too many excess carriers, it is difficult to completely dissipate them from the substrate side. FIG. 6 is a diagram for explaining this, showing the relationship between the depth of the substrate and the carrier potential in the light receiving section. In the same figure,
The deeper the recess (indicated by diagonal lines) in the pn junction, the more carriers accumulate, and therefore blooming and smearing are more likely to occur. Therefore, it can be seen from this figure that if the peak of potential generated in the p-type well region is made smaller, it becomes easier for excess carriers to escape from the substrate side.

However, reducing this potential peak means lowering the impurity concentration in the p-type well region, which expands the depletion layer at the pn junction and makes it easier for carriers to dissipate from the substrate side. If the impurity concentration in the p-type well region is lowered, the photoelectric conversion efficiency of the photodiode will decrease, resulting in a lower output and a lower S/N ratio.

The present invention solves these contradictory problems and proposes a solid-state image sensor and a method for manufacturing the same, which aim to have high photoelectric conversion efficiency and reduce blooming and smear.

[Means for solving problems]

This objective is achieved by a solid-state imaging device in which a well region of an opposite conductivity type surrounding a semiconductor layer of one conductivity type has an impurity concentration gradient in which the impurity concentration decreases from the surface to the bottom.

In addition, as a manufacturing method, impurity ions of the opposite conductivity type are implanted into a semiconductor substrate of one conductivity type at high energy and a low dose, and then impurity ions of the opposite conductivity type are implanted at low energy and a high dose. , a method of forming a well region of an opposite conductivity type surrounding a light-receiving layer of one conductivity type is used.

[Function] That is, the present invention provides an impurity concentration gradient in the well region, so that the impurity concentration gradient decreases from the surface toward the inside. Such a gradient is provided by changing the ion implantation conditions.

In this case, the impurity concentration near the surface of the substrate is high enough to obtain sufficient output characteristics, and the deep part of the substrate is made low impurity concentration from which carriers leak, increasing photoelectric conversion efficiency and reducing blooming and smear.

〔Example〕

Hereinafter, a detailed explanation will be given based on implementation results with reference to the drawings.

FIG. 1 shows a cross-sectional view of the light receiving section according to the present invention,
10 is an n-type silicon substrate, 30 is a p-type well region (film thickness of about 3 to 5 μm), and 14 is an n" type silicon layer (film thickness of about 10 μm).
00 to 2000 people), 15 is a transparent insulating film, and the impurity concentration of the p-type well region is 10' to 10'7/ca on the surface.
1, the bottom part has a slope such that the deformation is about 10'' to 10''/c%.

In this case, the photoelectric conversion efficiency at the photodiode part provided on the surface with high impurity concentration will be high, and the peak of potential in the p-type well region in the deep part with low impurity concentration will become smaller (as shown by the broken line in Figure 6). This makes it easier to release excess carrier from the substrate side.

FIGS. 2(a) and 2(b) show step-by-step cross-sectional views of the manufacturing method according to the present invention, and as shown in FIG. 2(a), an insulating film 31 is formed on the surface of an n-type silicon substrate 10. After forming and covering the area other than the light receiving part with a resist film mask 32, boron (B) ions are implanted at a dose of M 10 /cal and an energy output of about 180 KeV. Then, boron ions are implanted deeply.

Next, as shown in the same figure (a), the dose amount and energy of boron ions were changed, and the dose amount was 10'''''2ctA.
.

Boron ions are implanted near the surface with an energy output of about 100 KeV.

After that, annealing is performed at a high temperature of around 1000℃.
The impurities are diffused to form a p-type well region 3o having a concentration gradient that is concentrated at the surface and thin at the bottom.

An n" type silicon layer 14 is formed thereon by the same ion implantation method to complete the process as shown in FIG.

Note that it is desirable that the p-type well region 30 providing this concentration gradient be applied only to the light receiving portion and not to the well regions of other portions (charge storage portion and charge transfer portion). This is because it is more important not to let your career slip away in other areas.

〔Effect of the invention〕

As is clear from the above description, the solid-state imaging device according to the present invention has an increased photoelectric conversion efficiency, and also reduces blooming and smearing, greatly contributing to improving its performance.

In addition, since the present invention makes it easier to remove carriers from all pixels at once, there is also an advantage that a high-speed electronic shutter can be installed as an added value.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of the light receiving section according to the present invention, FIG. 2 is a cross-sectional view of the manufacturing method according to the present invention in the order of steps, FIG. FIG. 5 is a cross-sectional view of a conventional light receiving section, and FIG. 6 is a diagram showing the relationship between substrate depth and carrier potential. In the figure, 10 is an n-type silicon substrate, 11 and 30 are p-type well regions, 12 is a light receiving section, 14 is an n+ type silicon layer (semiconductor layer), 15 is a transparent insulating film, 20 is a charge transfer section, and 31 is a charge transfer section. Insulating film, 32 is a resist film mask 12 failures, D, tχ 6 places m Fig. 1 Q+ - $ ? ;)! (r3g, += v・ty・J%
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Claims (2)

[Claims] (1) A solid-state imaging device characterized in that a well region of an opposite conductivity type surrounding a semiconductor layer of one conductivity type in a light receiving portion has an impurity concentration gradient in which the impurity concentration decreases from the surface toward the bottom. (2) Implanting impurity ions of the opposite conductivity type into a semiconductor substrate of one conductivity type at high energy and low dose, and then
A method for manufacturing a solid-state imaging device, comprising the step of implanting impurity ions of opposite conductivity type at low energy and high dose to form a well region of opposite conductivity type surrounding a light-receiving layer of one conductivity type. .